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f1a1268572
bootph-all as phase tag was added to dt-schema (dtschema/schemas/bootph.yaml) to describe various node usage during boot phases with DT. Add bootph-all for all nodes that are used in the bootloader on Renesas R-Car Gen2 SoCs. All SoC require CPG clock and its input clock, RST Reset, PFC pin control and PRR ID register access during all stages of the boot process, those are marked using bootph-all property, and so is the SoC bus node which contains these IP. Each board console UART is also marked as bootph-all to make it available in all stages of the boot process. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250209180616.160253-1-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
546 lines
9.3 KiB
Plaintext
546 lines
9.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the Porter board
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*
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* Copyright (C) 2015 Cogent Embedded, Inc.
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*/
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/*
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* SSI-AK4642
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*
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* JP3: 2-1: AK4642
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* 2-3: ADV7511
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*
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* This command is required before playback/capture:
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*
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* amixer set "LINEOUT Mixer DACL" on
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*/
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/dts-v1/;
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#include "r8a7791.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Porter";
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compatible = "renesas,porter", "renesas,r8a7791";
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aliases {
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serial0 = &scif0;
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i2c9 = &gpioi2c2;
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i2c10 = &i2chdmi;
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mmc0 = &sdhi0;
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mmc1 = &sdhi2;
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};
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chosen {
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bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
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stdout-path = "serial0:115200n8";
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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memory@200000000 {
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device_type = "memory";
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reg = <2 0x00000000 0 0x40000000>;
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};
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reg_1p8v: regulator-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-1.8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_3p3v: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vcc_sdhi0: regulator-vcc-sdhi0 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI0 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vccq_sdhi0: regulator-vccq-sdhi0 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI0 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1>, <1800000 0>;
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};
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vcc_sdhi2: regulator-vcc-sdhi2 {
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compatible = "regulator-fixed";
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regulator-name = "SDHI2 Vcc";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vccq_sdhi2: regulator-vccq-sdhi2 {
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compatible = "regulator-gpio";
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regulator-name = "SDHI2 VccQ";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
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gpios-states = <1>;
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states = <3300000 1>, <1800000 0>;
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};
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hdmi-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con: endpoint {
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remote-endpoint = <&adv7511_out>;
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};
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};
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};
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x3_clk: x3-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <148500000>;
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};
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x16_clk: x16-clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <74250000>;
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};
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x14_clk: audio_clock {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <11289600>;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "left_j";
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simple-audio-card,bitclock-master = <&soundcodec>;
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simple-audio-card,frame-master = <&soundcodec>;
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simple-audio-card,cpu {
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sound-dai = <&rcar_sound>;
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};
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soundcodec: simple-audio-card,codec {
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sound-dai = <&ak4642>;
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clocks = <&x14_clk>;
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};
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};
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gpioi2c2: i2c-9 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "i2c-gpio";
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status = "disabled";
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scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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i2c-gpio,delay-us = <5>;
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};
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/*
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* A fallback to GPIO is provided for I2C2.
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*/
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i2chdmi: i2c-mux1 {
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compatible = "i2c-demux-pinctrl";
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i2c-parent = <&i2c2>, <&gpioi2c2>;
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i2c-bus-name = "i2c-hdmi";
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#address-cells = <1>;
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#size-cells = <0>;
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ak4642: codec@12 {
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compatible = "asahi-kasei,ak4642";
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#sound-dai-cells = <0>;
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reg = <0x12>;
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};
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composite-in@20 {
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compatible = "adi,adv7180";
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reg = <0x20>;
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port {
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adv7180: endpoint {
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bus-width = <8>;
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remote-endpoint = <&vin0ep>;
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};
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};
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};
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hdmi@39 {
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compatible = "adi,adv7511w";
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reg = <0x39>;
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interrupts-extended = <&gpio3 29 IRQ_TYPE_LEVEL_LOW>;
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avdd-supply = <®_1p8v>;
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dvdd-supply = <®_1p8v>;
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pvdd-supply = <®_1p8v>;
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dvdd-3v-supply = <®_3p3v>;
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bgvdd-supply = <®_1p8v>;
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adi,input-depth = <8>;
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adi,input-colorspace = "rgb";
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adi,input-clock = "1x";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7511_in: endpoint {
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remote-endpoint = <&du_out_rgb>;
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};
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};
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port@1 {
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reg = <1>;
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adv7511_out: endpoint {
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remote-endpoint = <&hdmi_con>;
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};
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};
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};
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};
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};
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};
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&extal_clk {
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clock-frequency = <20000000>;
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};
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&pfc {
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scif0_pins: scif0 {
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groups = "scif0_data_d";
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function = "scif0";
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};
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ether_pins: ether {
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groups = "eth_link", "eth_mdio", "eth_rmii";
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function = "eth";
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};
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phy1_pins: phy1 {
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groups = "intc_irq0";
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function = "intc";
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};
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pmic_irq_pins: pmicirq {
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groups = "intc_irq2";
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function = "intc";
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};
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sdhi0_pins: sd0 {
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groups = "sdhi0_data4", "sdhi0_ctrl";
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function = "sdhi0";
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};
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sdhi2_pins: sd2 {
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groups = "sdhi2_data4", "sdhi2_ctrl";
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function = "sdhi2";
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};
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qspi_pins: qspi {
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groups = "qspi_ctrl", "qspi_data4";
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function = "qspi";
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};
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i2c2_pins: i2c2 {
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groups = "i2c2";
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function = "i2c2";
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};
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usb0_pins: usb0 {
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groups = "usb0";
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function = "usb0";
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};
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usb1_pins: usb1 {
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groups = "usb1";
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function = "usb1";
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};
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vin0_pins: vin0 {
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groups = "vin0_data8", "vin0_clk";
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function = "vin0";
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};
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can0_pins: can0 {
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groups = "can0_data";
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function = "can0";
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};
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du_pins: du {
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groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
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function = "du";
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};
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ssi_pins: sound {
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groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
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function = "ssi";
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};
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audio_clk_pins: audio_clk {
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groups = "audio_clk_a";
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function = "audio_clk";
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};
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};
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&scif0 {
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pinctrl-0 = <&scif0_pins>;
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pinctrl-names = "default";
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bootph-all;
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status = "okay";
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};
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ðer {
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pinctrl-0 = <ðer_pins>, <&phy1_pins>;
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pinctrl-names = "default";
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phy-handle = <&phy1>;
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renesas,ether-link-active-low;
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status = "okay";
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phy1: ethernet-phy@1 {
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compatible = "ethernet-phy-id0022.1537",
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"ethernet-phy-ieee802.3-c22";
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reg = <1>;
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interrupts-extended = <&irqc0 0 IRQ_TYPE_LEVEL_LOW>;
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micrel,led-mode = <1>;
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reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
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};
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi0>;
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vqmmc-supply = <&vccq_sdhi0>;
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cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&sdhi2 {
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pinctrl-0 = <&sdhi2_pins>;
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pinctrl-names = "default";
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vmmc-supply = <&vcc_sdhi2>;
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vqmmc-supply = <&vccq_sdhi2>;
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cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&qspi {
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pinctrl-0 = <&qspi_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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compatible = "spansion,s25fl512s", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <30000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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m25p,fast-read;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "loader_prg";
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reg = <0x00000000 0x00040000>;
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read-only;
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};
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partition@40000 {
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label = "user_prg";
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reg = <0x00040000 0x00400000>;
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read-only;
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};
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partition@440000 {
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label = "flash_fs";
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reg = <0x00440000 0x03bc0000>;
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};
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};
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};
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};
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&i2c2 {
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pinctrl-0 = <&i2c2_pins>;
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pinctrl-names = "i2c-hdmi";
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clock-frequency = <400000>;
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};
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&i2c6 {
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_irq_pins>;
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status = "okay";
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clock-frequency = <100000>;
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pmic@5a {
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compatible = "dlg,da9063l";
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reg = <0x5a>;
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interrupts-extended = <&irqc0 2 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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watchdog {
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compatible = "dlg,da9063-watchdog";
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};
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};
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vdd_dvfs: regulator@68 {
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compatible = "dlg,da9210";
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reg = <0x68>;
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interrupts-extended = <&irqc0 2 IRQ_TYPE_LEVEL_LOW>;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&sata0 {
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status = "okay";
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};
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&cpu0 {
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cpu0-supply = <&vdd_dvfs>;
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};
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/* composite video input */
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&vin0 {
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status = "okay";
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pinctrl-0 = <&vin0_pins>;
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pinctrl-names = "default";
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port {
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vin0ep: endpoint {
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remote-endpoint = <&adv7180>;
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bus-width = <8>;
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};
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};
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};
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&pci0 {
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pinctrl-0 = <&usb0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&pci1 {
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pinctrl-0 = <&usb1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&hsusb {
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pinctrl-0 = <&usb0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usbphy {
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status = "okay";
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};
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&pcie_bus_clk {
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clock-frequency = <100000000>;
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};
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&pciec {
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status = "okay";
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};
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&can0 {
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pinctrl-0 = <&can0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&du {
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pinctrl-0 = <&du_pins>;
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pinctrl-names = "default";
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status = "okay";
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clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
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<&x3_clk>, <&x16_clk>;
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clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
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ports {
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port@0 {
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endpoint {
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remote-endpoint = <&adv7511_in>;
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};
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};
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};
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};
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&lvds0 {
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ports {
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port@1 {
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lvds_connector: endpoint {
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};
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};
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};
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};
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&rcar_sound {
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pinctrl-0 = <&ssi_pins>, <&audio_clk_pins>;
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pinctrl-names = "default";
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status = "okay";
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/* Single DAI */
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#sound-dai-cells = <0>;
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rcar_sound,dai {
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dai0 {
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playback = <&ssi0>;
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capture = <&ssi1>;
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};
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};
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};
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&rwdt {
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timeout-sec = <60>;
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status = "okay";
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};
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&ssi1 {
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shared-pin;
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};
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