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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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8ae70af247
Add device-tree for ASUS VivoTab RT TF600T, which is NVIDIA Tegra30-based tablet device with Windows RT. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Link: https://lore.kernel.org/r/20250617070320.9153-3-clamor95@gmail.com Signed-off-by: Thierry Reding <treding@nvidia.com>
2501 lines
72 KiB
Plaintext
2501 lines
72 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include <dt-bindings/input/gpio-keys.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/thermal/thermal.h>
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#include "tegra30.dtsi"
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#include "tegra30-cpu-opp.dtsi"
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#include "tegra30-cpu-opp-microvolt.dtsi"
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/ {
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model = "Asus VivoTab RT TF600T";
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compatible = "asus,tf600t", "nvidia,tegra30";
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chassis-type = "convertible";
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aliases {
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mmc0 = &sdmmc4; /* eMMC */
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mmc1 = &sdmmc1; /* uSD slot */
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mmc2 = &sdmmc3; /* WiFi */
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rtc0 = &pmic;
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rtc1 = "/rtc@7000e000";
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display1 = &hdmi;
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serial1 = &uartc; /* Bluetooth */
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serial2 = &uartb; /* GPS */
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};
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/*
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* The decompressor and also some bootloaders rely on a
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* pre-existing /chosen node to be available to insert the
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* command line and merge other ATAGS info.
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*/
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chosen {};
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memory@80000000 {
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reg = <0x80000000 0x80000000>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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linux,cma@80000000 {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x80000000 0x30000000>;
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size = <0x10000000>; /* 256MiB */
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linux,cma-default;
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reusable;
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};
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};
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host1x@50000000 {
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hdmi: hdmi@54280000 {
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status = "okay";
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hdmi-supply = <&hdmi_5v0_sys>;
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pll-supply = <&vdd_1v8_vio>;
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vdd-supply = <&vdd_3v3_sys>;
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nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
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nvidia,ddc-i2c-bus = <&hdmi_ddc>;
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};
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};
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vde@6001a000 {
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assigned-clocks = <&tegra_car TEGRA30_CLK_VDE>;
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assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_P>;
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assigned-clock-rates = <408000000>;
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};
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pinmux@70000868 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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/* SDMMC1 pinmux */
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sdmmc1-clk {
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nvidia,pins = "sdmmc1_clk_pz0";
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nvidia,function = "sdmmc1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc1-cmd {
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nvidia,pins = "sdmmc1_dat3_py4",
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"sdmmc1_dat2_py5",
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"sdmmc1_dat1_py6",
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"sdmmc1_dat0_py7",
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"sdmmc1_cmd_pz1";
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nvidia,function = "sdmmc1";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc1-cd {
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nvidia,pins = "gmi_iordy_pi5";
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nvidia,function = "rsvd1";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc1-wp {
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nvidia,pins = "vi_d11_pt3";
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nvidia,function = "rsvd2";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* SDMMC2 pinmux */
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vi-d1-pd5 {
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nvidia,pins = "vi_d1_pd5",
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"vi_d2_pl0",
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"vi_d3_pl1",
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"vi_d5_pl3",
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"vi_d7_pl5";
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nvidia,function = "sdmmc2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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vi-d8-pl6 {
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nvidia,pins = "vi_d8_pl6",
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"vi_d9_pl7";
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nvidia,function = "sdmmc2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <0>;
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nvidia,io-reset = <0>;
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};
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/* SDMMC3 pinmux */
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sdmmc3-clk {
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nvidia,pins = "sdmmc3_clk_pa6";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc3-cmd {
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nvidia,pins = "sdmmc3_cmd_pa7",
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"sdmmc3_dat0_pb7",
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"sdmmc3_dat1_pb6",
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"sdmmc3_dat2_pb5",
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"sdmmc3_dat3_pb4",
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"sdmmc3_dat4_pd1",
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"sdmmc3_dat5_pd0",
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"sdmmc3_dat6_pd3",
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"sdmmc3_dat7_pd4";
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nvidia,function = "sdmmc3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* SDMMC4 pinmux */
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sdmmc4-clk {
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nvidia,pins = "sdmmc4_clk_pcc4";
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nvidia,function = "sdmmc4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc4-cmd {
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nvidia,pins = "sdmmc4_cmd_pt7",
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"sdmmc4_dat0_paa0",
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"sdmmc4_dat1_paa1",
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"sdmmc4_dat2_paa2",
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"sdmmc4_dat3_paa3",
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"sdmmc4_dat4_paa4",
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"sdmmc4_dat5_paa5",
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"sdmmc4_dat6_paa6",
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"sdmmc4_dat7_paa7";
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nvidia,function = "sdmmc4";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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sdmmc4-rst-n {
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nvidia,pins = "sdmmc4_rst_n_pcc3";
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nvidia,function = "rsvd2";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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cam-mclk {
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nvidia,pins = "cam_mclk_pcc0";
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nvidia,function = "vi_alt3";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* I2C pinmux */
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gen1-i2c {
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nvidia,pins = "gen1_i2c_scl_pc4",
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"gen1_i2c_sda_pc5";
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nvidia,function = "i2c1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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};
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gen2-i2c {
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nvidia,pins = "gen2_i2c_scl_pt5",
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"gen2_i2c_sda_pt6";
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nvidia,function = "i2c2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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};
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cam-i2c {
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nvidia,pins = "cam_i2c_scl_pbb1",
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"cam_i2c_sda_pbb2";
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nvidia,function = "i2c3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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};
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ddc-i2c {
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nvidia,pins = "ddc_scl_pv4",
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"ddc_sda_pv5";
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nvidia,function = "i2c4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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};
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pwr-i2c {
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nvidia,pins = "pwr_i2c_scl_pz6",
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"pwr_i2c_sda_pz7";
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nvidia,function = "i2cpwr";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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};
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hotplug-i2c {
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nvidia,pins = "pu4";
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nvidia,function = "rsvd4";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* HDMI pinmux */
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hdmi-cec {
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nvidia,pins = "hdmi_cec_pee3";
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nvidia,function = "cec";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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nvidia,open-drain = <TEGRA_PIN_ENABLE>;
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nvidia,lock = <TEGRA_PIN_DISABLE>;
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};
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hdmi-hpd {
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nvidia,pins = "hdmi_int_pn7";
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nvidia,function = "hdmi";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* UART-A */
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ulpi-data0-po1 {
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nvidia,pins = "ulpi_data0_po1";
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nvidia,function = "uarta";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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ulpi-data1-po2 {
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nvidia,pins = "ulpi_data1_po2";
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nvidia,function = "uarta";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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ulpi-data5-po6 {
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nvidia,pins = "ulpi_data5_po6";
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nvidia,function = "uarta";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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ulpi-data7-po0 {
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nvidia,pins = "ulpi_data7_po0",
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"ulpi_data2_po3",
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"ulpi_data3_po4",
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"ulpi_data4_po5",
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"ulpi_data6_po7";
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nvidia,function = "uarta";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* UART-B */
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uartb-txd-rts {
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nvidia,pins = "uart2_txd_pc2",
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"uart2_rts_n_pj6";
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nvidia,function = "uartb";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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uartb-rxd-cts {
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nvidia,pins = "uart2_rxd_pc3",
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"uart2_cts_n_pj5";
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nvidia,function = "uartb";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* UART-C */
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uartc-rxd-cts {
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nvidia,pins = "uart3_cts_n_pa1",
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"uart3_rxd_pw7";
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nvidia,function = "uartc";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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uartc-txd-rts {
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nvidia,pins = "uart3_rts_n_pc0",
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"uart3_txd_pw6";
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nvidia,function = "uartc";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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/* UART-D */
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ulpi-nxt-py2 {
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nvidia,pins = "ulpi_nxt_py2";
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nvidia,function = "uartd";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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ulpi-clk-py0 {
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nvidia,pins = "ulpi_clk_py0",
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"ulpi_dir_py1",
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"ulpi_stp_py3";
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nvidia,function = "uartd";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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};
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/* I2S pinmux */
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dap-i2s0 {
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nvidia,pins = "dap1_fs_pn0",
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"dap1_din_pn1",
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"dap1_dout_pn2",
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"dap1_sclk_pn3";
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nvidia,function = "i2s0";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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dap-i2s1 {
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nvidia,pins = "dap2_fs_pa2",
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"dap2_sclk_pa3",
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"dap2_din_pa4",
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"dap2_dout_pa5";
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nvidia,function = "i2s1";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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dap3-fs {
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nvidia,pins = "dap3_fs_pp0";
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nvidia,function = "i2s2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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dap3-din {
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nvidia,pins = "dap3_din_pp1";
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nvidia,function = "i2s2";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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dap3-dout {
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nvidia,pins = "dap3_dout_pp2",
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"dap3_sclk_pp3";
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nvidia,function = "i2s2";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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dap-i2s3 {
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nvidia,pins = "dap4_fs_pp4",
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"dap4_din_pp5",
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"dap4_dout_pp6",
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"dap4_sclk_pp7";
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nvidia,function = "i2s3";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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i2s4 {
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nvidia,pins = "pbb7";
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nvidia,function = "i2s4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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nvidia,enable-input = <TEGRA_PIN_ENABLE>;
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};
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/* Sensors pinmux */
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nct-irq {
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nvidia,pins = "pcc2";
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nvidia,function = "i2s4";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
hall {
|
|
nvidia,pins = "pbb6";
|
|
nvidia,function = "vgp6";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* Asus EC pinmux */
|
|
ec-irqs {
|
|
nvidia,pins = "kb_row10_ps2",
|
|
"kb_row15_ps7";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
ec-reqs {
|
|
nvidia,pins = "kb_col1_pq1";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* Memory type bootstrap */
|
|
mem-boostraps {
|
|
nvidia,pins = "gmi_ad4_pg4",
|
|
"gmi_ad5_pg5";
|
|
nvidia,function = "nand";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* PCI-e pinmux */
|
|
pex-l2-rst-n {
|
|
nvidia,pins = "pex_l2_rst_n_pcc6",
|
|
"pex_l0_rst_n_pdd1",
|
|
"pex_l1_rst_n_pdd5";
|
|
nvidia,function = "pcie";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pex-l2-clkreq-n {
|
|
nvidia,pins = "pex_l2_clkreq_n_pcc7",
|
|
"pex_l0_prsnt_n_pdd0",
|
|
"pex_l0_clkreq_n_pdd2",
|
|
"pex_wake_n_pdd3",
|
|
"pex_l1_prsnt_n_pdd4",
|
|
"pex_l1_clkreq_n_pdd6",
|
|
"pex_l2_prsnt_n_pdd7";
|
|
nvidia,function = "pcie";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* Display A pinmux */
|
|
lcd-pwr0-pb2 {
|
|
nvidia,pins = "lcd_pwr0_pb2",
|
|
"lcd_pclk_pb3",
|
|
"lcd_pwr1_pc1",
|
|
"lcd_d0_pe0",
|
|
"lcd_d1_pe1",
|
|
"lcd_d2_pe2",
|
|
"lcd_d3_pe3",
|
|
"lcd_d4_pe4",
|
|
"lcd_d5_pe5",
|
|
"lcd_d6_pe6",
|
|
"lcd_d7_pe7",
|
|
"lcd_d8_pf0",
|
|
"lcd_d9_pf1",
|
|
"lcd_d10_pf2",
|
|
"lcd_d11_pf3",
|
|
"lcd_d12_pf4",
|
|
"lcd_d13_pf5",
|
|
"lcd_d14_pf6",
|
|
"lcd_d15_pf7",
|
|
"lcd_de_pj1",
|
|
"lcd_hsync_pj3",
|
|
"lcd_vsync_pj4",
|
|
"lcd_d16_pm0",
|
|
"lcd_d17_pm1",
|
|
"lcd_d18_pm2",
|
|
"lcd_d19_pm3",
|
|
"lcd_d20_pm4",
|
|
"lcd_d21_pm5",
|
|
"lcd_d22_pm6",
|
|
"lcd_d23_pm7",
|
|
"lcd_dc0_pn6",
|
|
"lcd_sdin_pz2";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
lcd-cs0-n-pn4 {
|
|
nvidia,pins = "lcd_sdout_pn5",
|
|
"lcd_wr_n_pz3",
|
|
"lcd_pwr2_pc6",
|
|
"lcd_dc1_pd2";
|
|
nvidia,function = "displaya";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
blink {
|
|
nvidia,pins = "clk_32k_out_pa0";
|
|
nvidia,function = "blink";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
/* KBC keys */
|
|
kb-col0 {
|
|
nvidia,pins = "kb_col0_pq0",
|
|
"kb_row1_pr1",
|
|
"kb_row3_pr3",
|
|
"kb_row7_pr7",
|
|
"kb_row8_ps0";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
kb-col5 {
|
|
nvidia,pins = "kb_col5_pq5",
|
|
"kb_col7_pq7",
|
|
"kb_row2_pr2",
|
|
"kb_row4_pr4",
|
|
"kb_row5_pr5",
|
|
"kb_row13_ps5";
|
|
nvidia,function = "kbc";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
gmi-cs0-n-pj0 {
|
|
nvidia,pins = "gmi_wp_n_pc7",
|
|
"gmi_wait_pi7",
|
|
"gmi_cs0_n_pj0",
|
|
"gmi_cs1_n_pj2",
|
|
"gmi_cs2_n_pk3",
|
|
"gmi_cs3_n_pk4";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
vi-pclk-pt0 {
|
|
nvidia,pins = "vi_pclk_pt0";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,lock = <0>;
|
|
nvidia,io-reset = <0>;
|
|
};
|
|
|
|
/* GPIO keys pinmux */
|
|
power-key {
|
|
nvidia,pins = "pv0";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
vol-keys {
|
|
nvidia,pins = "kb_col3_pq3",
|
|
"kb_col4_pq4";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* Bluetooth */
|
|
bt-shutdown {
|
|
nvidia,pins = "pu0";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
bt-dev-wake {
|
|
nvidia,pins = "pu1";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
bt-host-wake {
|
|
nvidia,pins = "pu6";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
pu2 {
|
|
nvidia,pins = "pu2";
|
|
nvidia,function = "rsvd1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pu3 {
|
|
nvidia,pins = "pu3";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pcc1 {
|
|
nvidia,pins = "pcc1";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pv2 {
|
|
nvidia,pins = "pv2";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pv3 {
|
|
nvidia,pins = "pv3";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
vi-vsync-pd6 {
|
|
nvidia,pins = "vi_vsync_pd6",
|
|
"vi_hsync_pd7";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
nvidia,lock = <0>;
|
|
nvidia,io-reset = <0>;
|
|
};
|
|
vi-d10-pt2 {
|
|
nvidia,pins = "vi_d10_pt2",
|
|
"vi_d0_pt4",
|
|
"pbb0";
|
|
nvidia,function = "rsvd2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
kb-row0-pr0 {
|
|
nvidia,pins = "kb_row0_pr0";
|
|
nvidia,function = "rsvd4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
gmi-ad0-pg0 {
|
|
nvidia,pins = "gmi_ad0_pg0",
|
|
"gmi_ad1_pg1",
|
|
"gmi_ad2_pg2",
|
|
"gmi_ad3_pg3",
|
|
"gmi_ad6_pg6",
|
|
"gmi_ad7_pg7",
|
|
"gmi_wr_n_pi0",
|
|
"gmi_oe_n_pi1",
|
|
"gmi_dqs_pi2",
|
|
"gmi_adv_n_pk0",
|
|
"gmi_clk_pk1";
|
|
nvidia,function = "nand";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
gmi-ad13-ph5 {
|
|
nvidia,pins = "gmi_ad13_ph5";
|
|
nvidia,function = "nand";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
gmi-ad10-ph2 {
|
|
nvidia,pins = "gmi_ad10_ph2",
|
|
"gmi_ad11_ph3",
|
|
"gmi_ad14_ph6";
|
|
nvidia,function = "nand";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
gmi-ad12-ph4 {
|
|
nvidia,pins = "gmi_ad12_ph4",
|
|
"gmi_rst_n_pi4",
|
|
"gmi_cs7_n_pi6";
|
|
nvidia,function = "nand";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* Vibrator control */
|
|
vibrator {
|
|
nvidia,pins = "gmi_ad11_ph3";
|
|
nvidia,function = "nand";
|
|
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
/* PWM pinmux */
|
|
pwm-0 {
|
|
nvidia,pins = "gmi_ad8_ph0";
|
|
nvidia,function = "pwm0";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
pwm-2 {
|
|
nvidia,pins = "pu5";
|
|
nvidia,function = "pwm2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
gmi-cs-n {
|
|
nvidia,pins = "gmi_cs4_n_pk2",
|
|
"gmi_cs6_n_pi3";
|
|
nvidia,function = "gmi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* Spdif pinmux */
|
|
spdif-out {
|
|
nvidia,pins = "spdif_out_pk5";
|
|
nvidia,function = "spdif";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
spdif-in {
|
|
nvidia,pins = "spdif_in_pk6";
|
|
nvidia,function = "spdif";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
vi-d4-pl2 {
|
|
nvidia,pins = "vi_d4_pl2";
|
|
nvidia,function = "vi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
vi-d6-pl4 {
|
|
nvidia,pins = "vi_d6_pl4";
|
|
nvidia,function = "vi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
nvidia,lock = <0>;
|
|
nvidia,io-reset = <0>;
|
|
};
|
|
vi-mclk-pt1 {
|
|
nvidia,pins = "vi_mclk_pt1";
|
|
nvidia,function = "vi";
|
|
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
jtag {
|
|
nvidia,pins = "jtag_rtck_pu7";
|
|
nvidia,function = "rtck";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
crt-sync {
|
|
nvidia,pins = "crt_hsync_pv6",
|
|
"crt_vsync_pv7";
|
|
nvidia,function = "crt";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
clk1-out {
|
|
nvidia,pins = "clk1_out_pw4";
|
|
nvidia,function = "extperiph1";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
clk2-out {
|
|
nvidia,pins = "clk2_out_pw5";
|
|
nvidia,function = "extperiph2";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
clk3-out {
|
|
nvidia,pins = "clk3_out_pee0";
|
|
nvidia,function = "extperiph3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
sys-clk-req {
|
|
nvidia,pins = "sys_clk_req_pz5";
|
|
nvidia,function = "sysclk";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
|
|
};
|
|
|
|
pbb3 {
|
|
nvidia,pins = "pbb3";
|
|
nvidia,function = "vgp3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pbb4 {
|
|
nvidia,pins = "pbb4";
|
|
nvidia,function = "vgp4";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
pbb5 {
|
|
nvidia,pins = "pbb5";
|
|
nvidia,function = "vgp5";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
clk2-req-pcc5 {
|
|
nvidia,pins = "clk2_req_pcc5",
|
|
"clk1_req_pee2";
|
|
nvidia,function = "dap";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
clk3-req-pee1 {
|
|
nvidia,pins = "clk3_req_pee1";
|
|
nvidia,function = "dev3";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
owr {
|
|
nvidia,pins = "owr";
|
|
nvidia,function = "owr";
|
|
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
|
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
|
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
|
|
};
|
|
|
|
/* GPIO power/drive control */
|
|
drive-dap1 {
|
|
nvidia,pins = "drive_dap1",
|
|
"drive_dap2",
|
|
"drive_dbg",
|
|
"drive_at5",
|
|
"drive_gme",
|
|
"drive_ddc",
|
|
"drive_ao1",
|
|
"drive_uart3";
|
|
nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
|
nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
|
|
nvidia,pull-down-strength = <31>;
|
|
nvidia,pull-up-strength = <31>;
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
|
};
|
|
drive-sdio1 {
|
|
nvidia,pins = "drive_sdio1",
|
|
"drive_sdio3";
|
|
nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
|
nvidia,schmitt = <TEGRA_PIN_DISABLE>;
|
|
nvidia,pull-down-strength = <46>;
|
|
nvidia,pull-up-strength = <42>;
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
|
|
};
|
|
drive-sdmmc4 {
|
|
nvidia,pins = "drive_gma",
|
|
"drive_gmb",
|
|
"drive_gmc",
|
|
"drive_gmd";
|
|
nvidia,pull-down-strength = <9>;
|
|
nvidia,pull-up-strength = <9>;
|
|
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
|
|
};
|
|
};
|
|
};
|
|
|
|
uartb: serial@70006040 {
|
|
compatible = "nvidia,tegra30-hsuart";
|
|
reset-names = "serial";
|
|
/delete-property/ reg-shift;
|
|
status = "okay";
|
|
|
|
/* Broadcom GPS BCM47511 */
|
|
};
|
|
|
|
uartc: serial@70006200 {
|
|
compatible = "nvidia,tegra30-hsuart";
|
|
reset-names = "serial";
|
|
/delete-property/ reg-shift;
|
|
status = "okay";
|
|
|
|
nvidia,adjust-baud-rates = <0 9600 100>,
|
|
<9600 115200 200>,
|
|
<1000000 4000000 136>;
|
|
|
|
/* Azurewave AW-NH665 BCM4330B1 */
|
|
bluetooth {
|
|
compatible = "brcm,bcm4330-bt";
|
|
max-speed = <4000000>;
|
|
|
|
clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
|
|
clock-names = "txco";
|
|
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
|
|
interrupt-names = "host-wakeup";
|
|
|
|
device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
|
|
shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
|
|
|
|
vbat-supply = <&vdd_3v3_com>;
|
|
vddio-supply = <&vdd_1v8_vio>;
|
|
};
|
|
};
|
|
|
|
pwm@7000a000 {
|
|
status = "okay";
|
|
};
|
|
|
|
gen1_i2c: i2c@7000c000 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
|
|
/* Nuvoton NPCE698LA0BX embedded controller */
|
|
};
|
|
|
|
i2c@7000c400 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
/* Atmel Maxtouch MXT1664 HID over I2C */
|
|
touchscreen@4b {
|
|
compatible = "hid-over-i2c";
|
|
reg = <0x4b>;
|
|
|
|
hid-descr-addr = <0x0000>;
|
|
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_LEVEL_LOW>;
|
|
|
|
vdd-supply = <&vdd_3v3_sys>;
|
|
vddl-supply = <&vdd_1v8_vio>;
|
|
};
|
|
};
|
|
|
|
i2c@7000c500 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
|
|
/* TI TPS61050/61052 Boost Converter */
|
|
flash-led@33 {
|
|
compatible = "ti,tps61052";
|
|
reg = <0x33>;
|
|
|
|
led {
|
|
color = <LED_COLOR_ID_WHITE>;
|
|
};
|
|
};
|
|
|
|
imu@69 {
|
|
compatible = "invensense,mpu6050";
|
|
reg = <0x69>;
|
|
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_RISING>;
|
|
|
|
vdd-supply = <&vdd_3v3_sys>;
|
|
vddio-supply = <&vdd_1v8_vio>;
|
|
|
|
mount-matrix = "0", "-1", "0",
|
|
"-1", "0", "0",
|
|
"0", "0", "-1";
|
|
|
|
/* External I2C interface */
|
|
i2c-gate {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
magnetometer@d {
|
|
compatible = "asahi-kasei,ak8975";
|
|
reg = <0x0d>;
|
|
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(D, 5) IRQ_TYPE_EDGE_RISING>;
|
|
|
|
vdd-supply = <&vdd_3v3_sys>;
|
|
vid-supply = <&vdd_1v8_vio>;
|
|
|
|
mount-matrix = "0", "-1", "0",
|
|
"-1", "0", "0",
|
|
"0", "0", "-1";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
hdmi_ddc: i2c@7000c700 {
|
|
status = "okay";
|
|
clock-frequency = <93750>;
|
|
};
|
|
|
|
i2c@7000d000 {
|
|
status = "okay";
|
|
clock-frequency = <400000>;
|
|
|
|
rt5640: audio-codec@1c {
|
|
compatible = "realtek,rt5640";
|
|
reg = <0x1c>;
|
|
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
|
|
clock-names = "mclk";
|
|
};
|
|
|
|
/* Texas Instruments TPS659110 PMIC */
|
|
pmic: pmic@2d {
|
|
compatible = "ti,tps65911";
|
|
reg = <0x2d>;
|
|
|
|
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
|
#interrupt-cells = <2>;
|
|
interrupt-controller;
|
|
|
|
ti,en-gpio-sleep = <0 0 1 0 0 0 0 0 0>;
|
|
ti,system-power-controller;
|
|
ti,sleep-keep-ck32k;
|
|
ti,sleep-enable;
|
|
|
|
#gpio-cells = <2>;
|
|
gpio-controller;
|
|
|
|
vcc1-supply = <&vdd_5v0_bat>;
|
|
vcc2-supply = <&vdd_5v0_bat>;
|
|
vcc3-supply = <&vdd_1v8_vio>;
|
|
vcc4-supply = <&vdd_5v0_sys>;
|
|
vcc5-supply = <&vdd_5v0_bat>;
|
|
vcc6-supply = <&vdd_3v3_sys>;
|
|
vcc7-supply = <&vdd_5v0_bat>;
|
|
vccio-supply = <&vdd_5v0_bat>;
|
|
|
|
pmic-sleep-hog {
|
|
gpio-hog;
|
|
gpios = <2 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
};
|
|
|
|
regulators {
|
|
vdd_lcd: vdd1 {
|
|
regulator-name = "vddio_ddr_1v2";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
ti,regulator-ext-sleep-control = <8>;
|
|
};
|
|
|
|
vddio_ddr: vdd2 {
|
|
regulator-name = "vddio_ddr";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
vdd_cpu: vddctrl {
|
|
regulator-name = "vdd_cpu,vdd_sys";
|
|
regulator-min-microvolt = <600000>;
|
|
regulator-max-microvolt = <1400000>;
|
|
regulator-coupled-with = <&vdd_core>;
|
|
regulator-coupled-max-spread = <300000>;
|
|
regulator-max-step-microvolt = <100000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
ti,regulator-ext-sleep-control = <1>;
|
|
|
|
nvidia,tegra-cpu-regulator;
|
|
};
|
|
|
|
vdd_1v8_vio: vio {
|
|
regulator-name = "vdd_1v8_gen";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
/* eMMC VDD */
|
|
vcore_emmc: ldo1 {
|
|
regulator-name = "vdd_emmc_core";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
/* ldo2 and ldo3 are not used by TF600T */
|
|
|
|
ldo4 {
|
|
regulator-name = "vdd_rtc";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
/* uSD slot VDDIO */
|
|
vddio_usd: ldo5 {
|
|
regulator-name = "vddio_sdmmc";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
avdd_dsi_csi: ldo6 {
|
|
regulator-name = "avdd_dsi_csi";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
};
|
|
|
|
ldo7 {
|
|
regulator-name = "vdd_pllm,x,u,a_p_c_s";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
ti,regulator-ext-sleep-control = <8>;
|
|
};
|
|
|
|
ldo8 {
|
|
regulator-name = "vdd_ddr_hs";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-always-on;
|
|
ti,regulator-ext-sleep-control = <8>;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* Capella CM3218 ambient light sensor */
|
|
light-sensor@48 {
|
|
compatible = "capella,cm32181";
|
|
reg = <0x48>;
|
|
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_EDGE_RISING>;
|
|
|
|
vdd-supply = <&vdd_3v3_als>;
|
|
};
|
|
|
|
nct72: temperature-sensor@4c {
|
|
compatible = "onnn,nct1008";
|
|
reg = <0x4c>;
|
|
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_EDGE_FALLING>;
|
|
|
|
vcc-supply = <&vdd_3v3_sys>;
|
|
#thermal-sensor-cells = <1>;
|
|
};
|
|
|
|
vdd_core: core-regulator@60 {
|
|
compatible = "ti,tps62361";
|
|
reg = <0x60>;
|
|
|
|
regulator-name = "tps62361-vout";
|
|
regulator-min-microvolt = <500000>;
|
|
regulator-max-microvolt = <1770000>;
|
|
regulator-coupled-with = <&vdd_cpu>;
|
|
regulator-coupled-max-spread = <300000>;
|
|
regulator-max-step-microvolt = <100000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
ti,enable-vout-discharge;
|
|
ti,vsel0-state-high;
|
|
ti,vsel1-state-high;
|
|
|
|
nvidia,tegra-core-regulator;
|
|
};
|
|
};
|
|
|
|
pmc@7000e400 {
|
|
status = "okay";
|
|
nvidia,invert-interrupt;
|
|
nvidia,suspend-mode = <2>;
|
|
nvidia,cpu-pwr-good-time = <2000>;
|
|
nvidia,cpu-pwr-off-time = <200>;
|
|
nvidia,core-pwr-good-time = <3845 3845>;
|
|
nvidia,core-pwr-off-time = <0>;
|
|
nvidia,core-power-req-active-high;
|
|
nvidia,sys-clock-req-active-high;
|
|
core-supply = <&vdd_core>;
|
|
|
|
i2c-thermtrip {
|
|
nvidia,i2c-controller-id = <4>;
|
|
nvidia,bus-addr = <0x2d>;
|
|
nvidia,reg-addr = <0x3f>;
|
|
nvidia,reg-data = <0x81>;
|
|
};
|
|
};
|
|
|
|
spi@7000da00 {
|
|
status = "okay";
|
|
spi-max-frequency = <25000000>;
|
|
|
|
flash@1 {
|
|
compatible = "winbond,w25q32", "jedec,spi-nor";
|
|
reg = <1>;
|
|
|
|
spi-max-frequency = <20000000>;
|
|
vcc-supply = <&vdd_3v3_sys>;
|
|
};
|
|
};
|
|
|
|
memory-controller@7000f000 {
|
|
emc-timings-0 {
|
|
/* Elpida 2GB 750 MHZ */
|
|
nvidia,ram-code = <0>;
|
|
|
|
timing-25500000 {
|
|
clock-frequency = <25500000>;
|
|
|
|
nvidia,emem-configuration = < 0x00020001 0xc0000010
|
|
0x00000001 0x00000001 0x00000002 0x00000000
|
|
0x00000001 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0502 0x75e30303 0x001f0000 >;
|
|
};
|
|
|
|
timing-51000000 {
|
|
clock-frequency = <51000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00010001 0xc0000010
|
|
0x00000001 0x00000001 0x00000002 0x00000000
|
|
0x00000001 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0502 0x74e30303 0x001f0000 >;
|
|
};
|
|
|
|
timing-102000000 {
|
|
clock-frequency = <102000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00000001 0xc0000018
|
|
0x00000001 0x00000001 0x00000003 0x00000000
|
|
0x00000001 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0503 0x74430504 0x001f0000 >;
|
|
};
|
|
|
|
timing-204000000 {
|
|
clock-frequency = <204000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00000003 0xc0000025
|
|
0x00000001 0x00000001 0x00000005 0x00000002
|
|
0x00000003 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0505 0x74040a06 0x001f0000 >;
|
|
};
|
|
|
|
timing-375000000 {
|
|
clock-frequency = <375000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00000005 0xc0000044
|
|
0x00000001 0x00000002 0x00000009 0x00000005
|
|
0x00000005 0x00000001 0x00000002 0x00000008
|
|
0x00000002 0x00000002 0x00000003 0x00000006
|
|
0x06030202 0x000d0709 0x7086110a 0x001f0000 >;
|
|
};
|
|
|
|
timing-750000000 {
|
|
clock-frequency = <750000000>;
|
|
|
|
nvidia,emem-configuration = < 0x0000000b 0xc0000087
|
|
0x00000004 0x00000005 0x00000012 0x0000000c
|
|
0x0000000b 0x00000002 0x00000003 0x0000000c
|
|
0x00000002 0x00000002 0x00000004 0x00000008
|
|
0x08040202 0x00160d12 0x710c2213 0x001f0000 >;
|
|
};
|
|
};
|
|
|
|
emc-timings-1 {
|
|
/* Hynix 2GB 750 MHZ */
|
|
nvidia,ram-code = <1>;
|
|
|
|
timing-51000000 {
|
|
clock-frequency = <51000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00010003 0xc0000010
|
|
0x00000001 0x00000001 0x00000002 0x00000000
|
|
0x00000001 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0502 0x74630303 0x001f0000 >;
|
|
};
|
|
|
|
timing-102000000 {
|
|
clock-frequency = <102000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00000003 0xc0000018
|
|
0x00000001 0x00000001 0x00000003 0x00000000
|
|
0x00000001 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0503 0x73c30504 0x001f0000 >;
|
|
};
|
|
|
|
timing-204000000 {
|
|
clock-frequency = <204000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00000006 0xc0000025
|
|
0x00000001 0x00000001 0x00000005 0x00000002
|
|
0x00000003 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0505 0x73840a06 0x001f0000 >;
|
|
};
|
|
|
|
timing-375000000 {
|
|
clock-frequency = <375000000>;
|
|
|
|
nvidia,emem-configuration = < 0x0000000b 0xc0000044
|
|
0x00000001 0x00000002 0x00000009 0x00000005
|
|
0x00000005 0x00000001 0x00000002 0x00000008
|
|
0x00000002 0x00000002 0x00000003 0x00000006
|
|
0x06030202 0x000c0609 0x7086110a 0x001f0000 >;
|
|
};
|
|
|
|
timing-750000000 {
|
|
clock-frequency = <750000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00000016 0xc0000087
|
|
0x00000003 0x00000004 0x00000012 0x0000000c
|
|
0x0000000b 0x00000002 0x00000003 0x0000000c
|
|
0x00000002 0x00000002 0x00000004 0x00000008
|
|
0x08040202 0x00150c12 0x710c2213 0x001f0000 >;
|
|
};
|
|
};
|
|
|
|
emc-timings-2 {
|
|
/* Micron 2GB 750 MHZ */
|
|
nvidia,ram-code = <2>;
|
|
|
|
timing-51000000 {
|
|
clock-frequency = <51000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00010003 0xc0000010
|
|
0x00000001 0x00000001 0x00000002 0x00000000
|
|
0x00000001 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0502 0x73430303 0x001f0000 >;
|
|
};
|
|
|
|
timing-102000000 {
|
|
clock-frequency = <102000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00000003 0xc0000018
|
|
0x00000001 0x00000001 0x00000003 0x00000000
|
|
0x00000001 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0503 0x74430504 0x001f0000 >;
|
|
};
|
|
|
|
timing-204000000 {
|
|
clock-frequency = <204000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00000006 0xc0000025
|
|
0x00000001 0x00000001 0x00000005 0x00000002
|
|
0x00000003 0x00000001 0x00000003 0x00000008
|
|
0x00000002 0x00000001 0x00000002 0x00000006
|
|
0x06020102 0x000a0505 0x74040a06 0x001f0000 >;
|
|
};
|
|
|
|
timing-375000000 {
|
|
clock-frequency = <375000000>;
|
|
|
|
nvidia,emem-configuration = < 0x0000000b 0xc0000044
|
|
0x00000001 0x00000002 0x00000009 0x00000005
|
|
0x00000005 0x00000001 0x00000002 0x00000008
|
|
0x00000002 0x00000002 0x00000003 0x00000006
|
|
0x06030202 0x000d0709 0x7086110a 0x001f0000 >;
|
|
};
|
|
|
|
timing-750000000 {
|
|
clock-frequency = <750000000>;
|
|
|
|
nvidia,emem-configuration = < 0x00000016 0xc0000087
|
|
0x00000004 0x00000005 0x00000012 0x0000000c
|
|
0x0000000b 0x00000003 0x00000003 0x0000000c
|
|
0x00000002 0x00000002 0x00000004 0x00000008
|
|
0x08040202 0x00160d12 0x710c2213 0x001f0000 >;
|
|
};
|
|
};
|
|
};
|
|
|
|
memory-controller@7000f400 {
|
|
emc-timings-0 {
|
|
/* Elpida 2GB 750 MHZ */
|
|
nvidia,ram-code = <0>;
|
|
|
|
timing-25500000 {
|
|
clock-frequency = <25500000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200048>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000001
|
|
0x00000007 0x00000000 0x00000000 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000000
|
|
0x00000000 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000005 0x00000004 0x0000000a
|
|
0x0000000b 0x000000c0 0x00000000 0x00000030
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000008 0x00000008
|
|
0x00000004 0x00000001 0x00000000 0x00000004
|
|
0x00000005 0x000000c7 0x00000006 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x007800a4
|
|
0x00008000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00000000
|
|
0x00000040 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80000287 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-51000000 {
|
|
clock-frequency = <51000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200048>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000002
|
|
0x0000000f 0x00000001 0x00000000 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000000
|
|
0x00000000 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000005 0x00000004 0x0000000a
|
|
0x0000000b 0x00000181 0x00000000 0x00000060
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000010 0x00000010
|
|
0x00000004 0x00000002 0x00000000 0x00000004
|
|
0x00000005 0x0000018e 0x00000006 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x007800a4
|
|
0x00008000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00000000
|
|
0x00000040 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x8000040b 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-102000000 {
|
|
clock-frequency = <102000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200048>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000004
|
|
0x0000001e 0x00000003 0x00000001 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000001
|
|
0x00000001 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000005 0x00000004 0x0000000a
|
|
0x0000000b 0x00000303 0x00000000 0x000000c0
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000020 0x00000020
|
|
0x00000004 0x00000004 0x00000000 0x00000004
|
|
0x00000005 0x0000031c 0x00000006 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x007800a4
|
|
0x00008000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00000000
|
|
0x00000040 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80000713 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-204000000 {
|
|
clock-frequency = <204000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200048>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000009
|
|
0x0000003d 0x00000007 0x00000002 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000002
|
|
0x00000002 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000006 0x00000004 0x0000000a
|
|
0x0000000b 0x00000607 0x00000000 0x00000181
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000040 0x00000040
|
|
0x00000004 0x00000007 0x00000000 0x00000004
|
|
0x00000005 0x00000638 0x00000007 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x004400a4
|
|
0x00008000 0x00080000 0x00080000 0x00080000
|
|
0x00080000 0x00080000 0x00080000 0x00080000
|
|
0x00080000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00080000 0x00080000 0x00080000
|
|
0x00080000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00020000
|
|
0x00000100 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80000d22 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-375000000 {
|
|
clock-frequency = <375000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100002>;
|
|
nvidia,emc-mode-2 = <0x80200040>;
|
|
nvidia,emc-mode-reset = <0x80000521>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
|
|
nvidia,emc-configuration = < 0x00000011
|
|
0x0000006f 0x0000000c 0x00000004 0x00000003
|
|
0x00000008 0x00000002 0x0000000a 0x00000004
|
|
0x00000004 0x00000002 0x00000001 0x00000000
|
|
0x00000004 0x00000006 0x00000004 0x0000000a
|
|
0x0000000c 0x00000b2d 0x00000000 0x000002cb
|
|
0x00000001 0x00000008 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000075 0x00000200
|
|
0x00000004 0x0000000c 0x00000000 0x00000004
|
|
0x00000005 0x00000b6d 0x00000000 0x00000004
|
|
0x00000000 0x00000000 0x00007088 0x00200084
|
|
0x00008000 0x00034000 0x00034000 0x00034000
|
|
0x00034000 0x00014000 0x00014000 0x00014000
|
|
0x00014000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00048000 0x00048000 0x00048000
|
|
0x00048000 0x000002a0 0x0600013d 0x00000000
|
|
0x77fff884 0x01f1f508 0x05057404 0x54000007
|
|
0x080001e8 0x06000021 0x00000802 0x00020000
|
|
0x00000100 0x0150000c 0xa0f10000 0x00000000
|
|
0x00000000 0x8000174b 0xe8000000 0xff00ff89 >;
|
|
};
|
|
|
|
timing-750000000 {
|
|
clock-frequency = <750000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100002>;
|
|
nvidia,emc-mode-2 = <0x80200058>;
|
|
nvidia,emc-mode-reset = <0x80000d71>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
|
|
nvidia,emc-configuration = < 0x00000023
|
|
0x000000df 0x00000019 0x00000009 0x00000005
|
|
0x0000000d 0x00000004 0x00000013 0x00000009
|
|
0x00000009 0x00000003 0x00000001 0x00000000
|
|
0x00000007 0x0000000b 0x00000009 0x0000000b
|
|
0x00000011 0x0000169a 0x00000000 0x000005a6
|
|
0x00000003 0x00000010 0x00000001 0x00000000
|
|
0x0000000e 0x00000018 0x000000e9 0x00000200
|
|
0x00000005 0x00000017 0x00000000 0x00000007
|
|
0x00000008 0x000016da 0x0000000c 0x00000004
|
|
0x00000000 0x00000000 0x00005088 0xf0080191
|
|
0x00008000 0x0000000a 0x0000000a 0x0000000a
|
|
0x0000000a 0x00000008 0x00000008 0x00000008
|
|
0x00000008 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x0000000a 0x0000000a 0x0000000a
|
|
0x0000000a 0x000002a0 0x0600013d 0x22220000
|
|
0x77fff884 0x01f1f501 0x07077404 0x54000000
|
|
0x080001e8 0x06000021 0x00000802 0x00020000
|
|
0x00000100 0x00df000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80002d93 0xf8000000 0xff00ff49 >;
|
|
};
|
|
};
|
|
|
|
emc-timings-1 {
|
|
/* Hynix 2GB 750 MHZ */
|
|
nvidia,ram-code = <1>;
|
|
|
|
timing-51000000 {
|
|
clock-frequency = <51000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200048>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000002
|
|
0x0000000d 0x00000001 0x00000000 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000000
|
|
0x00000000 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000005 0x00000004 0x0000000a
|
|
0x0000000b 0x00000181 0x00000000 0x00000060
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x0000000e 0x0000000e
|
|
0x00000004 0x00000002 0x00000000 0x00000004
|
|
0x00000005 0x0000018e 0x00000006 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x007800a4
|
|
0x00008000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00000000
|
|
0x00000040 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x8000040b 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-102000000 {
|
|
clock-frequency = <102000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200048>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000004
|
|
0x0000001a 0x00000003 0x00000001 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000001
|
|
0x00000001 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000005 0x00000004 0x0000000a
|
|
0x0000000b 0x00000303 0x00000000 0x000000c0
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x0000001c 0x0000001c
|
|
0x00000004 0x00000004 0x00000000 0x00000004
|
|
0x00000005 0x0000031c 0x00000006 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x007800a4
|
|
0x00008000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00000000
|
|
0x00000040 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80000713 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-204000000 {
|
|
clock-frequency = <204000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200048>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000009
|
|
0x00000035 0x00000007 0x00000002 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000002
|
|
0x00000002 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000006 0x00000004 0x0000000a
|
|
0x0000000b 0x00000607 0x00000000 0x00000181
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000038 0x00000038
|
|
0x00000004 0x00000007 0x00000000 0x00000004
|
|
0x00000005 0x00000638 0x00000007 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x004400a4
|
|
0x00008000 0x00080000 0x00080000 0x00080000
|
|
0x00080000 0x00080000 0x00080000 0x00080000
|
|
0x00080000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00080000 0x00080000 0x00080000
|
|
0x00080000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00020000
|
|
0x00000100 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80000d22 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-375000000 {
|
|
clock-frequency = <375000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200040>;
|
|
nvidia,emc-mode-reset = <0x80000521>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
|
|
nvidia,emc-configuration = < 0x00000011
|
|
0x00000060 0x0000000c 0x00000003 0x00000004
|
|
0x00000008 0x00000002 0x0000000a 0x00000003
|
|
0x00000003 0x00000002 0x00000001 0x00000000
|
|
0x00000004 0x00000006 0x00000004 0x0000000a
|
|
0x0000000c 0x00000b2d 0x00000000 0x000002cb
|
|
0x00000001 0x00000008 0x00000001 0x00000000
|
|
0x00000007 0x00000010 0x00000066 0x00000200
|
|
0x00000004 0x0000000c 0x00000000 0x00000004
|
|
0x00000005 0x00000b6d 0x00000000 0x00000004
|
|
0x00000000 0x00000000 0x00007288 0x00200084
|
|
0x00008000 0x00044000 0x00044000 0x00044000
|
|
0x00044000 0x00014000 0x00014000 0x00014000
|
|
0x00014000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00048000 0x00048000 0x00048000
|
|
0x00048000 0x000002a0 0x0600013d 0x00000000
|
|
0x77fff884 0x01f1f508 0x05057404 0x54000007
|
|
0x08000168 0x06000021 0x00000802 0x00020000
|
|
0x00000100 0x015f000c 0xa0f10000 0x00000000
|
|
0x00000000 0x8000174b 0xe8000000 0xff00ff89 >;
|
|
};
|
|
|
|
timing-750000000 {
|
|
clock-frequency = <750000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100002>;
|
|
nvidia,emc-mode-2 = <0x80200058>;
|
|
nvidia,emc-mode-reset = <0x80000d71>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
|
|
nvidia,emc-configuration = < 0x00000023
|
|
0x000000c1 0x00000019 0x00000008 0x00000005
|
|
0x0000000d 0x00000004 0x00000013 0x00000008
|
|
0x00000008 0x00000003 0x00000001 0x00000000
|
|
0x00000007 0x0000000b 0x00000009 0x0000000b
|
|
0x00000011 0x0000169a 0x00000000 0x000005a6
|
|
0x00000003 0x00000010 0x00000001 0x00000000
|
|
0x0000000e 0x00000018 0x000000cb 0x00000200
|
|
0x00000005 0x00000017 0x00000000 0x00000007
|
|
0x00000008 0x000016da 0x0000000c 0x00000004
|
|
0x00000000 0x00000000 0x00005088 0xf0080191
|
|
0x00008000 0x00008008 0x00000008 0x00000008
|
|
0x00000008 0x00000008 0x00000008 0x00000008
|
|
0x00000008 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x0000000a 0x0000000a 0x0000000a
|
|
0x0000000a 0x000002a0 0x0800013d 0x22220000
|
|
0x77fff884 0x01f1f501 0x07077404 0x54000000
|
|
0x080001e8 0x08000021 0x00000802 0x00020000
|
|
0x00000100 0x00fd000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80002d93 0xe8000000 0xff00ff49 >;
|
|
};
|
|
};
|
|
|
|
emc-timings-2 {
|
|
/* Micron 2GB 750 MHZ */
|
|
nvidia,ram-code = <2>;
|
|
|
|
timing-51000000 {
|
|
clock-frequency = <51000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200008>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000002
|
|
0x00000008 0x00000001 0x00000000 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000000
|
|
0x00000000 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000005 0x00000004 0x0000000a
|
|
0x0000000b 0x00000181 0x00000000 0x00000060
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000009 0x00000009
|
|
0x00000004 0x00000002 0x00000000 0x00000004
|
|
0x00000005 0x0000018e 0x00000006 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x007800a4
|
|
0x00008000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00000000
|
|
0x00000040 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x8000040b 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-102000000 {
|
|
clock-frequency = <102000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200048>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000004
|
|
0x0000001e 0x00000003 0x00000001 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000001
|
|
0x00000001 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000005 0x00000004 0x0000000a
|
|
0x0000000b 0x00000303 0x00000000 0x000000c0
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000020 0x00000020
|
|
0x00000004 0x00000004 0x00000000 0x00000004
|
|
0x00000005 0x0000031c 0x00000006 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x007800a4
|
|
0x00008000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x000fc000 0x000fc000 0x000fc000
|
|
0x000fc000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00000000
|
|
0x00000040 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80000713 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-204000000 {
|
|
clock-frequency = <204000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100003>;
|
|
nvidia,emc-mode-2 = <0x80200048>;
|
|
nvidia,emc-mode-reset = <0x80001221>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
nvidia,emc-cfg-dyn-self-ref;
|
|
|
|
nvidia,emc-configuration = < 0x00000009
|
|
0x0000003d 0x00000007 0x00000002 0x00000002
|
|
0x0000000a 0x00000005 0x0000000b 0x00000002
|
|
0x00000002 0x00000003 0x00000001 0x00000000
|
|
0x00000005 0x00000006 0x00000004 0x0000000a
|
|
0x0000000b 0x00000607 0x00000000 0x00000181
|
|
0x00000002 0x00000002 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000040 0x00000040
|
|
0x00000004 0x00000007 0x00000000 0x00000004
|
|
0x00000005 0x00000638 0x00000007 0x00000004
|
|
0x00000000 0x00000000 0x00004288 0x004400a4
|
|
0x00008000 0x00080000 0x00080000 0x00080000
|
|
0x00080000 0x00080000 0x00080000 0x00080000
|
|
0x00080000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00080000 0x00080000 0x00080000
|
|
0x00080000 0x000002a0 0x0800211c 0x00000000
|
|
0x77fff884 0x01f1f108 0x05057404 0x54000007
|
|
0x08000168 0x08000000 0x00000802 0x00020000
|
|
0x00000100 0x000c000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80000d22 0xe8000000 0xff00ff00 >;
|
|
};
|
|
|
|
timing-375000000 {
|
|
clock-frequency = <375000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100002>;
|
|
nvidia,emc-mode-2 = <0x80200040>;
|
|
nvidia,emc-mode-reset = <0x80000521>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
|
|
nvidia,emc-configuration = < 0x00000011
|
|
0x0000006f 0x0000000c 0x00000004 0x00000003
|
|
0x00000008 0x00000002 0x0000000a 0x00000004
|
|
0x00000004 0x00000002 0x00000001 0x00000000
|
|
0x00000004 0x00000006 0x00000004 0x0000000a
|
|
0x0000000c 0x00000b2d 0x00000000 0x000002cb
|
|
0x00000001 0x00000008 0x00000001 0x00000000
|
|
0x00000007 0x0000000f 0x00000075 0x00000200
|
|
0x00000004 0x0000000c 0x00000000 0x00000004
|
|
0x00000005 0x00000b6d 0x00000000 0x00000004
|
|
0x00000000 0x00000000 0x00007088 0x00200084
|
|
0x00008000 0x00044000 0x00044000 0x00044000
|
|
0x00044000 0x00014000 0x00014000 0x00014000
|
|
0x00014000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00048000 0x00048000 0x00048000
|
|
0x00048000 0x000002a0 0x0800013d 0x00000000
|
|
0x77fff884 0x01f1f508 0x05057404 0x54000007
|
|
0x080001e8 0x08000021 0x00000802 0x00020000
|
|
0x00000100 0x0150000c 0xa0f10000 0x00000000
|
|
0x00000000 0x8000174b 0xe8000000 0xff00ff89 >;
|
|
};
|
|
|
|
timing-750000000 {
|
|
clock-frequency = <750000000>;
|
|
|
|
nvidia,emc-auto-cal-interval = <0x001fffff>;
|
|
nvidia,emc-mode-1 = <0x80100002>;
|
|
nvidia,emc-mode-2 = <0x80200058>;
|
|
nvidia,emc-mode-reset = <0x80000d71>;
|
|
nvidia,emc-zcal-cnt-long = <0x00000040>;
|
|
nvidia,emc-cfg-periodic-qrst;
|
|
|
|
nvidia,emc-configuration = < 0x00000023
|
|
0x000000df 0x00000019 0x00000009 0x00000005
|
|
0x0000000d 0x00000004 0x00000013 0x00000009
|
|
0x00000009 0x00000006 0x00000001 0x00000000
|
|
0x00000007 0x0000000b 0x00000009 0x0000000b
|
|
0x00000011 0x0000169a 0x00000000 0x000005a6
|
|
0x00000003 0x00000010 0x00000001 0x00000000
|
|
0x0000000e 0x00000018 0x000000e9 0x00000200
|
|
0x00000005 0x00000017 0x00000000 0x00000007
|
|
0x00000008 0x000016da 0x0000000c 0x00000004
|
|
0x00000000 0x00000000 0x00005088 0xf0080191
|
|
0x00008000 0x0000800a 0x0000000a 0x0000000a
|
|
0x0000000a 0x00000008 0x00000008 0x00000008
|
|
0x00000008 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x00000000 0x00000000 0x00000000
|
|
0x00000000 0x007fc00a 0x0000000a 0x0000000a
|
|
0x0000000a 0x000002a0 0x0800013d 0x22220000
|
|
0x77fff884 0x01f1f501 0x07077404 0x54000000
|
|
0x080001e8 0x08000021 0x00000802 0x00020000
|
|
0x00000100 0x00df000c 0xa0f10000 0x00000000
|
|
0x00000000 0x80002d93 0xf8000000 0xff00ff49 >;
|
|
};
|
|
};
|
|
};
|
|
|
|
hda@70030000 {
|
|
status = "okay";
|
|
};
|
|
|
|
ahub@70080000 {
|
|
i2s@70080400 { /* i2s1 */
|
|
status = "okay";
|
|
};
|
|
|
|
/* BT SCO */
|
|
i2s@70080600 { /* i2s3 */
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
sdmmc1: mmc@78000000 {
|
|
status = "okay";
|
|
bus-width = <4>;
|
|
|
|
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
|
|
power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
|
|
|
|
vmmc-supply = <&vdd_3v3_sys>;
|
|
vqmmc-supply = <&vddio_usd>;
|
|
};
|
|
|
|
sdmmc3: mmc@78000400 {
|
|
status = "okay";
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
|
|
assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>;
|
|
assigned-clock-rates = <50000000>;
|
|
|
|
max-frequency = <50000000>;
|
|
keep-power-in-suspend;
|
|
bus-width = <4>;
|
|
non-removable;
|
|
|
|
mmc-pwrseq = <&brcm_wifi_pwrseq>;
|
|
vmmc-supply = <&vdd_3v3_com>;
|
|
vqmmc-supply = <&vdd_1v8_vio>;
|
|
|
|
/* Azurewave AW-NH665 BCM4330B1 */
|
|
wifi@1 {
|
|
compatible = "brcm,bcm4329-fmac";
|
|
reg = <1>;
|
|
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>;
|
|
interrupt-names = "host-wake";
|
|
};
|
|
};
|
|
|
|
sdmmc4: mmc@78000600 {
|
|
status = "okay";
|
|
bus-width = <8>;
|
|
|
|
non-removable;
|
|
mmc-ddr-1_8v;
|
|
|
|
vmmc-supply = <&vcore_emmc>;
|
|
vqmmc-supply = <&vdd_1v8_vio>;
|
|
};
|
|
|
|
/* USB via ASUS connector */
|
|
usb@7d000000 {
|
|
compatible = "nvidia,tegra30-udc";
|
|
status = "okay";
|
|
dr_mode = "peripheral";
|
|
};
|
|
|
|
usb-phy@7d000000 {
|
|
status = "okay";
|
|
dr_mode = "peripheral";
|
|
nvidia,hssync-start-delay = <0>;
|
|
nvidia,xcvr-lsfslew = <2>;
|
|
nvidia,xcvr-lsrslew = <2>;
|
|
vbus-supply = <&vdd_5v0_sys>;
|
|
};
|
|
|
|
/* Dock's USB port */
|
|
usb@7d008000 {
|
|
status = "okay";
|
|
};
|
|
|
|
usb-phy@7d008000 {
|
|
status = "okay";
|
|
vbus-supply = <&vdd_5v0_bat>;
|
|
};
|
|
|
|
backlight: backlight {
|
|
compatible = "pwm-backlight";
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
|
|
power-supply = <&vdd_5v0_bl>;
|
|
pwms = <&pwm 0 71428>;
|
|
|
|
brightness-levels = <1 255>;
|
|
num-interpolated-steps = <254>;
|
|
default-brightness-level = <15>;
|
|
};
|
|
|
|
pad_battery: battery-pad {
|
|
compatible = "simple-battery";
|
|
device-chemistry = "lithium-ion-polymer";
|
|
charge-full-design-microamp-hours = <6760000>;
|
|
energy-full-design-microwatt-hours = <25000000>;
|
|
operating-range-celsius = <0 45>;
|
|
};
|
|
|
|
dock_battery: battery-dock {
|
|
compatible = "simple-battery";
|
|
device-chemistry = "lithium-ion-polymer";
|
|
charge-full-design-microamp-hours = <2980000>;
|
|
energy-full-design-microwatt-hours = <22000000>;
|
|
operating-range-celsius = <0 45>;
|
|
};
|
|
|
|
/* PMIC has a built-in 32KHz oscillator which is used by PMC */
|
|
clk32k_in: clock-32k {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <32768>;
|
|
clock-output-names = "pmic-oscillator";
|
|
};
|
|
|
|
cpus {
|
|
cpu0: cpu@0 {
|
|
cpu-supply = <&vdd_cpu>;
|
|
operating-points-v2 = <&cpu0_opp_table>;
|
|
#cooling-cells = <2>;
|
|
};
|
|
cpu1: cpu@1 {
|
|
cpu-supply = <&vdd_cpu>;
|
|
operating-points-v2 = <&cpu0_opp_table>;
|
|
#cooling-cells = <2>;
|
|
};
|
|
cpu2: cpu@2 {
|
|
cpu-supply = <&vdd_cpu>;
|
|
operating-points-v2 = <&cpu0_opp_table>;
|
|
#cooling-cells = <2>;
|
|
};
|
|
cpu3: cpu@3 {
|
|
cpu-supply = <&vdd_cpu>;
|
|
operating-points-v2 = <&cpu0_opp_table>;
|
|
#cooling-cells = <2>;
|
|
};
|
|
};
|
|
|
|
extcon-keys {
|
|
compatible = "gpio-keys";
|
|
|
|
switch-dock-hall-sensor {
|
|
label = "Lid sensor";
|
|
gpios = <&gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_LOW>;
|
|
linux,input-type = <EV_SW>;
|
|
linux,code = <SW_LID>;
|
|
debounce-interval = <500>;
|
|
wakeup-event-action = <EV_ACT_ASSERTED>;
|
|
wakeup-source;
|
|
};
|
|
|
|
switch-lineout-detect {
|
|
label = "Audio dock line-out detect";
|
|
gpios = <&gpio TEGRA_GPIO(X, 3) GPIO_ACTIVE_LOW>;
|
|
linux,input-type = <EV_SW>;
|
|
linux,code = <SW_LINEOUT_INSERT>;
|
|
debounce-interval = <10>;
|
|
wakeup-event-action = <EV_ACT_ASSERTED>;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
|
|
key-power {
|
|
label = "Power";
|
|
gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_POWER>;
|
|
debounce-interval = <10>;
|
|
wakeup-event-action = <EV_ACT_ASSERTED>;
|
|
wakeup-source;
|
|
};
|
|
|
|
key-volume-down {
|
|
label = "Volume Down";
|
|
gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_VOLUMEDOWN>;
|
|
debounce-interval = <10>;
|
|
wakeup-event-action = <EV_ACT_ASSERTED>;
|
|
wakeup-source;
|
|
};
|
|
|
|
key-volume-up {
|
|
label = "Volume Up";
|
|
gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_VOLUMEUP>;
|
|
debounce-interval = <10>;
|
|
wakeup-event-action = <EV_ACT_ASSERTED>;
|
|
wakeup-source;
|
|
};
|
|
};
|
|
|
|
haptic-feedback {
|
|
compatible = "gpio-vibrator";
|
|
enable-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
|
|
vcc-supply = <&vdd_3v3_sys>;
|
|
};
|
|
|
|
opp-table-actmon {
|
|
/delete-node/ opp-800000000;
|
|
/delete-node/ opp-900000000;
|
|
};
|
|
|
|
opp-table-emc {
|
|
/delete-node/ opp-800000000-1300;
|
|
/delete-node/ opp-900000000-1350;
|
|
};
|
|
|
|
brcm_wifi_pwrseq: pwrseq-wifi {
|
|
compatible = "mmc-pwrseq-simple";
|
|
|
|
clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
|
|
clock-names = "ext_clock";
|
|
|
|
reset-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
|
|
post-power-on-delay-ms = <300>;
|
|
power-off-delay-us = <300>;
|
|
};
|
|
|
|
vdd_5v0_bat: regulator-bat {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_ac_bat";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
|
|
vdd_5v0_cp: regulator-sby {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_5v0_sby";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_5v0_bat>;
|
|
};
|
|
|
|
vdd_5v0_sys: regulator-5v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_5v0_sys";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
gpio = <&pmic 8 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_5v0_bat>;
|
|
};
|
|
|
|
vdd_1v5_ddr: regulator-ddr {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_ddr";
|
|
regulator-min-microvolt = <1500000>;
|
|
regulator-max-microvolt = <1500000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_5v0_bat>;
|
|
};
|
|
|
|
vdd_3v3_sys: regulator-3v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_3v3_sys";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_5v0_bat>;
|
|
};
|
|
|
|
vdd_3v3_com: regulator-com {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_3v3_com";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_3v3_sys>;
|
|
};
|
|
|
|
vdd_3v3_als: regulator-als {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_3v3_als";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
gpio = <&gpio TEGRA_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_3v3_sys>;
|
|
};
|
|
|
|
vdd_5v0_bl: regulator-bl {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_5v0_bl";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-boot-on;
|
|
gpio = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_5v0_bat>;
|
|
};
|
|
|
|
hdmi_5v0_sys: regulator-hdmi {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "hdmi_5v0_sys";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
|
|
enable-active-high;
|
|
vin-supply = <&vdd_5v0_sys>;
|
|
};
|
|
|
|
sound {
|
|
compatible = "asus,tegra-audio-rt5640-tf600t",
|
|
"nvidia,tegra-audio-rt5640";
|
|
nvidia,model = "Asus VivoTab RT TF600T RT5640";
|
|
|
|
nvidia,audio-routing =
|
|
"Headphones", "HPOR",
|
|
"Headphones", "HPOL",
|
|
"Speakers", "SPORP",
|
|
"Speakers", "SPORN",
|
|
"Speakers", "SPOLP",
|
|
"Speakers", "SPOLN",
|
|
"DMIC1", "Mic Jack";
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
nvidia,audio-codec = <&rt5640>;
|
|
|
|
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
|
|
nvidia,mic-det-gpios = <&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_LOW>;
|
|
nvidia,coupled-mic-hp-det;
|
|
|
|
clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
|
|
<&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
|
|
<&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
|
|
|
assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
|
|
<&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
|
|
|
|
assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
|
|
<&tegra_car TEGRA30_CLK_EXTERN1>;
|
|
};
|
|
|
|
thermal-zones {
|
|
/*
|
|
* NCT72 has two sensors:
|
|
*
|
|
* 0: internal that monitors ambient/skin temperature
|
|
* 1: external that is connected to the CPU's diode
|
|
*
|
|
* Ideally we should use userspace thermal governor,
|
|
* but it's a much more complex solution. The "skin"
|
|
* zone exists as a simpler solution which prevents
|
|
* Transformers from getting too hot from a user's
|
|
* tactile perspective. The CPU zone is intended to
|
|
* protect silicon from damage.
|
|
*/
|
|
|
|
skin-thermal {
|
|
polling-delay-passive = <1000>; /* milliseconds */
|
|
polling-delay = <5000>; /* milliseconds */
|
|
|
|
thermal-sensors = <&nct72 0>;
|
|
|
|
trips {
|
|
trip0: skin-alert {
|
|
/* throttle at 57C until temperature drops to 56.8C */
|
|
temperature = <57000>;
|
|
hysteresis = <200>;
|
|
type = "passive";
|
|
};
|
|
|
|
trip1: skin-crit {
|
|
/* shut down at 65C */
|
|
temperature = <65000>;
|
|
hysteresis = <2000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
map0 {
|
|
trip = <&trip0>;
|
|
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&actmon THERMAL_NO_LIMIT
|
|
THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu-thermal {
|
|
polling-delay-passive = <1000>; /* milliseconds */
|
|
polling-delay = <5000>; /* milliseconds */
|
|
|
|
thermal-sensors = <&nct72 1>;
|
|
|
|
trips {
|
|
trip2: cpu-alert {
|
|
/* throttle at 75C until temperature drops to 74.8C */
|
|
temperature = <75000>;
|
|
hysteresis = <200>;
|
|
type = "passive";
|
|
};
|
|
|
|
trip3: cpu-crit {
|
|
/* shut down at 90C */
|
|
temperature = <90000>;
|
|
hysteresis = <2000>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
map1 {
|
|
trip = <&trip2>;
|
|
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
|
<&actmon THERMAL_NO_LIMIT
|
|
THERMAL_NO_LIMIT>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|