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Add description in the SRAT document to describe the Generic Port Affinity sub-table. Reviewed-by: Gregory Price <gourry@gourry.net> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Link: https://patch.msgid.link/20250515000923.2590820-3-dave.jiang@intel.com Signed-off-by: Dave Jiang <dave.jiang@intel.com>
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2.9 KiB
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72 lines
2.9 KiB
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.. SPDX-License-Identifier: GPL-2.0
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=====================================
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SRAT - Static Resource Affinity Table
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=====================================
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The System/Static Resource Affinity Table describes resource (CPU, Memory)
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affinity to "Proximity Domains". This table is technically optional, but for
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performance information (see "HMAT") to be enumerated by linux it must be
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present.
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There is a careful dance between the CEDT and SRAT tables and how NUMA nodes are
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created. If things don't look quite the way you expect - check the SRAT Memory
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Affinity entries and CEDT CFMWS to determine what your platform actually
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supports in terms of flexible topologies.
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The SRAT may statically assign portions of a CFMWS SPA range to a specific
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proximity domains. See linux numa creation for more information about how
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this presents in the NUMA topology.
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Proximity Domain
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================
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A proximity domain is ROUGHLY equivalent to "NUMA Node" - though a 1-to-1
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mapping is not guaranteed. There are scenarios where "Proximity Domain 4" may
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map to "NUMA Node 3", for example. (See "NUMA Node Creation")
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Memory Affinity
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===============
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Generally speaking, if a host does any amount of CXL fabric (decoder)
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programming in BIOS - an SRAT entry for that memory needs to be present.
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Example ::
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Subtable Type : 01 [Memory Affinity]
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Length : 28
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Proximity Domain : 00000001 <- NUMA Node 1
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Reserved1 : 0000
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Base Address : 000000C050000000 <- Physical Memory Region
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Address Length : 0000003CA0000000
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Reserved2 : 00000000
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Flags (decoded below) : 0000000B
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Enabled : 1
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Hot Pluggable : 1
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Non-Volatile : 0
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Generic Port Affinity
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=====================
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The Generic Port Affinity subtable provides an association between a proximity
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domain and a device handle representing a Generic Port such as a CXL host
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bridge. With the association, latency and bandwidth numbers can be retrieved
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from the SRAT for the path between CPU(s) (initiator) and the Generic Port.
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This is used to construct performance coordinates for hotplugged CXL DEVICES,
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which cannot be enumerated at boot by platform firmware.
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Example ::
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Subtable Type : 06 [Generic Port Affinity]
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Length : 20 <- 32d, length of table
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Reserved : 00
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Device Handle Type : 00 <- 0 - ACPI, 1 - PCI
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Proximity Domain : 00000001
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Device Handle : ACPI0016:01
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Flags : 00000001 <- Bit 0 (Enabled)
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Reserved : 00000000
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The Proximity Domain is matched up to the :doc:`HMAT <hmat>` SSLBI Target
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Proximity Domain List for the related latency or bandwidth numbers. Those
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performance numbers are tied to a CXL host bridge via the Device Handle.
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The driver uses the association to retrieve the Generic Port performance
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numbers for the whole CXL path access coordinates calculation.
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