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Combine the following separate plain text based bindings to YAML: lpc1850-creg-clk.txt pc1850-dmamux.txt phy-lpc18xx-usb-otg.txt Additional changes: - remove label in example. - remove dmamux consumer in example. - remove clock consumer in example. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Link: https://lore.kernel.org/r/20250602143612.943516-1-Frank.Li@nxp.com Signed-off-by: Lee Jones <lee@kernel.org>
149 lines
3.3 KiB
YAML
149 lines
3.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mfd/nxp,lpc1850-creg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: The NXP LPC18xx/43xx CREG (Configuration Registers) block
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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properties:
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compatible:
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items:
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- enum:
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- nxp,lpc1850-creg
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- const: syscon
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- const: simple-mfd
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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clock-controller:
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type: object
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description:
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The NXP LPC18xx/43xx CREG (Configuration Registers) block contains
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control registers for two low speed clocks. One of the clocks is a
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32 kHz oscillator driver with power up/down and clock gating. Next
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is a fixed divider that creates a 1 kHz clock from the 32 kHz osc.
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These clocks are used by the RTC and the Event Router peripherals.
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The 32 kHz can also be routed to other peripherals to enable low
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power modes.
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properties:
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compatible:
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const: nxp,lpc1850-creg-clk
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clocks:
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maxItems: 1
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'#clock-cells':
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const: 1
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description: |
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0 1 kHz clock
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1 32 kHz Oscillator
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required:
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- compatible
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- clocks
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- '#clock-cells'
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additionalProperties: false
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phy:
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type: object
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description: the internal USB OTG PHY in NXP LPC18xx and LPC43xx SoCs
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properties:
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compatible:
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const: nxp,lpc1850-usb-otg-phy
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clocks:
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maxItems: 1
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'#phy-cells':
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const: 0
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required:
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- compatible
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- clocks
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- '#phy-cells'
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additionalProperties: false
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dma-mux:
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type: object
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description: NXP LPC18xx/43xx DMA MUX (DMA request router)
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properties:
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compatible:
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const: nxp,lpc1850-dmamux
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'#dma-cells':
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const: 3
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description: |
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Should be set to <3>.
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* 1st cell contain the master dma request signal
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* 2nd cell contain the mux value (0-3) for the peripheral
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* 3rd cell contain either 1 or 2 depending on the AHB master used.
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dma-requests:
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$ref: /schemas/types.yaml#/definitions/uint32
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maximum: 64
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description: Number of DMA requests the controller can handle
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dma-masters:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle pointing to the DMA controller
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required:
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- compatible
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- '#dma-cells'
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- dma-masters
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additionalProperties: false
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required:
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- compatible
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- reg
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- clocks
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- resets
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/lpc18xx-ccu.h>
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syscon@40043000 {
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compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
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reg = <0x40043000 0x1000>;
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clocks = <&ccu1 CLK_CPU_CREG>;
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resets = <&rgu 5>;
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clock-controller {
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compatible = "nxp,lpc1850-creg-clk";
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clocks = <&xtal32>;
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#clock-cells = <1>;
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};
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phy {
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compatible = "nxp,lpc1850-usb-otg-phy";
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clocks = <&ccu1 CLK_USB0>;
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#phy-cells = <0>;
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};
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dma-mux {
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compatible = "nxp,lpc1850-dmamux";
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#dma-cells = <3>;
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dma-requests = <64>;
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dma-masters = <&dmac>;
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};
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};
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