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5017553415
Convert the J-Core advanced interrupt controller binding to schema format. It's a straight-forward conversion of the typical interrupt controller. Link: https://lore.kernel.org/r/20250505144707.1289503-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
44 lines
943 B
YAML
44 lines
943 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright 2018 Linaro Ltd.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/jcore,aic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: J-Core Advanced Interrupt Controller
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maintainers:
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- Rich Felker <dalias@libc.org>
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properties:
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compatible:
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enum:
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- jcore,aic1
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- jcore,aic2
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reg:
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description: Memory region(s) for configuration. For SMP, there should be one
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region per CPU, indexed by the sequential, zero-based hardware CPU number.
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interrupt-controller: true
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'#interrupt-cells':
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const: 1
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required:
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- compatible
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- reg
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- interrupt-controller
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- '#interrupt-cells'
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additionalProperties: false
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examples:
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- |
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aic: interrupt-controller@200 {
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compatible = "jcore,aic2";
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reg = <0x200 0x30>, <0x500 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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