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52659fab5a
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # msm Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas Link: https://lore.kernel.org/r/20250107125854.227233-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
76 lines
1.7 KiB
YAML
76 lines
1.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/msm/dsi-phy-28nm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Display DSI 28nm PHY
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maintainers:
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- Krishna Manikandan <quic_mkrishn@quicinc.com>
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allOf:
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- $ref: dsi-phy-common.yaml#
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properties:
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compatible:
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enum:
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- qcom,dsi-phy-28nm-8226
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- qcom,dsi-phy-28nm-8937
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- qcom,dsi-phy-28nm-8960
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- qcom,dsi-phy-28nm-hpm
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- qcom,dsi-phy-28nm-hpm-fam-b
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- qcom,dsi-phy-28nm-lp
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reg:
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items:
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- description: dsi pll register set
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- description: dsi phy register set
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- description: dsi phy regulator register set
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reg-names:
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items:
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- const: dsi_pll
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- const: dsi_phy
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- const: dsi_phy_regulator
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vddio-supply:
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description: Phandle to vdd-io regulator device node.
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qcom,dsi-phy-regulator-ldo-mode:
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type: boolean
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description: Indicates if the LDO mode PHY regulator is wanted.
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required:
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- compatible
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- reg
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- reg-names
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- vddio-supply
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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dsi-phy@fd922a00 {
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compatible = "qcom,dsi-phy-28nm-lp";
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reg = <0xfd922a00 0xd4>,
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<0xfd922b00 0x2b0>,
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<0xfd922d80 0x7b>;
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reg-names = "dsi_pll",
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"dsi_phy",
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"dsi_phy_regulator";
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#clock-cells = <1>;
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#phy-cells = <0>;
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vddio-supply = <&vddio_reg>;
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clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
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<&rpmhcc RPMH_CXO_CLK>;
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clock-names = "iface", "ref";
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};
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...
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