Commit Graph

211 Commits

Author SHA1 Message Date
Ricky CX Wu
bca0fdbb7f ARM: dts: aspeed: yosemite4: Add i2c-mux for CPLD IOE on Spider Board
Add I2C mux for CPLD IOE on Spider Board.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20241003074251.3818101-4-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Ricky CX Wu
f65648c816 ARM: dts: aspeed: yosemite4: Add i2c-mux for four NICs
Add i2c-mux on Spider board for four NICs and add the temperature sensor
and EEPROM for the NICs.

Also remove the mctp-controller property on I2C bus 15 because we need
to add the property on the I2C mux to each NIC so that the MCTP driver
will ensure that each port is configured properly before communicating
with the NICs.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20241003074251.3818101-3-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Ricky CX Wu
199d1f5b15 ARM: dts: aspeed: yosemite4: add i2c-mux for all Server Board slots
Add i2c mux to 8 slots of server board and add the io expanders and
eeprom for the slots.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20241003074251.3818101-2-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Ricky CX Wu
52ba8cb80a ARM: dts: aspeed: yosemite4: Remove IO expanders on I2C bus 13
Remove IO expanders on I2C bus 13 according to schematic change.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20241001083021.3462426-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Ninad Palsule
801938dcb8 ARM: dts: aspeed: system1: Add GPIO line names
Add following GPIO line names so that userspace can control them
- PCH related GPIOs
- FPGA related GPIOs

Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://patch.msgid.link/20241001191756.234096-4-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Ninad Palsule
9b78fd254e ARM: dts: aspeed: system1: Enable serial gpio0
Enable serial GPIO0. Set number of GPIO lines to 128 and bus frequency
to 1MHz.

Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://patch.msgid.link/20241001191756.234096-3-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Ninad Palsule
430f5675d3 ARM: dts: aspeed: system1: Bump up i2c busses freq
Bump up i2c8 and i2c15 bus frequency so that PCIe slot and FPGA runs
faster

Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://patch.msgid.link/20241001191756.234096-2-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Ricky CX Wu
ece3e20e33 ARM: dts: aspeed: yosemite4: correct the compatible string of adm1272
Remove the space in the compatible string of adm1272 to match the
pattern of compatible.

Fixes: 2b8d94f4b4 ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC")
Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Fixes: 2b8d94f4b4 ("ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC")
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://patch.msgid.link/20240927085213.331127-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Ricky CX Wu
519eada5b8 ARM: dts: aspeed: yosemite4: Add i2c-mux for Management Board
Add I2C mux for Management Board to separate the I2C bus 35 for
updating CPLD firmware and I2C bus 34 for the other devices.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240926033534.4174707-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Potin Lai
b4279b2899 ARM: dts: aspeed: catalina: update NIC1 fru address
Update NIC1 FRU EEPROM address to 0x52 based on EVT changes.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20240926-catalina-evt-dvt-system-modify-v2-3-a861daeba059@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Potin Lai
af86f3883b ARM: dts: aspeed: catalina: enable mac2
Enable mac2 in advance for DVT HW schematic.

- EVT system:
  - eth0 (mac2): no NCSI
  - eth1 (mac3): with NCSI

- DVT system:
  - eth0 (mac2): with NCSI
  - eth1 (mac3): with NCSI

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20240926-catalina-evt-dvt-system-modify-v2-2-a861daeba059@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Potin Lai
e755c62c3f ARM: dts: aspeed: catalina: move hdd board i2c mux bus to i2c5
Due to EVT hardware changes, move HDD board i2c mux bus from i2c30 to i2c5.

Signed-off-by: Potin Lai <potin.lai@quantatw.com>
Link: https://patch.msgid.link/20240926-catalina-evt-dvt-system-modify-v2-1-a861daeba059@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:59 +10:30
Ricky CX Wu
98e5f6ca17 ARM: dts: aspeed: yosemite4: revise flash layout to 128MB
Revise flash layout to 128MB since we are using 1GB flash memory in our
project.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240924094430.272074-3-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Ricky CX Wu
b7b71409c9 ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode
Revise quad mode to dual mode to keep the write protect feature for the
SPI flash because the WP pin is the same pin with IO2 pin in quad mode.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240924094430.272074-2-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Yang Chen
7161ec8386 ARM: dts: aspeed: minerva: add fru device for other blades
The Minerva platform has 16 compute blades and 6 network blades, each with
an EEPROM that can be operated by the CMM. This commit adds support for
each FRU.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20240924140215.2484170-4-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Yang Chen
a9fecf61a8 ARM: dts: aspeed: minerva: change the i2c mux number for FCBs
Change the i2c mux channel to match the correct fan board location.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20240924140215.2484170-3-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Yang Chen
f739d336cb ARM: dts: aspeed: minerva: Revise the SGPIO line name
Modify the SGPIO line names sent from the CMM CPLD in the DVT version and
map the blade and FCB numbers to match the silkscreen labels on the rack as
follows:

1. Change the compute blade numbering from 0-15 to 1-16.
2. Change the network blade numbering from 0-5 to 1-6.
3. Update the FCB numbering from TOP0/1, MID0/1, and BOT0/1 to FCB1-6.
4. Revise the SGPIO line name for DVT changed.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20240924140215.2484170-2-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Ricky CX Wu
23cdf46845 ARM: dts: aspeed: yosemite4: Enable spi-gpio setting for TPM
Enable spi-gpio setting for TPM device in yosemite4.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240920080227.711691-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Ricky CX Wu
3f132cafb5 ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode on Spider Board
Revise adc128d818 adc mode on Spider Board according to schematic.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://patch.msgid.link/20240920085007.1076174-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Potin Lai
28805afcc7 ARM: dts: aspeed: catalina: add i2c-mux-idle-disconnect to all mux
Add the `i2c-mux-idle-disconnect` property to all i2c-mux nodes to
ensure proper behavior when switching between multiple I2C buses.
This avoids potential confusion caused by device addresses appearing on
multiple buses when they are not actively selected.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://patch.msgid.link/20240920-catalina-i2c-mux-fix-2-v1-1-66cce7c54188@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Ricky CX Wu
8e0f79624e ARM: dts: aspeed: yosemite4: Add gpio pca9506 for CPLD IOE
We use CPLD to emulate gpio pca9506 I/O expander on each server
boards.
Therefore, add pca9506 to probe driver for the CPLD I/O expander.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240910054751.2943217-3-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Ricky CX Wu
2c6cdf5690 ARM: dts: aspeed: yosemite4: Revise to use adm1281 on Medusa board
Revise to use adm1281 for HSC according to the hardware design change.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240910054751.2943217-2-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Manojkiran Eda
de43a841c9 ARM: dts: aspeed: Enable PECI and LPC snoop for IBM System1
This patch enables the PECI interface and configures the LPC Snoop for
ports 0x80 and 0x81 in the ASPEED BMC for IBM System1.

Signed-off-by: Manojkiran Eda <manojkiran.eda@gmail.com>
Link: https://patch.msgid.link/20240918-dts-aspeed-system1-peci-snoop-v2-1-2d4d17403670@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Ricky CX Wu
931462b385 ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555
Enable interrupt setting and add GPIO line name for pca9555 for the I/O
expanders on Medusa board.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240918101742.1346788-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Eddie James
26392e143f ARM: dts: aspeed: Fix Rainier and Blueridge GPIO LED names
Blueridge LED names to include the "led-" prefix as is proper.
Rainier should match for ease of application design. In addition,
the gpio line name ought to match.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://patch.msgid.link/20240917162100.1386130-1-eajames@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Chanh Nguyen
561b108992 ARM: dts: aspeed: mtmitchell: Add gpio line names for io expanders
Add below gpio line names to io expanders for more platform features.

- ext-vref-sel
- presence-hdd-bp5-n
- presence-hdd-bp6-n
- bmc-ocp0-en-n
- bmc-ocp1-en-n
- bmc-riser-en-n
- gpi0, gpi1

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://patch.msgid.link/20240905063521.319416-3-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Chanh Nguyen
0c1bb3df1b ARM: dts: aspeed: mtmitchell: Add I2C FAN controllers
Add the MAX31790 nodes as i2c fan controllers.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://patch.msgid.link/20240905063521.319416-2-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:58 +10:30
Peter Yin
cb3f397b17 ARM: dts: aspeed: Harma: revise sgpio line name
power-card-enable
power-fault-n
power-hsc-good
power-chassis-good

asic0-card-type-detection0-n
asic0-card-type-detection1-n
asic0-card-type-detection2-n
presence-cmm

uart-switch-button
uart-switch-lsb
uart-switch-msb

reset-control-cmos-clear

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20240909080459.3457853-3-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:57 +10:30
Peter Yin
ed024f2894 ARM: dts: aspeed: Harma: add rtc device
Add "nxp,pcf8563" device and the slave address is 0x51.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20240909080459.3457853-2-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:57 +10:30
Ricky CX Wu
85c5239980 ARM: dts: aspeed: yosemite4: Enable adc15
Enable Yosemite4 adc15 config for monitoring P3V_BAT_SCALED.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240910022236.1564291-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:57 +10:30
Ricky CX Wu
a20a18dd1d ARM: dts: aspeed: yosemite4: Enable watchdog2
Enable watchdog2 setting for yosemite4 system.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://patch.msgid.link/20240910080951.3568594-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:57 +10:30
Ricky CX Wu
6f7c8ff47b ARM: dts: aspeed: yosemite4: Change eeprom for Medusa Board
Change eeprom on Medusa Board to AT24C128 according to hardware change.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240910084109.3585923-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:57 +10:30
Ricky CX Wu
528421afb1 ARM: dts: aspeed: yosemite4: Remove temperature sensors on Medusa Board
Remove two temperature sensors on Medusa Board according to hardware
change.

Signed-off-by: Ricky CX Wu <ricky.cx.wu.wiwynn@gmail.com>
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://patch.msgid.link/20240910085701.3595248-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:57 +10:30
Rob Herring (Arm)
2d9e29622e ARM: dts: aspeed: Fix at24 EEPROM node names
at24.yaml defines the node name for at24 EEPROMs as 'eeprom'.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20240910215929.823913-1-robh@kernel.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13 15:46:56 +10:30
Arnd Bergmann
72e68896a7 ASPEED device tree updates for 6.12
- New machines
 
   * IBM P11 AST2600 BMC machines, named Blueridge and Fuji
   * Meta's Catalina AST2600 BMC
 
  - Updates to harma, minerva, mtmitchell, mtjade, system1, SPC621D8HM3
 
  - Various changes to the dtsi to keep the YAML checker happy
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Merge tag 'aspeed-6.12-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt

ASPEED device tree updates for 6.12

 - New machines

  * IBM P11 AST2600 BMC machines, named Blueridge and Fuji
  * Meta's Catalina AST2600 BMC

 - Updates to harma, minerva, mtmitchell, mtjade, system1, SPC621D8HM3

 - Various changes to the dtsi to keep the YAML checker happy

* tag 'aspeed-6.12-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: (52 commits)
  ARM: dts: aspeed: catalina: Update io expander line names
  ARM: dts: aspeed: catalina: Add pdb cpld io expander
  ARM: dts: aspeed: harma: Remove pca9546
  ARM: dts: aspeed: harma: Fix spi-gpio dtb_check warnings
  ARM: dts: aspeed: harma: Enable mctp controller
  ARM: dts: aspeed: harma: Add temperature device
  ARM: dts: aspeed: harma: Add fru device
  ARM: dts: aspeed: harma: Remove multi-host property
  ARM: dts: aspeed: harma: Add power monitor xdp710
  ARM: dts: aspeed: harma: Add ina238
  ARM: dts: aspeed: harma: Add sgpio name
  ARM: dts: aspeed: harma: Add VR devices
  ARM: dts: aspeed: harma: Revise hsc chip
  ARM: dts: aspeed-g6: Drop cells properties from ethernet nodes
  ARM: dts: aspeed-g6: Use generic 'ethernet' for ftgmac100 nodes
  ARM: dts: aspeed: Clean up AST2500 pinctrl properties
  ARM: dts: aspeed: Remove undocumented XDMA nodes
  ARM: dts: aspeed: Specify required properties for sram node
  ARM: dts: aspeed: Specify correct generic compatible for CVIC
  ARM: dts: aspeed: Fix coprocessor interrupt controller node name
  ...

Link: https://lore.kernel.org/r/CACPK8XeGDUrbJ-OaxqQBR=aVVYyrKGnvT1ZKXO0vPHpsjQ_i9g@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-11 08:41:18 +00:00
Rob Herring
ef1e32cb63
ARM: dts: Fix undocumented LM75 compatible nodes
"lm75" without any vendor is undocumented. It works with the Linux
kernel since the I2C subsystem will do matches of the compatible string
without a vendor prefix to the i2c_device_id and/or driver name.

Mostly replace "lm75" with "national,lm75" as that's the original part
vendor and the compatible which matches what "lm75" matched with. In a
couple of cases the node name or compatible gives a clue to the actual
part and vendor and a more specific compatible can be used. In these
cases, it does change the variant the kernel picks.

"nct75" is an OnSemi part which is compatible with TI TMP75C based on
a comparison of the OnSemi NCT75 datasheet and configuration the Linux
driver uses. Adding an OnSemi compatible would be an ABI change.

"nxp,lm75" is most likely an NXP part. Alexander Stein says the i.MX53
boards are a NXP LM75A as well. NXP makes a LM75A and LM75B. Both are
11-bit resolution and 100ms sample time. The "national,lm75a" is
9-bit, so "national,lm75b" is the closest match for both NXP variants.

While we're here, fix the node names to use the generic name
"temperature-sensor".

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com> # am335x-nano.dts
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx53-mba53.dts, imx53-tqma53.dtsi
Link: https://lore.kernel.org/r/20240816164717.1585629-1-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-05 14:37:43 +00:00
Potin Lai
b4c322c278 ARM: dts: aspeed: catalina: Update io expander line names
io_expander7
- P1-5: MCU_GPIO
- P1-6: MCU_RST_N
- P1-7: MCU_RECOVERY_N

io_expander8
- P1-5: SEC_MCU_GPIO
- P1-6: SEC_MCU_RST_N
- P1-7: SEC_MCU_RECOVERY_N

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://lore.kernel.org/r/20240823-catalina-ioexp-update-v1-2-4bfd8dad819c@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-27 13:00:49 +09:30
Potin Lai
0bba315e04 ARM: dts: aspeed: catalina: Add pdb cpld io expander
Add more IO expanders which are emulated by the PDB CPLD.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Link: https://lore.kernel.org/r/20240823-catalina-ioexp-update-v1-1-4bfd8dad819c@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-27 13:00:34 +09:30
Peter Yin
d212c55cc8 ARM: dts: aspeed: harma: Remove pca9546
Remove pca9546 device from i2c bus 9.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-12-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:09:43 +09:30
Peter Yin
7fa1118485 ARM: dts: aspeed: harma: Fix spi-gpio dtb_check warnings
Revise spi-gpio node and property name and remove max-ngpios.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-11-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:09:43 +09:30
Peter Yin
c8d75c1836 ARM: dts: aspeed: harma: Enable mctp controller
Enable the mctp controller in i2c9.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-10-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:09:43 +09:30
Peter Yin
43a688a9e9 ARM: dts: aspeed: harma: Add temperature device
Add temperature device in i2c0 and i2c2.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-9-peteryin.openbmc@gmail.com
[andrew: Fixed 'deivce' typo in commit message]
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:09:43 +09:30
Peter Yin
687d7e1804 ARM: dts: aspeed: harma: Add fru device
Add Aegis fru device and gpio expander device in bus 11.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-8-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:09:43 +09:30
Peter Yin
bdf27467ba ARM: dts: aspeed: harma: Remove multi-host property
Harma is single host, so remove multi-host property.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-7-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:09:42 +09:30
Peter Yin
f0ad6cc9f6 ARM: dts: aspeed: harma: Add power monitor xdp710
Add HSC xdp710 device in i2c4.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-6-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:09:37 +09:30
Peter Yin
7d0597019a ARM: dts: aspeed: harma: Add ina238
Add INA238 power monitor for Harma fan board.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-5-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:08:11 +09:30
Peter Yin
aeebc5a412 ARM: dts: aspeed: harma: Add sgpio name
Add power-chassis-control and power-chassis-power for phosphor-power.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-4-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:08:11 +09:30
Peter Yin
b44b6e3f40 ARM: dts: aspeed: harma: Add VR devices
Add isl69260, xdpe152c4 devices.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-3-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:08:07 +09:30
Peter Yin
16d6671033 ARM: dts: aspeed: harma: Revise hsc chip
Revise HSC chip name and address to match LTC4287.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240801160136.1281291-2-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:37 +09:30
Andrew Jeffery
8e778b7ec9 ARM: dts: aspeed-g6: Drop cells properties from ethernet nodes
These are not specified in the binding and produce warnings such as
the following:

 arch/arm/boot/dts/aspeed/aspeed-g6.dtsi:254.27-262.5: Warning
 (avoid_unnecessary_addr_size): /ahb/ethernet@1e670000: unnecessary
 #address-cells/#size-cells without "ranges", "dma-ranges" or child
 "reg" property

 arch/arm/boot/dts/aspeed/aspeed-g6.dtsi:264.27-272.5: Warning
 (avoid_unnecessary_addr_size): /ahb/ethernet@1e690000: unnecessary
 #address-cells/#size-cells without "ranges", "dma-ranges" or child
 "reg" property

 arch/arm/boot/dts/aspeed/aspeed-ast2600-evb-a1.dtb: ethernet@1e660000:
 Unevaluated properties are not allowed ('#address-cells', '#size-cells'
 were unexpected)

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-7-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:16 +09:30
Andrew Jeffery
342329720a ARM: dts: aspeed-g6: Use generic 'ethernet' for ftgmac100 nodes
Squash warnings such as:

 arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dtb: ftgmac@1e670000:
 $nodename:0: 'ftgmac@1e670000' does not match '^ethernet(@.*)?$'

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-6-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
27df8e2803 ARM: dts: aspeed: Clean up AST2500 pinctrl properties
Many platforms were specifying the `aspeed,external-nodes` property
required by the AST2500 pinctrl. However, its been specified in the
pinctrl node directly in aspeed-g5.dtsi for quite a long time now.

Remove the unnecessary override from all relevant platform dts files.

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-5-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
1c8b6faf88 ARM: dts: aspeed: Remove undocumented XDMA nodes
There's no binding defined for the device, so remove it from the
devicetrees until someone has the motivation to write one.

Squash warnings such as:

 arch/arm/boot/dts/aspeed/aspeed-ast2500-evb.dtb:
 /ahb/apb@1e6e0000/xdma@1e6e7000: failed to match any schema with
 compatible: ['aspeed,ast2500-xdma']

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-4-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
df27436954 ARM: dts: aspeed: Specify required properties for sram node
Squash warnings such as:

```
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: '#address-cells' is a required property
        from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: '#size-cells' is a required property
        from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: 'ranges' is a required property
        from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
```

Fixes: d44a1138cd ("arm/dts: Add Aspeed ast2400 device tree")
Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-3-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
e5d7d18789 ARM: dts: aspeed: Specify correct generic compatible for CVIC
The ASPEED CVIC binding documents `aspeed,cvic` as the required generic
compatible, but the devicetrees contained `aspeed-cvic`. Update the
devictrees to use `aspeed,cvic` as documented and as required by
the driver implementation. Presumably the bug was the result of some
incoherent thoughts while removing the SoC name at the time of
writing.

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-2-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
ae8fd56184 ARM: dts: aspeed: Fix coprocessor interrupt controller node name
Squash schema warnings such as:

 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb:
 copro-interrupt-controller@1e6c2000: $nodename:0:
 'copro-interrupt-controller@1e6c2000' does not match
 '^interrupt-controller(@[0-9a-f,]+)*$'

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-1-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Chanh Nguyen
6177ea49c6 ARM: dts: aspeed: mtmitchell: Add LEDs
Add LED nodes as the gpio-leds devices. They are led-bmc-ready,
led-sw-heartbeat, led-identify, led-fault, led-fan-fault, led-psu-fault

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-6-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Chanh Nguyen
f689462fcd ARM: dts: aspeed: mtmitchell: Enable i2c10 and i2c15
Enable the BMC I2C10.
Enable the BMC I2C15 and add the GPIO Expander as a child node.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-5-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Chanh Nguyen
0aa7ca5e8f ARM: dts: aspeed: mtmitchell: Add Riser cards
Define the I2C alias ports for the riser cards.

Add the i2c muxes to switch to the i2c alias ports and
the eeprom nodes to read the FRU contents on riser cards.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-4-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Chanh Nguyen
f90607680b ARM: dts: aspeed: mtmitchell: Add I2C temperature sensor alias ports
Add the I2C alias ports to read temperature sensors via channels
of the I2C muxes.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-3-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Chanh Nguyen
326bed426c ARM: dts: aspeed: mtjade, mtmitchell: Add OCP temperature sensors
Define I2C alias ports from I2C Switch 0x70 at BMC I2C5.

Add the tmp421 sensors via the I2C alias ports as OCP device
temperature sensors.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-2-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Potin Lai
ac552a63bb ARM: dts: aspeed: catalina: add Meta Catalina BMC
Add linux device tree entry for Meta(Facebook) Catalina compute-tray
BMC using AT2600 SoC.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240805-potin-catalina-dts-v7-2-286bfd2ab93b@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Yang Chen
e087adb102 ARM: dts: aspeed: minerva: add host0-ready pin
Add host0-ready pin for phosphor-state-manager.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240711130501.2900301-2-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Yang Chen
bd14a21d08 ARM: dts: aspeed: minerva: Add spi-gpio
Add spi-gpio for TPM device.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-18-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Yang Chen
9ac7385c0e ARM: dts: aspeed: minerva: add ltc4287 device
Enable LTC4287 device on i2c-0.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240626130332.929534-17-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Yang Chen
527cb309bf ARM: dts: aspeed: minerva: remove unused power device
Remove unused power device.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240626130332.929534-16-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
99d1feddda ARM: dts: aspeed: minerva: Switch the i2c bus number
Switch the i2c bus number to map the i2c tag according to the hardware
design.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-15-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
d0d21a66c8 ARM: dts: aspeed: minerva: revise sgpio line name
Revise the SGPIO naming to mapping the SGPIO from the CPLD.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-14-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
b9de5a3f82 ARM: dts: aspeed: minerva: add power monitor xdp710
Add HSC xdp710 on i2c bus0.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-13-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
629e75e5dc ARM: dts: aspeed: minerva: add tmp75 sensor
Add tmp75 sensor on the i2c bus connect to each fan board.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-12-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
469e35cc2f ARM: dts: aspeed: minerva: enable ehci0 for USB
Enable ehci0 for USB.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-11-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
6fcb6ad68c ARM: dts: aspeed: minerva: add linename of two pins
Add linename of two pins for power good/control.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-10-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
c0bb01e26f ARM: dts: aspeed: minerva: Add adc sensors for fan board
Add ina238 support to read the sensors in front of fans.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-9-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
90098bb352 ARM: dts: aspeed: minerva: Define the LEDs node name
Define the LEDs node name.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-8-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
6b843a98e7 ARM: dts: aspeed: minerva: remove unused bus and device
Remove unused bus and device.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-7-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
183d8a5973 ARM: dts: aspeed: minerva: enable mdio3
Change usage of I2C bus 11 to mdio3.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-6-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
fff89fba6f ARM: dts: aspeed: minerva: change RTC reference
Change the RTC reference from on-chip to externel on i2c bus 9 and address
is 0x51.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-5-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
adb385a333 ARM: dts: aspeed: minerva: add eeprom on i2c bus
Add eeprom on the i2c-9 address 0x50 and i2c-15 address 0x56.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-4-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
606fe7e549 ARM: dts: aspeed: minerva: change aliases for uart
Change and add aliases name for uart interface.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-3-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
931f133325 ARM: dts: aspeed: minerva: change the address of tmp75
Revise the address of tmp75 on I2C bus 1 from 0x48 to 0x4f due to design
change.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-2-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:11 +09:30
Ninad Palsule
995d8fe034 ARM: dts: aspeed: System1: Updates to BMC board
- Changed temperature sensor monitor chip from tmp423 to tmp432

Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20240605160604.2135840-1-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Rafał Miłecki
76c5533925 ARM: dts: aspeed: convert ASRock SPC621D8HM3 NVMEM content to layout syntax
Use cleaner (and non-deprecated) bindings syntax. See commit
bd912c991d ("dt-bindings: nvmem: layouts: add fixed-layout") for
details.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Zev Weiss <zev@bewilderbeest.net>
Link: https://lore.kernel.org/r/20240520063044.4885-1-zajec5@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Eddie James
fdc26e0560 ARM: dts: aspeed: Add IBM P11 Fuji BMC system
Add the device tree for the new BMC system. The Fuji is a P11
system with eight processors.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240522192524.3286237-17-eajames@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Eddie James
787d4cbff0 ARM: dts: aspeed: Add IBM P11 Blueridge 4U BMC system
The 4U Blueridge is identical to the Blueridge system but has two extra
power supplies.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240522192524.3286237-16-eajames@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Eddie James
fe1d09efd2 ARM: dts: aspeed: Add IBM P11 Blueridge BMC system
Add the device tree for the new BMC system. The Blueridge is a
P11 system with four processors.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240522192524.3286237-15-eajames@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Eddie James
e09e75d5c6 ARM: dts: aspeed: Add IBM P11 FSI devices
Add the P11 FSI device tree for use in upcoming BMC systems.
Unlike P10, there is no system with only two processors, so
only the quad processor FSI layout is necessary.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240522192524.3286237-14-eajames@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Rob Herring (Arm)
11afaf16a6 arm: dts: aspeed: Use standard 'i2c' bus node name
The standard node name for I2C buses is 'i2c'.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240531193115.3814887-1-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-06-23 14:20:35 +02:00
Zev Weiss
c44211af1a ARM: dts: aspeed: Add ASRock E3C256D4I BMC
Like the E3C246D4I, this is a reasonably affordable off-the-shelf
mini-ITX AST2500/Xeon motherboard with good potential as an OpenBMC
development platform.  Booting the host requires a modicum of eSPI
support that's not yet in the mainline kernel, but most other basic
BMC functionality is available with this device-tree.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Link: https://lore.kernel.org/r/20240502002836.17862-8-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-05-02 17:57:16 +09:30
Kelly Hung
d8bdd1e8ac ARM: dts: aspeed: x4tf: Add dts for asus x4tf project
Base on aspeed-g6.dtsi and can boot into BMC console.

Signed-off-by: Kelly Hung <ppighouse@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20240430045853.3894633-3-Kelly_Hung@asus.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-05-01 11:51:32 +09:30
Tao Ren
1bd612936b ARM: dts: aspeed: Remove Facebook Cloudripper dts
Remove Facebook Cloudripper dts because the switch platform is not
actively maintained (all the units are deprecated).

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://lore.kernel.org/r/20240411045622.7915-1-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
262fa5540a ARM: dts: aspeed: drop unused ref_voltage ADC property
Aspeed ADC "ref_voltage" property is neither documented nor used.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
10182a1259 ARM: dts: aspeed: harma: correct Mellanox multi-host property
"mlx,multi-host" is using incorrect vendor prefix and is not documented.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
f956245e4b ARM: dts: aspeed: yosemitev2: correct Mellanox multi-host property
"mlx,multi-host" is using incorrect vendor prefix and is not documented.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
d043f805c6 ARM: dts: aspeed: yosemite4: correct Mellanox multi-host property
"mlx,multi-host" is using incorrect vendor prefix and is not documented.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
1a37b63562 ARM: dts: aspeed: greatlakes: correct Mellanox multi-host property
"mlx,multi-host" is using incorrect vendor prefix and is not documented.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Renze Nicolai
c61838aa45 ARM: dts: aspeed: Modify I2C bus configuration
Enable I2C bus 8 which is exposed on the IPMB_1 connector on the X570D4U
mainboard.

Additionally adds a descriptive comment to I2C busses 1 and 5.

Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Renze Nicolai
62429c485a ARM: dts: aspeed: Disable unused ADC channels for Asrock X570D4U BMC
Additionally adds labels describing the ADC channels.

Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Renze Nicolai
3af11cbbb1 ARM: dts: aspeed: Modify GPIO table for Asrock X570D4U BMC
Restructure GPIO table to fit maximum line length.

Fix mistakes found while working on OpenBMC userland configuration and
based on probing the board.

Schematic for this board is not available. Because of this the choice
was made to use a descriptive method for naming the GPIOs.

 - Push-pull outputs start with output-*
 - Open-drain outputs start with control-*
 - LED outputs start with led-*
 - Inputs start with input-*
 - Button inputs start with button-*
 - Active low signals end with *-n

Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Delphine CC Chiu
e0e5ed990b ARM: dts: aspeed: yosemite4: set bus13 frequency to 100k
Since the ocp debug card only supports 100k, the bus is also set to 100k.

Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
[AJ: Fixed fuzz due to prior IPMB patch]
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Eddie James
48286e1f07 ARM: dts: Aspeed: Bonnell: Fix NVMe LED labels
The PCA chip for the NVMe LEDs is wired up backwards, so correct
the device tree labels.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30