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336 Commits
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4ad9a801a3 |
dt-bindings: memory-controllers: mediatek,smi-larb: add mt8365
Add binding description for mediatek,mt8365-smi-larb Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230407-smi-driver-v2-3-8da6683cdb5c@baylibre.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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67025255ee |
dt-bindings: memory-controllers: mediatek,smi-common: add mt8365
Add binding description for mediatek,mt8365-smi-common Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230407-smi-driver-v2-2-8da6683cdb5c@baylibre.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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e62fc18213 |
dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas
Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present. Add unevaluatedProperties or additionalProperties as appropriate, and then add any missing properties flagged by the addition. Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Lee Jones <lee@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230124230228.372305-1-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> |
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dc8ea9204b |
dt-bindings: move cache controller bindings to a cache directory
There's a bunch of bindings for (mostly l2) cache controllers scattered to the four winds, move them to a common directory. I renamed the freescale l2cache.txt file, as while that might make sense when the parent dir is fsl, it's confusing after the move. The two Marvell bindings have had a "marvell," prefix added to match their compatibles. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230330173255.109731-1-conor@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> |
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69d170c4c2 |
dt-bindings: memory-controller: Drop unneeded quotes
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230331182119.1899919-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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8395d932d2 |
Devicetree updates for v6.3:
DT core: - Add node lifecycle unit tests - Add of_property_present() helper aligned with fwnode API - Print more information on reserved regions on boot - Update dtc to upstream v1.6.1-66-gabbd523bae6e - Use strscpy() to instead of strncpy() in DT core - Add option for schema validation on %.dtb targets Bindings: - Add/fix support for listing multiple patterns in DT_SCHEMA_FILES - Rework external memory controller/bus bindings to properly support controller specific child node properties - Convert loongson,ls1x-intc, fcs,fusb302, sil,sii8620, Rockchip RK3399 PCIe, Synquacer I2C, and Synquacer EXIU bindings to DT schema format - Add RiscV SBI PMU event mapping binding - Add missing contraints on Arm SCMI child node allowed properties - Add a bunch of missing Socionext UniPhier glue block bindings and example fixes - Various fixes for duplicate or conflicting type definitions on DT properties -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmP1dxgACgkQ+vtdtY28 YcOkBw//RU8EHTznVRBSbLbolpMPLVF4CGmWeE9bxLTZWIUaSG1NyhQgyKmzGqCR nsu/g14y3ZCrr4wkNvygWjumsuKu+uwMY0eQtEXEvpb47NBR/nhFaZ8/DWp2TeAr INizwgr1gc1l3n8cuTL8OBIsu37iNEDVrUuTkcJCdhJkTsEMLK0dA82uBEIWWGPR dWvhNFjplrCkzycfdbzTG4LMgzmtJ5RtVMT61FgwDd04UtBEOeB6wR3HME0UftG0 XxpzTtskMDiqEgzFFI3tZr82u3SrDzYPjeJVQkZC3VigV+s/ZW1Yh2t7/NH9negl fsidcNvFBAQFLIPY1QT+wJj3h2jmVThTKUjXo7KrmPgC1gJMaKrMsqQfcI/uqHm3 xFd+Vr/nspIBuuAth+04hdb0sBpvyYaEHoRwPWSWXTdNG7O50pZT5k+e0Lg/jjkM LmL79yVDPE5hFyH1TfYdUMb5Xn3hui//UUvLaTK0F1AjdEYIvUYchFi5H/Vg7szr +qGraGMH5fLyNjvI/X8K1ajKNa0xUAKK9JxqM308tD6tMWryZyF0MWD1sjPsvl7T wBm2fjGaEjapJ7vyywYyuZu3WpTY0eUtOGYIQQ6F+4Q/1h1aj4SeeEGmzZxvOivB CoWXpYkH/HPoAv+EwWXfGPV4pqxY8L3ZnzV13NcGSvE7Ha7+glo= =ywsL -----END PGP SIGNATURE----- Merge tag 'devicetree-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Add node lifecycle unit tests - Add of_property_present() helper aligned with fwnode API - Print more information on reserved regions on boot - Update dtc to upstream v1.6.1-66-gabbd523bae6e - Use strscpy() to instead of strncpy() in DT core - Add option for schema validation on %.dtb targets Bindings: - Add/fix support for listing multiple patterns in DT_SCHEMA_FILES - Rework external memory controller/bus bindings to properly support controller specific child node properties - Convert loongson,ls1x-intc, fcs,fusb302, sil,sii8620, Rockchip RK3399 PCIe, Synquacer I2C, and Synquacer EXIU bindings to DT schema format - Add RiscV SBI PMU event mapping binding - Add missing contraints on Arm SCMI child node allowed properties - Add a bunch of missing Socionext UniPhier glue block bindings and example fixes - Various fixes for duplicate or conflicting type definitions on DT properties" * tag 'devicetree-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (66 commits) dt-bindings: regulator: Add mps,mpq7932 power-management IC of: dynamic: Fix spelling mistake "kojbect" -> "kobject" dt-bindings: drop Sagar Kadam from SiFive binding maintainership dt-bindings: sram: qcom,imem: document sm8450 dt-bindings: interrupt-controller: convert loongson,ls1x-intc.txt to json-schema dt-bindings: arm: Add Cortex-A715 and X3 of: dynamic: add lifecycle docbook info to node creation functions of: add consistency check to of_node_release() of: do not use "%pOF" printk format on node with refcount of zero of: unittest: add node lifecycle tests of: update kconfig unittest help of: add processing of EXPECT_NOT to of_unittest_expect of: prepare to add processing of EXPECT_NOT to of_unittest_expect of: Use preferred of_property_read_* functions of: Use of_property_present() helper of: Add of_property_present() helper of: reserved_mem: Use proper binary prefix dt-bindings: Fix multi pattern support in DT_SCHEMA_FILES of: reserved-mem: print out reserved-mem details during boot dt-bindings: serial: restrict possible child node names ... |
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33887fce47 |
dt-bindings: intel,ixp4xx-expansion-bus: split out peripheral properties
The properties of devices in IXP4xx expansion bus need to be also applied to actual devices' bindings. Prepare for this by splitting them to separate intel,ixp4xx-expansion-peripheral-props binding, just like other memory-controller peripheral properties. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20230206092624.22922-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
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c67ea7d22e |
dt-bindings: edac: Add bindings for Xilinx ZynqMP OCM
Add bindings for Xilinx ZynqMP OCM controller. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Co-developed-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230104084512.1855243-2-sai.krishna.potthuri@amd.com |
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00f2a08cd7 |
dt-bindings: memory-controllers: ti,gpmc: fix typo in description
Fix typo where 'GPMC driver implements an interrupt controller' instead of 'and interrupt controller' Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Link: https://lore.kernel.org/r/20221222182309.575069-1-colin.foster@in-advantage.com Signed-off-by: Rob Herring <robh@kernel.org> |
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84e85359f4 |
dt-bindings: drop redundant part of title (end, part three)
The Devicetree bindings document does not have to say in the title that it is a "binding", but instead just describe the hardware. Drop trailing "bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> # ROHM Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media Acked-by: Sebastian Reichel <sre@kernel.org> # power Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # cpufreq Link: https://lore.kernel.org/r/20221216163815.522628-7-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
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a612130ca1 |
dt-bindings: drop redundant part of title (end)
The Devicetree bindings document does not have to say in the title that it is a "Devicetree binding", but instead just describe the hardware. Drop trailing "Devicetree bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[tT]ree [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[nN]ode [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD][tT] [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # IIO Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media Acked-by: Sebastian Reichel <sre@kernel.org> # power Link: https://lore.kernel.org/r/20221216163815.522628-5-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
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9d94e28505 |
dt-bindings: memory-controllers: ti,gpmc-child: drop redundant part of title
The Devicetree bindings document does not have to say in the title that it is a "Devicetree binding", but instead just describe the hardware. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Link: https://lore.kernel.org/r/20221216163815.522628-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org> |
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1f1e46b83b |
dt-bindings: memory-controllers: ti,gpmc: add wait-pin polarity
The GPMC controller has the ability to configure the polarity for the wait pin. The current properties do not allow this configuration. This binding directly configures the WAITPIN<X>POLARITY bit in the GPMC_CONFIG register by setting the "ti,wait-pin-polarity" dt-property. Signed-off-by: Benedikt Niedermayr <benedikt.niedermayr@siemens.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20221102133047.1654449-3-benedikt.niedermayr@siemens.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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de67fa80c6 |
dt-bindings: memory-controllers: arm,pl353-smc: Extend to support 'arm,pl354' SMC
Add support for the Arm PL354 static memory controller to the existing Arm PL353 binding. Both are different configurations of the same IP with support for different types of memory interfaces. The 'arm,pl354' binding has already been in use upstream for a long time in Arm development boards. The existing users have only the controller without any child devices, so drop the required address properties (ranges, #address-cells, #size-cells). The schema for 'ranges' is too constrained as the order is not important and the PL354 has 8 chipselects (And the PL353 actually has up to 8 too). The clocks aren't really correct in either case. There's 1 bus clock and then a clock for each of the 2 memory interfaces. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221021203928.286169-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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a11a5debdf |
dt-bindings: memory-controller: st,stm32: Split off MC properties
Split st,stm32-fmc2-ebi.yaml specific properties into st,stm32-fmc2-ebi-props.yaml, split memory-controller bus peripheral properties into mc-peripheral-props.yaml, reference the st,stm32-fmc2-ebi-props.yaml in mc-peripheral-props.yaml and reference the mc-peripheral-props.yaml in micrel,ks8851.yaml. This way, the FMC2 controller properties in Micrel KSZ8851MLL ethernet controller node can be properly validated. Fixes the following warning: arch/arm/boot/dts/stm32mp153c-dhcor-drc-compact.dtb: ethernet@1,0: Unevaluated properties are not allowed ('bank-width', 'st,fmc2-ebi-cs-mux-enable', ... 'st,fmc2-ebi-cs-write-data-hold-ns' were unexpected) Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20220928181944.194808-1-marex@denx.de [krzk: trim warning message] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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4985a54552 |
dt-bindings: memory: Add jedec,lpddrX-channel binding
This patch adds a new device tree binding for an LPDDR channel to serve as a top-level organizing node for LPDDR part nodes nested below it. An LPDDR channel needs to have an "io-width" property to describe its width (this is important because this width does not always match the io-width of the part number, indicating that multiple parts are wired in parallel on the same channel), as well as one or more nested "rank@X" nodes. Those represent information about the individual ranks of each LPDDR part connected on that channel and should match the existing "jedec,lpddrX" bindings for individual LPDDR parts. New platforms should be using this node -- the existing practice of providing a raw, toplevel "jedec,lpddrX" node without indication of how many identical parts are in the system should be considered deprecated. Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-4-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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a500528fb3 |
dt-bindings: memory: Add jedec,lpddr4 and jedec,lpddr5 bindings
This patch adds bindings for LPDDR4 and LPDDR5 memory analogous to the existing bindings for LPDDR2 and LPDDR3. For now, the new types are only needed for topology description, so other properties like timing parameters are omitted. They can be added later if needed. Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-3-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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686fe63b22 |
dt-bindings: memory: Add numeric LPDDR compatible string variant
This patch allows a new kind of compatible string for LPDDR parts in the device tree bindings, in addition to the existing hardcoded <vendor>,<part-number> strings. The new format contains manufacturer and part (revision) information in numerical form, such as lpddr3-ff,0201 for an LPDDR3 part with manufacturer ID ff and revision ID 0201. This helps cases where LPDDR parts are probed at runtime by boot firmware and cannot be matched to hardcoded part numbers, such as the firmware on the qcom/sc7280-herobrine boards does (which supports 4 different memory configurations at the moment, and more are expected to be added later at a point where the boot firmware can no longer be updated to specifically accommodate them). Signed-off-by: Julius Werner <jwerner@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-2-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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b7178cd53f |
dt-bindings: memory: Factor out common properties of LPDDR bindings
The bindings for different LPDDR versions mostly use the same kinds of properties, so in order to reduce duplication when we're adding support for more versions, this patch creates a new lpddr-props subschema that can be referenced by the others to define these common parts. (This will consider a few smaller I/O width and density numbers "legal" for LPDDR3 that are usually not used there, but this should be harmless.) Signed-off-by: Julius Werner <jwerner@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-1-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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fad9489abf |
dt-bindings: memory: renesas,rpc-if: Document R-Car V4H support
Document support for the SPI Multi I/O Bus Controller (RPC-IF) in the R-Car V4H SoC. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/c268cb4497cbe79773bb6568f36c37adc6fb5bbe.1665582645.git.geert+renesas@glider.be Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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97c742d92f |
dt-bindings: memory-controller: st,stm32: Fix st,fmc2_ebi-cs-write-address-setup-ns
The property st,fmc2_ebi-cs-write-address-setup-ns should really be st,fmc2-ebi-cs-write-address-setup-ns (there is underscore _ between fmc2 and ebi and there should be a dash - instead). This is a remnant from conversion of old non-upstream bindings. Fix it. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220926222003.527171-1-marex@denx.de |
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706eacadd5 |
Devicetree updates for v6.1:
DT core: - Fix node refcounting in of_find_last_cache_level() - Constify device_node in of_device_compatible_match() - Fix 'dma-ranges' handling in bus controller nodes - Fix handling of initrd start > end - Improve error reporting in of_irq_init() - Taint kernel on DT unittest running - Use strscpy instead of strlcpy - Add a build target, dt_compatible_check, to check for compatible strings used in kernel sources against compatible strings in DT schemas. - Handle DT_SCHEMA_FILES changes when rebuilding DT bindings: - LED bindings for MT6370 PMIC - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller, mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc, and arm,versatile-sysreg to DT schema format - Add nvmem cells to u-boot,env schema - Add more LED_COLOR_ID definitions - Require 'opp-table' uses to be a node - Various schema fixes to match QEMU 'virt' DT usage - Tree wide dropping of redundant 'Device Tree Binding' in schema titles - More (unevaluated|additional)Properties fixes in schema child nodes - Drop various redundant minItems equal to maxItems -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmM7QzsACgkQ+vtdtY28 YcNMgg//eZr/y+FUyF3tE7DRRmCzbptAfRG0Ccmj6z0VM9HNmOiacnNdqGjOFHj6 CCFUHYsFJhiTwgM5MzMMZcQetrF+dZDok5HQNAkYqz5jtdcg1T0ZgrcpHcZpxfGv lpAFaDkyoWQ7BXJbgLJJFP6pZ4IDyekWjU49php5pYlmTvzLwMvYW2MYvElLJ4It tKi0XAzVyT/TrynFAOYDVO+kwZ4DDctsJM44K0LRW0e05Den9zCZDeVXik0J9l8o jMpVy5xgqAbNUe/TCj8n91nG/Cl3wiW8l8JGWPAcb3D1Em6CQlsJCGN1a/rSHUiE Pseql1ufUzpjcpTMnmdbRE/jWwJcLI2DqandxqIrEpUFmF4hlGeSviKib9qtacN0 pWC5pZgxrWvM9rHbbe2cYLozkYd8eiRo2l8hfefTopYbQ3UHa2hsU+f6vm9t0Gru vxH7BmdlI22aGlnP0jl8t84v5cpu8O4C6Zmf2B/b5xj3Tif2GTLU1aYPuX3PkqHL F9Ni+JqhnQBl1+t90PJogEFicjeyrjUO9lkKbzuoWwiJk5AgJcGck8tkBotlWYPc B59DTigELMlssYIoF4/oX8ZF1QVmws6Xc0f9/GkgCEA0bR1qdo63qPjM9FIpd1G4 9sUhxiQbPCtIMMwD1M26LGUE/C4WESL9VXjdakoMaj7ekon2vjw= =IDIz -----END PGP SIGNATURE----- Merge tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Fix node refcounting in of_find_last_cache_level() - Constify device_node in of_device_compatible_match() - Fix 'dma-ranges' handling in bus controller nodes - Fix handling of initrd start > end - Improve error reporting in of_irq_init() - Taint kernel on DT unittest running - Use strscpy instead of strlcpy - Add a build target, dt_compatible_check, to check for compatible strings used in kernel sources against compatible strings in DT schemas. - Handle DT_SCHEMA_FILES changes when rebuilding DT bindings: - LED bindings for MT6370 PMIC - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller, mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc, and arm,versatile-sysreg to DT schema format - Add nvmem cells to u-boot,env schema - Add more LED_COLOR_ID definitions - Require 'opp-table' uses to be a node - Various schema fixes to match QEMU 'virt' DT usage - Tree wide dropping of redundant 'Device Tree Binding' in schema titles - More (unevaluated|additional)Properties fixes in schema child nodes - Drop various redundant minItems equal to maxItems" * tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (62 commits) of: base: Shift refcount decrement in of_find_last_cache_level() dt-bindings: leds: Add MediaTek MT6370 flashlight dt-bindings: leds: mt6370: Add MediaTek MT6370 current sink type LED indicator dt-bindings: mailbox: Convert mtk-gce to DT schema of: base: make of_device_compatible_match() accept const device node of: Fix "dma-ranges" handling for bus controllers of: fdt: Remove unused struct fdt_scan_status dt-bindings: display: st,stm32-dsi: Handle data-lanes in DSI port node dt-bindings: timer: Add power-domains for TI timer-dm on K3 dt: Add a check for undocumented compatible strings in kernel kbuild: take into account DT_SCHEMA_FILES changes while checking dtbs dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML dt-bindings: i2c: migrate mt7621 text bindings to YAML dt-bindings: power: gpcv2: correct patternProperties dt-bindings: virtio: Convert virtio,pci-iommu to DT schema dt-bindings: timer: arm,arch_timer: Allow dual compatible string dt-bindings: arm: cpus: Add kryo240 compatible dt-bindings: display: bridge: nxp,tda998x: Convert to json-schema dt-bindings: nvmem: u-boot,env: add basic NVMEM cells dt-bindings: remoteproc: qcom,adsp: enforce smd-edge schema ... |
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ff6862c23d |
ARM: driver updates for 6.1
The drivers branch for 6.1 is a bit larger than for most releases. Most of the changes come from SoC maintainers for the drivers/soc subsystem: - A new driver for error handling on the NVIDIA Tegra 'control backbone' bus. - A new driver for Qualcomm LLCC/DDR bandwidth measurement - New Rockchip rv1126 and rk3588 power domain drivers - DT binding updates for memory controllers, older Rockchip SoCs, various Mediatek devices, Qualcomm SCM firmware - Minor updates to Hisilicon LPC bus, the Allwinner SRAM driver, the Apple rtkit firmware driver, Tegra firmware - Minor updates for SoC drivers (Samsung, Mediatek, Renesas, Tegra, Qualcomm, Broadcom, NXP, ...) There are also some separate subsystem with downstream maintainers that merge updates this way: - Various updates and new drivers in the memory controller subsystem for Mediatek and Broadcom SoCs - Small set of changes in preparation to add support for FF-A v1.1 specification later, in the Arm FF-A firmware subsystem - debugfs support in the PSCI firmware subsystem -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmM+j54ACgkQmmx57+YA GNkK1Q//fSzCHUPNTrZKJi8mRtp/32Nrpav3eorMZWltKnYbYQyhqH/LCuSZJfe/ rmGYFxsH6DHEgfHqqyzm6PNC0S4Hle6KiB5xnqXrTgqciPuSg4Fa9OMQgkbiQF6x uB2KR+TouQA3MssQh6NW4wy5XAkEqudZCSnEyOTJTmdpepZd/1Eu2Rhn8kx5AYQN pzYNGURRoirgYbO9vHMssCcpqyGNdR9SWXcOkROyd65L4LCHQ9JRh4etg7fSXP5j abWtTHSOwD8MTXOENOiNw/vyCfBX7wUoJkY2v8OUo3G/20qbOXKWPWi056gyDjVQ kJdlnnK4APtiluyBg2alEEZmJOd1iCaVP2j84EO1N4FEek2UGd/lMNOtAOJa+wbh eiE6KC5gswe+99//PdY4gB+7dRM3I0gU7FDMl9G5A4DPMEE/0bMKLKk1jR5vyYXl 6QpN2N0OlU7d16MJiP9RvWf2/xJrcQrLQcy8FKvFVWClJ9wMvBXozKrvXgji9l3I ZTW+EViQiyWmj6KbFlDZkYT+Q6YosxaogJUNrZeIaAwmwJj1oTa+M6jYRnFU6uha XxG5TrybC9JQ/BpYCTYEqb16LOYALwEm7NWmylWASUCCZclC1u35qmmVEhDyBcS9 98ePumkAwrcjmW0TZsiYXOCQWNOITuvU/Ku2t/+6Mhg+Xl44zX4= =WX9J -----END PGP SIGNATURE----- Merge tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Arnd Bergmann: "The drivers branch for 6.1 is a bit larger than for most releases. Most of the changes come from SoC maintainers for the drivers/soc subsystem: - A new driver for error handling on the NVIDIA Tegra 'control backbone' bus. - A new driver for Qualcomm LLCC/DDR bandwidth measurement - New Rockchip rv1126 and rk3588 power domain drivers - DT binding updates for memory controllers, older Rockchip SoCs, various Mediatek devices, Qualcomm SCM firmware - Minor updates to Hisilicon LPC bus, the Allwinner SRAM driver, the Apple rtkit firmware driver, Tegra firmware - Minor updates for SoC drivers (Samsung, Mediatek, Renesas, Tegra, Qualcomm, Broadcom, NXP, ...) There are also some separate subsystem with downstream maintainers that merge updates this way: - Various updates and new drivers in the memory controller subsystem for Mediatek and Broadcom SoCs - Small set of changes in preparation to add support for FF-A v1.1 specification later, in the Arm FF-A firmware subsystem - debugfs support in the PSCI firmware subsystem" * tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (149 commits) ARM: remove check for CONFIG_DEBUG_LL_SER3 firmware/psci: Add debugfs support to ease debugging firmware/psci: Print a warning if PSCI doesn't accept PC mode dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support soc: sunxi: sram: Add support for the D1 system control soc: sunxi: sram: Export the LDO control register soc: sunxi: sram: Save a pointer to the OF match data soc: sunxi: sram: Return void from the release function soc: apple: rtkit: Add apple_rtkit_poll soc: imx: add i.MX93 media blk ctrl driver soc: imx: add i.MX93 SRC power domain driver soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl soc: imx: add icc paths for i.MX8MP media blk ctrl ... |
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accc3b4a57 |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
No conflicts. Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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f6f7d870c5 |
Memory controller drivers for v6.1, part 2
Improvements in Synopsys DesignWare Universal Multi-Protocol Memory Controller Devicetree bindings. The bindings are being split into one related to Synopsys core and into quite different derivative Zynq A05 DDR Memory Controller. Extend the Synopsys bindings with additional properties to match upcoming new device support (Baikal-T1 support). -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmMxg7EQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD19vHD/9d4X2BGo+NS4CE0bmarl2Opux6FZ1EIYB0 eKNOLhDL5NvkxQ5bSCRyQ2qydZUWuVDhxOXeOKgQLJNYwFvpIuFLdc126sHzfw0S OOnwSJyAOt0Y1JrMMsZRkfB8Sn9RTN5IVTfWHWHvx8Vs+S1xd4flXn8LFDCx8Ddn 1N7yCZ3DJYSJWG/bIO0dJTE54gwMueRy8+f2xBrENhkFMf5tRWmcYyY+bOrmwm5k D1uTQMaQoUfsfOLGx+Ad+In+f2ZZN1AzC4Ych7iUoazUuUNSB76IgbUpTln3atO+ HiuA1FIzYD9/DFF4phdKtgQL61ZwE3dfmsYqGYw/7X5SNPbhOZKzNB49kyKRM2EQ FMoguTQok5ChR3l+2kqaScYQnHxfNzfXCFkKuTjQsEDgUlLPliFLtN8sNMgimcYi wAts9bLV9mVpHqIfZ/1bHRo3PfKG4jAnhKSH8VrqUyPYWY5okBTGUHjXMR1t0lOJ ehMTNdsQhj5MaBBiBFktgP8qg8fxOyFwlyE4+UCFLr5pj1h+3BxZDk3Mnkh2N5rN v7kOmc3nhQIEtv8528kGarlUtM1Ia6Wpp4Xa+OT9kH2L1zr1be7BFTSAqFEbwyPA xP8XaKXQt0jssEEE5wNM+5LTg+xFlfidPY3uSy/+HyLwwwN8qxAtDidHZN0Sh82e bjsdM9KQ0w== =SQZl -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmM0sGEACgkQmmx57+YA GNmnzg//S70oLBedGdJa7wIxu7cjv0TEsWG1EJHTX//SvcIONn6Ab3WJ0008DPI8 SRC22BIyqjmNgfBzKG9OBnFc1B9SWLAygg4x3F6/uiczoJ5bSUWAKuAlReH9mqB9 POZKPoDhgMHY9GXM5YexpCskqirlI8VjbxRVlWhQ49hY4oDceamqmPU3r+e+S5Fn nO+a2bo9YwQ5PwAPE8s95+a3R/5xmDh+5oFHpJL7h3UGRvK8kW8TtUaLJi56/EOG WNZcGRBasdqJ+YESTsBrpU4ILPqAeImiAXtGACjJG2ERecl1eWqkE5CJvfAk+ZuV GpcFyL41gHK6aFJHx7JkMpwhaEN3Q6Xn2Kajk8UW/I34IV20wD67IVpYIje33huL /dcR4IOEHQNDDH3IkcsnZK7Hy8b20dfBo13nTOjiwIiHD0QKJMgAwbz+VWS2Dglv mBN1dSPfc1Cep7Kvwg8B1P34/BpwWzGKB6gwYK3yYOt4tteJPH39B8Ltba94KGbA I4EbDNvrS1gDs1IGZcR34zziwL0SQoa2rfwUVCaCoWrsTeceDErggpW6ULDTlFtZ ca90oupzynihVgza6jqjFQnRWN38Kp5rJxDNBhLgn2DX7u81qPsGZyK2oUBOjMHS MeJHF7U7txF9KVchow8Y9UjLLuPu1owhroD3TgDnKssT7zBThRw= =1MoR -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v6.1, part 2 Improvements in Synopsys DesignWare Universal Multi-Protocol Memory Controller Devicetree bindings. The bindings are being split into one related to Synopsys core and into quite different derivative Zynq A05 DDR Memory Controller. Extend the Synopsys bindings with additional properties to match upcoming new device support (Baikal-T1 support). * tag 'memory-controller-drv-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support Link: https://lore.kernel.org/r/20220926105023.119781-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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862b19b7d4 |
dt-bindings: memory: mt7621: add syscon as compatible string
The syscon string was introduced because the mt7621 clock driver needs to
read some registers creating a regmap from the syscon. The bindings were
added before the clock driver was properly mainlined and at first the clock
driver was using ralink architecture dependent operations rt_memc_* defined
in 'arch/mips/include/asm/mach-ralink/ralink_regs.h'.
This string is already there on the memory controller node on mt7621.dtsi.
Add syscon as a constant string on the compatible property, now that memc
became a syscon. Update the example accordingly.
Fixes:
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5514acb0dd |
dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props
First of all the DW uMCTL2 DDRC IP-core supports the individual IRQ lines for each standard event: ECC Corrected Error, ECC Uncorrected Error, ECC Address Protection, Scrubber-Done signal, DFI Parity/CRC Error. It's possible that the platform engineers merge them up in the IRQ controller level. So let's add both configuration support to the DT-schema. Secondly the DW uMCTL2 DDRC IP-core can have clock sources like APB reference clock, AXI-ports clock, main DDRC core reference clock and Scrubber low-power clock. In addition to that each clock domain can have a dedicated reset signal. Let's add the properties for at least the denoted clock sources and the corresponding reset controls. Note the IRQs and the phandles order is deliberately not fixed since some of the sources may be absent depending on the IP-core synthesize parameters and the particular platform setups. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220910195659.11843-3-Sergey.Semin@baikalelectronics.ru |
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fc436e55a1 |
dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros
Xilinx ZynqMP DDRC-based example contains the opencoded numerical literals in the IRQ lines definition. It doesn't seem justified since the corresponding platform has well defined ARM GIC interface. Let's replace the numbers with the corresponding macros then. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220910195659.11843-2-Sergey.Semin@baikalelectronics.ru |
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9f60675a0f |
dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name
The DT-schema name and the corresponding generic compatible string look inappropriate in the current DW uMCTL2 DDRC DT-bindings: 1. DT-schema name contains undefined vendor-prefix. It's supposed to be "snps", not "synopsys". 2. DT-schema name has "ecc" suffix. That is a device property, and has nothing to do with the controller actual name. 3. The controller name is different. It's DW uMCTL2 DDRC. Just DDRC doesn't identify the IP-core in subject. 4. There is no much point in using the IP-core version in the device name since it can be retrieved from the corresponding device CSR. Moreover the DW uMCTL2 DDRC driver doesn't differentiate the IP-core version at the current state. In order to fix all the inconsistencies described above we suggest to rename the DT-schema to "snps,dw-umctl2-ddrc.yaml", deprecate the compatible string "snps,ddrc-3.80a" and define a new generic device name as "snps,dw-umctl2-ddrc". Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220910194237.10142-16-Sergey.Semin@baikalelectronics.ru |
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8450813136 |
dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support
The Zynq A05 DDRC controller has nothing in common with DW uMCTL2 DDRC: the CSRs layout is absolutely different and it doesn't support IRQs unlike DW uMCTL2 DDR controller of all versions (v1.x, v2.x and v3.x). Thus there is no any reason to have these controllers described in the same bindings. Let's split the DT-schema up. Note since the synopsys,ddrc-ecc.yaml schema describes the Synopsys DW uMCTL2 DDR controller only, we need to accordingly fix the device descriptions. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220910194237.10142-15-Sergey.Semin@baikalelectronics.ru |
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c457d9a580 |
Memory controller drivers for v6.1 - MediaTek
Add support for the mt8188 SMI memory controller. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmMbWgUQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD19CoD/0X2+d8EZymIdiLjRy1REtVVHbhvBuCepVp ZSDHgwIFY/qNuzQwYfqamwXAzUXdJM0ihPB+JO7AaU76oT+g9yToJaJQi4KbiAU6 A85HzTNFrQJiFlw6JOxoAN8uXcmF49sFzUlTe/X8YP+fQ+mn/T6/W2eupv9s3x6n zd5F3u/ECg+0BmGVJfqJdDtri1hzp8m/BREHOZdBJR1ZS+39lL/sSDn1yeQ8X9to MttIXwZV5kQHfWUEqewXWJCfcGCKPwg/+4XeZ49X8gbubBDRbGzZTCnsn3Ddni7x Xd12kZ2cLPjZrua3/QNiVmiazD2GAjR2pUXvDa//C66niXihPC6QnRkosl7tz9ak z8cgFv1FtUiOfY5W4SX7bWrVNyC1Pi581k+vOBwjcdkRTWHRRVSwxH+kTFbPzSVZ OrTG9YTTJhYWlwnxL/R8P+aqa1LD57D5uDB7lSH/QTAWZyp3jnbgIbjbMFs43DJ4 tn1F/Gbutoq6b1cXrtk50OML2moCpLbXRV3N/Jsqg7Mk7pSMXNBXzR7dNRxtomcx dyHsh30EzNbOcZg5VIlmDjrN/Wd5rkt1ArY0R3XO4UpA2XeCye6IQmY1+VBqzBtY 9PwsDFBDl4MIvsVy3z8jk4IjxlKZo4j3W87s7bGT5OaKcSEL/Q+2519oYadDEVJu e3B440yz0g== =KlXR -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMfSm8ACgkQmmx57+YA GNkRsA/+M+3UrgZbN0OxA8BADhjYBbi4Ff2nUhDJPd0WdjypNwOsERP9gssSkK2M t6njFcInnQeHfjvRVhjVrzJz3zIwXJZvyZm75+/4ceu2oLzcN9QsXZCVAw1S8L5t 95sHRCKlC7HHre5pwwXPuXVKf9MdAhLGAxeVMzffntJ3z22pNve1az2gpXxiGzLZ Yb2mke2nlkg1D6t9UL9OORO2+XDFFoaoed9LTmgbKYC8Tn5igsxuqbPaVQ2/gn2M 5Y8ym9T/yGmjAuqXX3jKVNBoGVgWbi5rpjaJEwRkYtSIO72qr+sipuVmsr7ZErN/ dJKfXo0pK6rgB7P8mdc9k9idkqCY5euRCUvsvrQKF0WMJ6coMD05aVsDtI5xvrg4 aAWVAZVzrkQ2js1nVG0ERUQKTaOvp8et1v2pJS3n1P0zqRDxqoDBmyCiBEY625Wx fiJW9ZYoTHuQu2tElY6SaR1aMvOLI/GKiXt2qW5jUtlQYn6yEvc4ggMG1WuHgT2i cegCHD/XB/tbBsA1J4ibxmn4n+cdQ5BiGaQsTnBuQ07P1sykyCrXvNcJ5jqt+OAH ZFl3BRbWM2jY//E8LpXqEcbrBm7fF9D2R3Rv3a09PJgeU7NFeouZKlnHNP20atHa g1tKjWyUH6ef6wB2WCNwnj8f5P1EuAh/S65GL9woxDVQWDKiP70= =phpc -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-mediatek-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v6.1 - MediaTek Add support for the mt8188 SMI memory controller. * tag 'memory-controller-drv-mediatek-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: mt8188: Add SMI Support memory: mtk-smi: Add enable IOMMU SMC command for MM master memory: mtk-smi: Add return value for configure port function dt-bindings: memory: mediatek: Add mt8188 smi binding Link: https://lore.kernel.org/r/20220909153037.824092-4-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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4da90678a6 |
Memory controller drivers for v6.1 - Broadcom
Add support for the Broadcom STB memory controller (BRCMSTB_MEMC). -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmMbWlIQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD17jnD/9npugLq9QcT3et9bd8nS1IoX01Jyt/1/2X z5m9ns3kiGOpcDY48XfISg5LA99F4A63LT/04OKzL0DqAnPXQBj2Kzzq7dad+t6L iL6p+M5eYmVZg25aEaTykQ3axGEn0vKxY4HogKefu/+jDyNsXrKBtDbO7MHSmAdK FP8+3qj7bGehAU/jb4CV6SQmtJeb70nqz/vlo5o/ZjMXnDgHH0ygKaueOhEgFRp1 uwoSZohDNOhmEylzq+k4akiU7KxmobIDNd+jUxiaJDph92cHMHzzlKpWC0adEmfl +zbjRqPLQRnxbv1+4haFpnM8+Tnsxb3er+U1Lr+4pxFmaQ3xObOy3XvdUpxsNVFI bYKtMYnqnuLKZ6ciImAd64YgMcClQAsle2Dk4neCyPBobIHG4Twg9g1yh6N9dBtC EJjzTx9AaBipztzL3/3bGcXDvcuTxy/warg/A5O4UFuEPnmIPT7dwkmYX4sev5dN 3hyMAEQewRUa+KUu4xCqlixg/+Rk1s+V4GRpoFwYtXOeo7n4BSKBiYiJzdtm7J83 4SC15DIIJosrGo4bzbNFzZ2P7yeiYjqyLYzPDKu3eafe7TsrJ6jn/7WBJ279N43+ wvwhTS8q9f9TwEnnjkQ9WOrygUedJ/x7unbolNfSgWaX73SS/FH4B0pvYwbq0w01 FXy6DrEglg== =4VeH -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMfSjYACgkQmmx57+YA GNm52Q//UlafPau8mcmYVoLzfTI2S5+PhmPW2U+n0//PMAkZvYNpb7zN7/EKppQ0 DNh4PLIO8kJBei7wkYw8Ur/fOt417JQ3sRzTGM+sdtV+zqBXY2Rd5sb3o+NrBMT8 T1YnaTkFQwVOJtxcp9Qzjnywxcd6i42uwewQNZ+YdqKCWNoNmo8G5fzdApAIrK1N nAbAVagj5zgq6W8IoIivE0ww75vV/PmiH2PhDFde96yl6oM1C+bkTTOYJv2p+trT /XVYk5jSPqKUHANj1uUvNZ8wJ+3SaXgTLu+qyN8yeip/kFjBvSyxS9VsXoDGS8V5 JZbGBmm2X5GMN06PYoboD7fQ5bOmSwiewFWDvOBLWYnXUqi1i3/F+AZAFCwoHMsM sT0IhnnXUkP8SlCtUe7U35Hqw7AipQOogYWAGCCNLxAYTYOSyqJWuffr0nWwDMQo 4/NY177friEny5O5TNlmuSMeo0Dl7TxDwUNugHdLnQSYdMjmU5MwNcBSbMlqVd/e Qat+0GvTW/T2NUEI2erE/6flX3X8km3f6UqzwOy5ytYxPAcqQ3r5K4l5aZBpQzEI tqoVvT/9W/1ptazS7uOzNAlCGZHkkWjdCLEWHsC3RoGvV5BdoZ/P9WJTzpXnGNt3 xjsFmKLa0v+H1RwOvS0Bk/t6wOm00tduHQ4gWLOHJ693Qaa7GQ0= =RC6E -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-brcm-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v6.1 - Broadcom Add support for the Broadcom STB memory controller (BRCMSTB_MEMC). * tag 'memory-controller-drv-brcm-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: brcmstb_memc: Add Broadcom STB memory controller driver Documentation: sysfs: Document Broadcom STB memc sysfs knobs dt-bindings: memory-controller: Document Broadcom STB MEMC Link: https://lore.kernel.org/r/20220909153037.824092-3-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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96c9b511fc
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dt-bindings: memory-controllers: fsl,imx8m-ddrc: drop Leonard Crestez
Emails to Leonard Crestez bounce ("550 5.4.1 Recipient address rejected: Access denied:), so change maintainer to Peng Fan from NXP. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220817065946.24303-2-krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20220909153037.824092-1-krzysztof.kozlowski@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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9d9fde4743 |
dt-bindings: memory: mediatek: Add mt8188 smi binding
Add mt8188 smi supporting in the bindings. In mt8188, there are two smi-common HW, one is for vdo(video output), the other is for vpp(video processing pipe). They connect with different smi-larbs, then some setting(bus_sel) is different. Differentiate them with the compatible string. Something like this: IOMMU(VDO) IOMMU(VPP) | | SMI_COMMON_VDO SMI_COMMON_VPP ---------------- ---------------- | | ... | | ... larb0 larb2 ... larb1 larb3 ... Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220817124608.10062-2-chengci.xu@mediatek.com |
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66320b268a |
dt-bindings: memory-controllers: fsl,imx8m-ddrc: restrict opp-table to objects
Simple 'opp-table:true' accepts a boolean property as opp-table, so restrict it to object to properly enferce real OPP table nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220818061549.9087-1-krzysztof.kozlowski@linaro.org |
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fa0321ba51 |
dt-bindings: memory-controller: Document Broadcom STB MEMC
Document the Broadcom STB memory controller which is a trivial binding for now with a set of compatible strings and single register. Since we introduce this binding, the section in Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt is removed and this binding is referenced instead. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> [krzk: correct path in brcm,brcmstb.txt] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220812222533.2428033-2-f.fainelli@gmail.com |
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9f8fb8032f |
dt-bindings: memory: mediatek,smi: Update condition for mt8195 smi node
The max clock items for the dts node with compatible 'mediatek,mt8195-smi-sub-common' should be 3. However, the dtbs_check of such node will get following message, arch/arm64/boot/dts/mediatek/mt8195-evb.dtb: smi@14010000: clock-names: ['apb', 'smi', 'gals0'] is too long From schema: Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml It's because the 'mediatek,mt8195-smi-sub-common' compatible incorrectly matches the 'else' conditions for gen2 HW without gals. Rewrite the 'else' condition to specifically identify the compatibles that utilizing gen2 HW without gals. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220729063208.16799-3-tinghan.shen@mediatek.com |
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8f2f74b4b6
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RISC-V: Canaan devicetree fixes
This series should rid us of dtbs_check errors for the RISC-V Canaan k210 based boards. To make keeping it that way a little easier, I changed the Canaan devicetree Makefile so that it would build all of the devicetrees in the directory if SOC_CANAAN. Link: https://lore.kernel.org/all/mhng-85044754-c361-40bc-a6a2-7082f35930bb@palmer-ri-x1c9/ * remotes/palmer/riscv-canaan_dt_schema: riscv: dts: canaan: build all devicetress if SOC_CANAAN riscv: dts: canaan: add specific compatible for kd233's LCD riscv: dts: canaan: fix bus {ranges,reg} warnings riscv: dts: canaan: remove spi-max-frequency from controllers riscv: dts: canaan: use custom compatible for k210 i2s riscv: dts: canaan: fix kd233 display spi frequency riscv: dts: canaan: fix mmc node names riscv: dts: canaan: fix the k210's timer nodes riscv: dts: canaan: fix the k210's memory node dt-bindings: memory-controllers: add canaan k210 sram controller dt-bindings: display: ili9341: document canaan kd233's lcd dt-bindings: display: convert ilitek,ili9341.txt to dt-schema |
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727b05e46c
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dt-bindings: memory-controllers: add canaan k210 sram controller
The k210 U-Boot port has been using the clocks defined in the devicetree to bring up the board's SRAM, but this violates the dt-schema. As such, move the clocks to a dedicated node with the same compatible string & document it. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220705215213.1802496-5-mail@conchuod.ie Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> |
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3ed9222ce7 |
Memory controller drivers for v5.20
Add MediaTek MT6795 Helio X10 SMI support. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmK1ctQQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1xiKEACG8M1wlmgTXsVOZ8DlBvKJXRrQZV2nSRDb NTyUki0OCjugfSelJPgmi0GIloykSsPTrl0lSnmv9er6CmnitvhCukwT71aHa1ql yi+MuKKY8gW9Akdhp+tzRlmX1A5jDbf2O2xZTCMxeei6eiIhI+IIUQ8Tl6mGWJ3G 0uvAJAgDANhOH66qSJzSiRE/E8eAF2vAdUKpvl2XVIvY/TbX+kB+G9Nm3mi/bXsp PxMvQSOyWYf/+iarDMiYgpABtOONXSSkhxH7xT+aPLCrINesxY0CldJw3lFPPPVl Ay2/cwyN/RsgwmHumBn4OtYttsGn2W+ahpVyLYsrlxFkAYk8Xgj89Llcj8qho4oO 2Cku+AjuzL054sQrnioU3gHTWF4EaacgOmWhFiWF+WTWfxhYgbj6r5iV7uPIqhDy M3lLuyF6LjuQqVQl2LrzPWW8WLVIUAW+5JCs3RnH02nbODXsGQbX6SvwtCt90oEM 3CMzhGfQf3ckxxhj8DToNht2UV0ptvvZGy1BdLI4HWUV+46CXMwdFB+GcmYNxKsD 949P/bQmk7Ahb2fDEefJc0MaPmhhWZjqy6R1RCf1HIbRu/1XTzzu5wZ8Hi+aBMlj tUd7J3SINCR7NpUAqhZKOWpy4FRpqM3dsuxL8jVj8ZQ93HTay/3lJAda25j2N1zA 0d1hFOeasg== =q3mn -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmK/X4cACgkQmmx57+YA GNlp3xAAhtq3N39aw2XkkMAfK+hLKH15yBFi1VSj1l2sbln8uiYobQFp8XaIdkSP ZT/dwCkgvvcXkttDoTA0oAOjsRrXz0Vgktvz+D6JHOImbfPcnNS8OH3Z6ZRM6u/l KN1U5GyemlrluNYjWAvI3RTWSQxYmpk/5d5yYsGGfCxxJmkTAjkTNj/HgQpYOIIh RmkuGN9Gg+eJ3VNrwUPIdb7xWJUJWFZLJAiok36MCQLwUZ9Zpw6lqlluZ+DHMG9f P41WDvCw3Z4hP/zkYUWPAKN7URenXRFqNx18laKDGrlqXvLPks3GSporNRdRNhxp 9I69jy29WKxiGC2WrRkIzuOO29OOX96obwt1QTzgx/C6RF0xAjenvReoGJNbBmp+ N+qWYZVavC1pzz2SHcmFX7p0wU4kdUZeY5PYTCerOf5YmCEf8wz8CaTWRAzaPEqX fx9LM6wJCKjcfu1rzyDtpqzGS/+L5/Ffh76TWHLFodqjsEbF1B4D8IAGtJNjn5cZ OGRvQfayarQcofB5klXeIiZXpZxtBf6qTC736sBKtXpoTDQevP4sd2qgvSU3TjlC FcNIwGGYnnFpERZmdODVevFCK59mZCs0T823YNbug32xc+Fzzhc9yrcEUNtpZ71m dpjdX1nJ+EqaVLE73lBhMhkoNRtT2sj0mjkHiZGOCTUajzhyDpY= =mBKt -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.20 Add MediaTek MT6795 Helio X10 SMI support. * tag 'memory-controller-drv-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: Add support for MT6795 Helio X10 dt-bindings: memory: mtk-smi: Add MT6795 Helio X10 bindings Link: https://lore.kernel.org/r/20220624081828.33649-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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927c63e078 |
dt-bindings: Drop more redundant 'maxItems/minItems' in if/then schemas
Another round from new cases in 5.19-rc of removing redundant minItems/maxItems when 'items' list is specified. This time it is in if/then schemas as the meta-schema was failing to check this case. If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redundant and can be dropped. Note that is DT schema specific behavior and not standard json-schema behavior. The tooling will fixup the final schema adding any unspecified minItems/maxItems. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20220606225137.1536010-1-robh@kernel.org |
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a24394059a |
dt-bindings: memory: mtk-smi: Add MT6795 Helio X10 bindings
Add SMI bindings for the MediaTek Helio X10 (MT6795) SoC Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220518091038.22380-2-angelogioacchino.delregno@collabora.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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e1dff7f133 |
dt-bindings: memory-controllers: ingenic: Split out child node properties
Binding schemas which define child node properties such as memory controllers with timing properties need a separate schema which can be referenced from child device schemas. This is necessary for unevaluatedProperties checks to work properly. Move the ingenic,nemc child properties to its own file and reference from ingenic,nand.yaml which describes a child NAND controller. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20220525210140.2489866-1-robh@kernel.org |
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16477cdfef |
asm-generic changes for 5.19
The asm-generic tree contains three separate changes for linux-5.19: - The h8300 architecture is retired after it has been effectively unmaintained for a number of years. This is the last architecture we supported that has no MMU implementation, but there are still a few architectures (arm, m68k, riscv, sh and xtensa) that support CPUs with and without an MMU. - A series to add a generic ticket spinlock that can be shared by most architectures with a working cmpxchg or ll/sc type atomic, including the conversion of riscv, csky and openrisc. This series is also a prerequisite for the loongarch64 architecture port that will come as a separate pull request. - A cleanup of some exported uapi header files to ensure they can be included from user space without relying on other kernel headers. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKPlXoACgkQmmx57+YA GNkxrRAAnuSgOUo9JC5C4Gm2Q9yhEUHU1QIYeVO0jlan5CkF18bo1Loptq4MdQtO /0pXJPH8rFhDSJQLetO4AAjEMDfJGR5ibmf7SasO03HjqC9++fIeN047MbnkHAwY hFqIkgqn4l+g1RMWK5WUSDJ3XQ7p5/yWzpg/CuxJ+D0w9by/LWI5A+2NKGXOS3GF yi7cWvIKC1l+PmrH3BFA+JYVTvFzlr9P6x5pSEBi6HmjGQR+Xn3s0bnIf6DGRZ+B Q6v03kMxtcqI9e9C0r0r7ZGbdMuRTYbGrksa4EfK0yJM9P0HchhTtT9zawAK7Ddv VMM4B+9r60UEM++hOLS6XrLJdn+Fv+OJDnhONb5c+Mndd8cwV1JbOlVbUlGkn92e WSdUCW6m0TBzDs9Ae1++1kUl1LodlcmSzxlb0ueAhU01QacCPlneyIEKUhcrCl5w ITVw4YVa/BVCh+HvTEdhhak/Qb/nWiojMY+UIH5smiwj6FSFdwEmmgCgHAKprQaA STMxRnccFknGW9CZheoMATYsPIHQKPlm9lbiulSoMLDHxGwshU/6vKD4HDoZU51d HPmUZeKVPahXCUXB4iFI3qD4Ltxaru9VbgfUiY18VB2oc6Mk+0oeh6luqwsrgBdz P2sQ2riZKhN5Frm3DCh7IbJqoqKHlLMWh0itpNllgP5SDmDJjng= =ri2Q -----END PGP SIGNATURE----- Merge tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic updates from Arnd Bergmann: "The asm-generic tree contains three separate changes for linux-5.19: - The h8300 architecture is retired after it has been effectively unmaintained for a number of years. This is the last architecture we supported that has no MMU implementation, but there are still a few architectures (arm, m68k, riscv, sh and xtensa) that support CPUs with and without an MMU. - A series to add a generic ticket spinlock that can be shared by most architectures with a working cmpxchg or ll/sc type atomic, including the conversion of riscv, csky and openrisc. This series is also a prerequisite for the loongarch64 architecture port that will come as a separate pull request. - A cleanup of some exported uapi header files to ensure they can be included from user space without relying on other kernel headers" * tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: h8300: remove stale bindings and symlink sparc: add asm/stat.h to UAPI compile-test coverage powerpc: add asm/stat.h to UAPI compile-test coverage mips: add asm/stat.h to UAPI compile-test coverage riscv: add linux/bpf_perf_event.h to UAPI compile-test coverage kbuild: prevent exported headers from including <stdlib.h>, <stdbool.h> agpgart.h: do not include <stdlib.h> from exported header csky: Move to generic ticket-spinlock RISC-V: Move to queued RW locks RISC-V: Move to generic spinlocks openrisc: Move to ticket-spinlock asm-generic: qrwlock: Document the spinlock fairness requirements asm-generic: qspinlock: Indicate the use of mixed-size atomics asm-generic: ticket-lock: New generic ticket-based spinlock remove the h8300 architecture |
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cc3c470ae4 |
ARM: driver changes for 5.19
There are minor updates to SoC specific drivers for chips by Rockchip, Samsung, NVIDIA, TI, NXP, i.MX, Qualcomm, and Broadcom. Noteworthy driver changes include: - Several conversions of DT bindings to yaml format. - Renesas adds driver support for R-Car V4H, RZ/V2M and RZ/G2UL SoCs. - Qualcomm adds a bus driver for the SSC (Snapdragon Sensor Core), and support for more chips in the RPMh power domains and the soc-id. - NXP has a new driver for the HDMI blk-ctrl on i.MX8MP. - Apple M1 gains support for the on-chip NVMe controller, making it possible to finally use the internal disks. This also includes SoC drivers for their RTKit IPC and for the SART DMA address filter. For other subsystems that merge their drivers through the SoC tree, we have - Firmware drivers for the ARM firmware stack including TEE, OP-TEE, SCMI and FF-A get a number of smaller updates and cleanups. OP-TEE now has a cache for firmware argument structures as an optimization, and SCMI now supports the 3.1 version of the specification. - Reset controller updates to Amlogic, ASpeed, Renesas and ACPI drivers - Memory controller updates for Tegra, and a few updates for other platforms. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKOXOoACgkQmmx57+YA GNlpVQ//eQGfL0WktE5G/y0mCVuVHtXT5nSjHMgjTOdb9+QvaATCfxnLXvP7Gq7C 7YzJd68G+2ZC4rUkkjTxyMICT7eIrJSAIAFn4PWee4EQ5DfbHgG+1tToTjxqb+QQ 6wGB5MVaYUhjZE30kY2E8a+OKxHtEnkt9wcch6ei0vzsMZquQJF6byfHd5+I4Knd CyDmXX8ZGXK3FnhvuBLr3Rgwyhs0X4Ju7UaONLZxBYxdnh8WmymRszmMnv5qEkub KDe8fbhFamOT3Z55JdCA5xq7LvUzjsKpTGFxFcS0ptbkTmtAsuyYqqiWvAPx3D5u 5TxVGSx9QKid6fpIsITZ2ptO6fgljh1W9b/3Y3/eltudXsM1qqSxyN2Hre+M9egf WEDADqbNR5Y5+bq1iZWI348jXkNHVPpsLHI9Ihqf4yyrKwFkmRmNLnws53XTAPH2 FPXZvJjwFDBDHGfewSoLFePXUPNytVLXbr6Mq72ZyTDIBDU8Mxh666Wd8bu4tgbG 1Y2pMjDIdXDOsljM6Of5D3XjM1kuDwEmFxWGy+cKLgoEbHLeE1xIbTjUir4687+d VNHdtsIRFPRZzz2lUSmI8vlA2aewMWrkOF/Ulz8xh6gG8uitMSfOxghg4IWOfRVM mlvgFP5eqTInmQcbWRxaRO9JzP+rPp1sAcEpsBmuEHw5Akflbc8= =XoLF -----END PGP SIGNATURE----- Merge tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Arnd Bergmann: "There are minor updates to SoC specific drivers for chips by Rockchip, Samsung, NVIDIA, TI, NXP, i.MX, Qualcomm, and Broadcom. Noteworthy driver changes include: - Several conversions of DT bindings to yaml format. - Renesas adds driver support for R-Car V4H, RZ/V2M and RZ/G2UL SoCs. - Qualcomm adds a bus driver for the SSC (Snapdragon Sensor Core), and support for more chips in the RPMh power domains and the soc-id. - NXP has a new driver for the HDMI blk-ctrl on i.MX8MP. - Apple M1 gains support for the on-chip NVMe controller, making it possible to finally use the internal disks. This also includes SoC drivers for their RTKit IPC and for the SART DMA address filter. For other subsystems that merge their drivers through the SoC tree, we have - Firmware drivers for the ARM firmware stack including TEE, OP-TEE, SCMI and FF-A get a number of smaller updates and cleanups. OP-TEE now has a cache for firmware argument structures as an optimization, and SCMI now supports the 3.1 version of the specification. - Reset controller updates to Amlogic, ASpeed, Renesas and ACPI drivers - Memory controller updates for Tegra, and a few updates for other platforms" * tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (159 commits) memory: tegra: Add MC error logging on Tegra186 onward memory: tegra: Add memory controller channels support memory: tegra: Add APE memory clients for Tegra234 memory: tegra: Add Tegra234 support nvme-apple: fix sparse endianess warnings soc/tegra: pmc: Document core domain fields soc: qcom: pdr: use static for servreg_* variables soc: imx: fix semicolon.cocci warnings soc: renesas: R-Car V3U is R-Car Gen4 soc: imx: add i.MX8MP HDMI blk-ctrl soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl soc: imx: add i.MX8MP HSIO blk-ctrl soc: imx: imx8m-blk-ctrl: set power device name soc: qcom: llcc: Add sc8180x and sc8280xp configurations dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles soc/tegra: pmc: Select REGMAP dt-bindings: reset: st,sti-powerdown: Convert to yaml dt-bindings: reset: st,sti-picophyreset: Convert to yaml dt-bindings: reset: socfpga: Convert to yaml dt-bindings: reset: snps,axs10x-reset: Convert to yaml ... |
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ae86218328 |
ARM: DT changes for 5.19, part 1
There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKOp8cACgkQmmx57+YA GNk33hAAn/mY+QDyj8sUwtY4AAVtut2QgyBm7NBWLgiYDQx52yBwP7rUxeKyDqZF q6LK5z3NA7NN5REpfn6WKBEFo6wkzTzg4Gev/h+9hwLyozch8vl4etBfZGak4A7m cLCONZdw4FMCQ10oLq+ib/WJeJv2W700307OkJ3dN73qdbWLRF1hoyG+uMTHuEqL If755IR+EYhxYz8CfJhCYb2BcqhRq047n3sEqolZpFtz5oHUW2dADASgWpV+3yNc ql8cH0f5OTKbFS1lM4k7cWbMW2vHWx7jZnXZDyMfy3EE5SOb4V/s9JFJSS1pAfPQ OWuq194LT+SIXTTT3DQ+lSNcMhlkyeXQ0JQE1wAAp0vov4V8vHGvEGk0MCku5QHp zKKONPfcn9aoWtsh4GaCvt0cP0m7lKyjxJvNSjBy2C9dVW8t4UlIVZr+V8hR2Ufp SpCCzMbttrcUK6rHzQmWsR563mhfszzuzDfZi4RK2aFLJKhFi5hEQF2tDxLq8Y09 vIY/OkRpSwahgbiyj/zhKrJtnhFHh1m6wZJG+Sk9lTJikEhaRinriy0lgu08xssG krBHPOVhNY11rqlzosBU39JOya1/J2iTxjo7ccNmGfO4MDanE+Cl41a5wSNjciw1 ihi2zAUBClGg0TnQ+HJylFPS3ZFyGEtbYH/d6td25DtwaaIsaxU= =LsM7 -----END PGP SIGNATURE----- Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM DT updates from Arnd Bergmann: "There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568" * tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits) ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash ARM: dts: turris-omnia: Add atsha204a node arm64: dts: mt8192: Follow binding order for SCP registers arm64: dts: mediatek: add mtk-snfi for mt7622 arm64: dts: mediatek: mt8195-demo: enable uart1 ... |
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09583dfed2 |
Power management updates for 5.19-rc1
- Update the Energy Model support code to allow the Energy Model to be artificial, which means that the power values may not be on a uniform scale with other devices providing power information, and update the cpufreq_cooling and devfreq_cooling thermal drivers to support artificial Energy Models (Lukasz Luba). - Make DTPM check the Energy Model type (Lukasz Luba). - Fix policy counter decrementation in cpufreq if Energy Model is in use (Pierre Gondois). - Add CPU-based scaling support to passive devfreq governor (Saravana Kannan, Chanwoo Choi). - Update the rk3399_dmc devfreq driver (Brian Norris). - Export dev_pm_ops instead of suspend() and resume() in the IIO chemical scd30 driver (Jonathan Cameron). - Add namespace variants of EXPORT[_GPL]_SIMPLE_DEV_PM_OPS and PM-runtime counterparts (Jonathan Cameron). - Move symbol exports in the IIO chemical scd30 driver into the IIO_SCD30 namespace (Jonathan Cameron). - Avoid device PM-runtime usage count underflows (Rafael Wysocki). - Allow dynamic debug to control printing of PM messages (David Cohen). - Fix some kernel-doc comments in hibernation code (Yang Li, Haowen Bai). - Preserve ACPI-table override during hibernation (Amadeusz Sławiński). - Improve support for suspend-to-RAM for PSCI OSI mode (Ulf Hansson). - Make Intel RAPL power capping driver support the RaptorLake and AlderLake N processors (Zhang Rui, Sumeet Pawnikar). - Remove redundant store to value after multiply in the RAPL power capping driver (Colin Ian King). - Add AlderLake processor support to the intel_idle driver (Zhang Rui). - Fix regression leading to no genpd governor in the PSCI cpuidle driver and fix the riscv-sbi cpuidle driver to allow a genpd governor to be used (Ulf Hansson). - Fix cpufreq governor clean up code to avoid using kfree() directly to free kobject-based items (Kevin Hao). - Prepare cpufreq for powerpc's asm/prom.h cleanup (Christophe Leroy). - Make intel_pstate notify frequency invariance code when no_turbo is turned on and off (Chen Yu). - Add Sapphire Rapids OOB mode support to intel_pstate (Srinivas Pandruvada). - Make cpufreq avoid unnecessary frequency updates due to mismatch between hardware and the frequency table (Viresh Kumar). - Make remove_cpu_dev_symlink() clear the real_cpus mask to simplify code (Viresh Kumar). - Rearrange cpufreq_offline() and cpufreq_remove_dev() to make the calling convention for some driver callbacks consistent (Rafael Wysocki). - Avoid accessing half-initialized cpufreq policies from the show() and store() sysfs functions (Schspa Shi). - Rearrange cpufreq_offline() to make the calling convention for some driver callbacks consistent (Schspa Shi). - Update CPPC handling in cpufreq (Pierre Gondois). - Extend dev_pm_domain_detach() doc (Krzysztof Kozlowski). - Move genpd's time-accounting to ktime_get_mono_fast_ns() (Ulf Hansson). - Improve the way genpd deals with its governors (Ulf Hansson). - Update the turbostat utility to version 2022.04.16 (Len Brown, Dan Merillat, Sumeet Pawnikar, Zephaniah E. Loss-Cutler-Hull, Chen Yu). -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmKL3hsSHHJqd0Byand5 c29ja2kubmV0AAoJEILEb/54YlRxW4oP/RzMh6dclWXs3J/gUCKTqRepq6cb80tq Q2r9xRRHwy6ZH/PVddGDHmhQ7d3NAv13s4srA9kznZognF3hzuxnGau226ilDqHh qxVSBRjWY9ijxRBvkcCaa6HZm4Chb91pUX0CLpdYSl9BTgIdk66HZYaMsKhHU/di j7KKHPdKyyQkssWnMjGEyuaF+UebiEgISCF3+X0eb6c1m7GHXpgLJVxNy0pKkUdK j+n6+ms12OlVLtg1eIl0J5824w/rkK3ZdqfEXJSq++mNMqSj/KCI3yWpzsLKp9AB xxhox/tPgJVyON8Vtbb2IkWkiQUKeSrAGIUYXWmnwIZYLPSGD7BPzr82Cxr7S/ez imMB+1Qd3SsOQ9EdI9rGYgNsEF2vOs1xjMehSdUdmTz148IzBOBt4YyQeb/mfXqH nh9eVuFCzqH1lAayYt6iP1+V5gQn9as/+rR91k4k4A6OKXomuQUGORLeHfuKMfNH eBZ72tdXqiq6z+ag3lY3pBAMSm11epCOa3VR6QNaC7hrlY3AZP+o3tIUL6W813b+ V3l1gWApGHZE1hiDM95dll/dIt9IZpTRd3dlqF/YnFW7fPDrz71EGvhrZpO7vdO0 /G6eJcCDjqJVcbCE8Y77I6/AXjpVQ7PRPeNx6aW7jPcQhpVIgcsF2BGjk9anjXDs 3yHJs9R/HMmA =Hewm -----END PGP SIGNATURE----- Merge tag 'pm-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management updates from Rafael Wysocki: "These add support for 'artificial' Energy Models in which power numbers for different entities may be in different scales, add support for some new hardware, fix bugs and clean up code in multiple places. Specifics: - Update the Energy Model support code to allow the Energy Model to be artificial, which means that the power values may not be on a uniform scale with other devices providing power information, and update the cpufreq_cooling and devfreq_cooling thermal drivers to support artificial Energy Models (Lukasz Luba). - Make DTPM check the Energy Model type (Lukasz Luba). - Fix policy counter decrementation in cpufreq if Energy Model is in use (Pierre Gondois). - Add CPU-based scaling support to passive devfreq governor (Saravana Kannan, Chanwoo Choi). - Update the rk3399_dmc devfreq driver (Brian Norris). - Export dev_pm_ops instead of suspend() and resume() in the IIO chemical scd30 driver (Jonathan Cameron). - Add namespace variants of EXPORT[_GPL]_SIMPLE_DEV_PM_OPS and PM-runtime counterparts (Jonathan Cameron). - Move symbol exports in the IIO chemical scd30 driver into the IIO_SCD30 namespace (Jonathan Cameron). - Avoid device PM-runtime usage count underflows (Rafael Wysocki). - Allow dynamic debug to control printing of PM messages (David Cohen). - Fix some kernel-doc comments in hibernation code (Yang Li, Haowen Bai). - Preserve ACPI-table override during hibernation (Amadeusz Sławiński). - Improve support for suspend-to-RAM for PSCI OSI mode (Ulf Hansson). - Make Intel RAPL power capping driver support the RaptorLake and AlderLake N processors (Zhang Rui, Sumeet Pawnikar). - Remove redundant store to value after multiply in the RAPL power capping driver (Colin Ian King). - Add AlderLake processor support to the intel_idle driver (Zhang Rui). - Fix regression leading to no genpd governor in the PSCI cpuidle driver and fix the riscv-sbi cpuidle driver to allow a genpd governor to be used (Ulf Hansson). - Fix cpufreq governor clean up code to avoid using kfree() directly to free kobject-based items (Kevin Hao). - Prepare cpufreq for powerpc's asm/prom.h cleanup (Christophe Leroy). - Make intel_pstate notify frequency invariance code when no_turbo is turned on and off (Chen Yu). - Add Sapphire Rapids OOB mode support to intel_pstate (Srinivas Pandruvada). - Make cpufreq avoid unnecessary frequency updates due to mismatch between hardware and the frequency table (Viresh Kumar). - Make remove_cpu_dev_symlink() clear the real_cpus mask to simplify code (Viresh Kumar). - Rearrange cpufreq_offline() and cpufreq_remove_dev() to make the calling convention for some driver callbacks consistent (Rafael Wysocki). - Avoid accessing half-initialized cpufreq policies from the show() and store() sysfs functions (Schspa Shi). - Rearrange cpufreq_offline() to make the calling convention for some driver callbacks consistent (Schspa Shi). - Update CPPC handling in cpufreq (Pierre Gondois). - Extend dev_pm_domain_detach() doc (Krzysztof Kozlowski). - Move genpd's time-accounting to ktime_get_mono_fast_ns() (Ulf Hansson). - Improve the way genpd deals with its governors (Ulf Hansson). - Update the turbostat utility to version 2022.04.16 (Len Brown, Dan Merillat, Sumeet Pawnikar, Zephaniah E. Loss-Cutler-Hull, Chen Yu)" * tag 'pm-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (94 commits) PM: domains: Trust domain-idle-states from DT to be correct by genpd PM: domains: Measure power-on/off latencies in genpd based on a governor PM: domains: Allocate governor data dynamically based on a genpd governor PM: domains: Clean up some code in pm_genpd_init() and genpd_remove() PM: domains: Fix initialization of genpd's next_wakeup PM: domains: Fixup QoS latency measurements for IRQ safe devices in genpd PM: domains: Measure suspend/resume latencies in genpd based on governor PM: domains: Move the next_wakeup variable into the struct gpd_timing_data PM: domains: Allocate gpd_timing_data dynamically based on governor PM: domains: Skip another warning in irq_safe_dev_in_sleep_domain() PM: domains: Rename irq_safe_dev_in_no_sleep_domain() in genpd PM: domains: Don't check PM_QOS_FLAG_NO_POWER_OFF in genpd PM: domains: Drop redundant code for genpd always-on governor PM: domains: Add GENPD_FLAG_RPM_ALWAYS_ON for the always-on governor powercap: intel_rapl: remove redundant store to value after multiply cpufreq: CPPC: Enable dvfs_possible_from_any_cpu cpufreq: CPPC: Enable fast_switch ACPI: CPPC: Assume no transition latency if no PCCT ACPI: bus: Set CPPC _OSC bits for all and when CPPC_LIB is supported ACPI: CPPC: Check _OSC for flexible address space ... |
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0be3ff0ccb |
- Switch ghes_edac to use the CPER error reporting routines and simplify
the code considerably this way - Rip out the silly edac_align_ptr() contraption which was computing the size of the private structures of each driver and thus allowing for a one-shot memory allocation. This was clearly unnecessary and confusing so switch to simple and boring kmalloc* calls. - Last but not least, the usual garden variety of fixes, cleanups and improvements all over EDAC land -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmKLRJkACgkQEsHwGGHe VUorYQ//a3s/j1wIXB5J0q7c9xlumqhxJz9P2A42kZMEW6MR94Ovr2lDnN6FRN5z dlLLn/fxjh3El084jaKrfhHHyB0Z78Qte/Caf4E3HVuhmZ2dQw58vXAm3TNMsiPz DEnJrRJ/vuX/VEcuuvX9wwSovPqNINW4lb9cWcIfGPToX051coUvuxTQXmCO80Hd 2syv88S0a8tw94E6DeB+5hhAQdgdV2dK3rZChTNi1guDqHqv14E6oQowWe6+Dvq/ XGBbJtmjuWsh2ZtS1KDnGYO0jvzLxe/5kjdgXYUoftG30MVTkVV0pBk0G+lPQQBN 2nSLd9zEgSceB5SlNlfWtQQuL1I56q3chxT7mj5JBPRsqQmV6Rxg9E0jnyiUH6Cf Q9btDizjU7vUpDKe1Y8fJEMR3nXTIK58AnjcDmTZIu5hVZFY2nYnql0txClmkTUE Bffud97C7a8uiSECp6oS5vjQHK12xwqiD8KRIaAHlBDYnpqTOJw/mDoKUvV74yiJ TRvvPAiPgoA5ZLLkCFKxA7IzFXtgz9HL7m/MbbBo63ed187qvMyBxcyb8Teih/iy u6eK0W1fux+zEaS6q5Jp0v415aqVvoa0UHgImTlOJhBaWENlEQixHslFMaqnlDTV yhG405KxxMgW9/L9nI4kqP827zIr4iXJCVg3rJsOdytEzfwWy2o= =Hwmn -----END PGP SIGNATURE----- Merge tag 'edac_updates_for_v5.19_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras Pull EDAC updates from Borislav Petkov: - Switch ghes_edac to use the CPER error reporting routines and simplify the code considerably this way - Rip out the silly edac_align_ptr() contraption which was computing the size of the private structures of each driver and thus allowing for a one-shot memory allocation. This was clearly unnecessary and confusing so switch to simple and boring kmalloc* calls. - Last but not least, the usual garden variety of fixes, cleanups and improvements all over EDAC land * tag 'edac_updates_for_v5.19_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras: EDAC/xgene: Fix typo processsors -> processors EDAC/i5100: Remove unused inline function i5100_nrecmema_dm_buf_id() EDAC: Use kcalloc() EDAC/ghes: Change ghes_hw from global to static EDAC/armada_xp: Use devm_platform_ioremap_resource() EDAC/synopsys: Add a SPDX identifier EDAC/synopsys: Add driver support for i.MX platforms EDAC/dmc520: Don't print an error for each unconfigured interrupt line EDAC/mc: Get rid of edac_align_ptr() EDAC/device: Sanitize edac_device_alloc_ctl_info() definition EDAC/device: Get rid of the silly one-shot memory allocation in edac_device_alloc_ctl_info() EDAC/pci: Get rid of the silly one-shot memory allocation in edac_pci_alloc_ctl_info() EDAC/mc: Get rid of silly one-shot struct allocation in edac_mc_alloc() efi/cper: Reformat CPER memory error location to more readable EDAC/ghes: Unify CPER memory error location reporting efi/cper: Add a cper_mem_err_status_str() to decode error description powerpc/85xx: Remove fsl,85... bindings |
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d44d6c4a3a |
Update devfreq next for v5.19
Detailed description for this pull request: 1. Update devfreq core - Add cpu based scaling support to passive governor. Some device like cache might require the dynamic frequency scaling. But, it has very tightly to cpu frequency. So that use passive governor to scale the frequency according to current cpu frequency. To decide the frequency of the device, the governor does one of the following: : Derives the optimal devfreq device opp from required-opps property of the parent cpu opp_table. : Scales the device frequency in proportion to the CPU frequency. So, if the CPUs are running at their max frequency, the device runs at its max frequency. If the CPUs are running at their min frequency, the device runs at its min frequency. It is interpolated for frequencies in between. 2. Update devfreq driver - Update rk3399_dmc.c as following: : Convert dt-binding document to YAML and deprecate unused properties. : Use Hz units for the device-tree properties of rk3399_dmc. : rk3399_dmc is able to set the idle time before changing the dmc clock. Specify idle time parameters by using nano-second unit on dt bidning. : Add new disable-freq properties to optimize the power-saving feature of rk3399_dmc. : Disable devfreq-event device on remove() to fix unbalanced enable-disable count. : Use devm_pm_opp_of_add_table() : Block PMU (Power-Management Unit) transitions when scaling frequency by ARM Trust Firmware in order to fix the conflict between PMU and DMC (Dynamic Memory Controller). -----BEGIN PGP SIGNATURE----- iQJKBAABCgA0FiEEsSpuqBtbWtRe4rLGnM3fLN7rz1MFAmKDddYWHGN3MDAuY2hv aUBzYW1zdW5nLmNvbQAKCRCczd8s3uvPU1o0EACGE7FV/pA/sbOFhhLXQlI1XMQf C2XVvjigP5M7Y9qgM6qLBKCSmRPbBjuO4VLKkIycmo2GRcUs+Sk5CqALjWZF0tDR aiAV+P3wIC2pCZNtAXJG6BhP5GNzGYYdv2zJfNmVUsYUYVC3ezppuE1Yp2Sscq5t K43eAOq0c9+TTeLfdDKdi07QtevMHwbOxjNUhwnzN5+yD9cknK1Ht5FVjDc8eYTG yBJPgMy9qhNqEZ4gl9zpKJkpAJMOhquT4ZtytNioIfnmKCrpyiOy+yApvW5WiU1d /8KMiG42C47rUBYCiEGEdn6PaTOpuOK0hnuoxlxE07dqJP349SbozFTqZxfbCJhI OjZSdLTolPFq82zuAafBJmijmeAiYdI0FKrhXmQo4doeleIQG9z0h8YpkQSnF47L xsj7QswD0LxtMQbYv5zds1NoGnUn/U+TpoJ8mbpg5gPWKaBTNdTZFJQj+HXtrDyy 1ouR41u6kOoLLDHu2I5f9dTMptJRg3jS+kQfDv17K8u5mAmcwFidpOiyac6m2xad Nnn85NAE9JaxpzVe3+S3uQdscEe2FBWEZCkbrCcPn2T88BZwrfcby02YRBw22WkS p4xPAOncw4lhZ6z3pedcH/1+kk6uoTube5QK8ddSRxYrRavtOsqchAaec+hYRNif CbjJOqsdbDLa7ANLxw== =/3W8 -----END PGP SIGNATURE----- Merge tag 'devfreq-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux Pull devfreq changes for 5.19-rc1 from Chanwoo Choi: "1. Update devfreq core - Add cpu based scaling support to passive governor. Some device like cache might require the dynamic frequency scaling. But, it has very tightly to cpu frequency. So that use passive governor to scale the frequency according to current cpu frequency. To decide the frequency of the device, the governor does one of the following: : Derives the optimal devfreq device opp from required-opps property of the parent cpu opp_table. : Scales the device frequency in proportion to the CPU frequency. So, if the CPUs are running at their max frequency, the device runs at its max frequency. If the CPUs are running at their min frequency, the device runs at its min frequency. It is interpolated for frequencies in between. 2. Update devfreq drivers - Update rk3399_dmc.c as following: : Convert dt-binding document to YAML and deprecate unused properties. : Use Hz units for the device-tree properties of rk3399_dmc. : rk3399_dmc is able to set the idle time before changing the dmc clock. Specify idle time parameters by using nano-second unit on dt bidning. : Add new disable-freq properties to optimize the power-saving feature of rk3399_dmc. : Disable devfreq-event device on remove() to fix unbalanced enable-disable count. : Use devm_pm_opp_of_add_table() : Block PMU (Power-Management Unit) transitions when scaling frequency by ARM Trust Firmware in order to fix the conflict between PMU and DMC (Dynamic Memory Controller)." * tag 'devfreq-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux: PM / devfreq: passive: Keep cpufreq_policy for possible cpus PM / devfreq: passive: Reduce duplicate code when passive_devfreq case PM / devfreq: Add cpu based scaling support to passive governor PM / devfreq: Export devfreq_get_freq_range symbol within devfreq PM / devfreq: rk3399_dmc: Block PMU during transitions soc: rockchip: power-domain: Manage resource conflicts with firmware PM / devfreq: rk3399_dmc: Avoid static (reused) profile PM / devfreq: rk3399_dmc: Use devm_pm_opp_of_add_table() PM / devfreq: rk3399_dmc: Disable edev on remove() PM / devfreq: rk3399_dmc: Support new *-ns properties PM / devfreq: rk3399_dmc: Support new disable-freq properties PM / devfreq: rk3399_dmc: Use bitfield macro definitions for ODT_PD PM / devfreq: rk3399_dmc: Drop excess timing properties PM / devfreq: rk3399_dmc: Drop undocumented ondemand DT props dt-bindings: devfreq: rk3399_dmc: Add more disable-freq properties dt-bindings: devfreq: rk3399_dmc: Specify idle params in nanoseconds dt-bindings: devfreq: rk3399_dmc: Fix Hz units dt-bindings: devfreq: rk3399_dmc: Deprecate unused/redundant properties dt-bindings: devfreq: rk3399_dmc: Convert to YAML |
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72a21285a7 |
dt-bindings: Changes for v5.19-rc1
Updates the memory controller bindings to properly validate the number of entries in the reg and reg-names properties. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmJ1LHUTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoRLgD/9TO+RVgLy/Z2Ap5I1/5yVMADMyKUr9 UJ3nTSPMIWAyGrwYCjrryakqRmxSgUxb6pCTvaKSaFYrflrKFYqR+hLbXkyunq3O P4cbYvjmJzU1dPJmme4ZuA//Np2N0+IXxrwK34GHGe0jLjqWP92vIPmxUEs7dLoq JT6difqq8Gghk6V8cqheonyMzvTBzgnGCRg1wxoZmiMOSzyp7xj9Q+wJcxSRODW6 I/2g89tSAlktnRr1GQQKqcjDW7rGNBXRoc5VJXvBTNJP6bbyDg5gXxh0pvgkB7Lm DxU8+42spNEPv4Np1xO33KFDh3X5QsGIgoXYicTih/qA1L1uCC/gVc/yLFAGrQqD c+5JJ83SIKnSC+5oGum+hv2VlNFCV8iOCCaqF+W6InlxQUFy9zD0zMtmkf5IKhg6 28nLUVh1RsrqxRUWh5JlFJ0pi78T6Nj76Z0U+4XJaItCD6kReo6p5dk8kYun9god NViz6kwwwdUMpWrnh9JErSnJmNQlMGqVarVlxnLXA+bZF6g9FOYTIJXOLOkGJvvI hZOpBVmwKvnsGvx1VURhtCC61fECyVUWuj27A/TJ48LiA93ZqAQjLctMVgri/rUp cw51FZCfMSwxHVE0b4++aMgm15dq9pd8f2H7fjw08P1s4xlFn0699lsJAd49FTv1 3tIX51HXaPWmTA== =zZKk -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJ1h1QACgkQmmx57+YA GNlUSBAAr3dj9uy0JHbqnzdqGCh2yFJ39wKIocHyh8QhNw84zVqIcLqOCbrqrejl sypTj5o4WSEoUqBMbN8wej5H14CGo2bFLGUQJ5krfR3Lh5Jm9JtRmve2vHFYLbKE ewPfbyg+DwYowCIemE+5maLp2eGyV4UAJpPEfSqt0G97Onu2+E+jy3IGQLweh6kk 7kiaUiIu5Q9kIgT9yIKutvMIDN7JM5I9LZ4+X1fU9Xm5T6OYo15lqmbHYEwA9eJg Dp/1hBv92D4v7OZItePzxjWlXJYgk0Zl1rCb185Z1Jawu3M30cG8w0KKdNiMjzkw LHlJ2QbCe3qi2nXgxgPJKgh+L00WUXXkgTPNXoSNlmsAZZdMIV/glaI5aLl3R0b2 Tn88Yr/RyJvuGRyD2HgoDHeMZQBSyOrdFvMxp7ohjxhqreye9DfS2nBr0IBdMrc9 2NXJDYLu7zyvIiuBkir+r/+lGcrqGFBQfiU/BNX6njTnhVTGSqIEsDeJKLD063xj TRx2G97gk/+gzWt6B/T13qEiSR8rTU4tWAq9EE8QjkViRQAfEbJ1oqyjXRvPh+NJ H8pYfR9J+UQZ1p/FMRpU7+n/uFeAxXfWALHEGPTBkeevo5aOOIBxFRGCBG+/kPCV r//JdeAYm/M8fyE7PC7nZP7wDAKn4VF8mSWIvwBvtAEbZxTXkLw= =E9U4 -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.19-rc1 Updates the memory controller bindings to properly validate the number of entries in the reg and reg-names properties. * tag 'tegra-for-5.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: memory: tegra: Update validation for reg and reg-names Link: https://lore.kernel.org/r/20220506143005.3916655-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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5652dc5cd9 |
dt-bindings: memory: renesas,rpc-if: Document RZ/G2UL SoC
Document RZ/G2UL RPC-IF bindings. RZ/G2UL RPC-IF is identical to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-rpc-if" will be used as a fallback. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220501082508.25511-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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e2ab93e59b |
dt-bindings: memory: tegra: Update validation for reg and reg-names
From Tegra186 onwards, memory controller support multiple channels. "reg" items are updated with address and size of these channels. Tegra186 has overall 5 memory controller channels. Tegra194 and Tegra234 have overall 17 memory controller channels each. There is one "reg" entry for memory controller stream-ID registers. So update the "reg" property's "minItems" and "maxItems" accordingly in the Tegra186 devicetree documentation. Also update validation for "reg-names" added for these corresponding "reg" items. ABI change due to new bindings is intended but backward compatibility is preserved in driver. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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54711ee4f6 |
Memory controller drivers for v5.19
1. Exynos: Reduce memory usage/allocation in Exynos5422 DMC driver. 2. Renesas: - Add bindings for R-Car H3/M3/E3. - Simplify single/double data register access. 3. Minor cleanups: TI/EMIF and FSL/Corenet. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmJftYYQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD18awD/475+blRKT0B7jsNpsUEdDcQR/nRYj5cgnf GLNwNJet05PSug6kaWZ+6fmEHETcMuduBRZmtZnc9wNO4Z+HkXSVvnHbU4MlF3cF ORgtTwUPeHz1D4mVbvHUVifjkM/qwWfVh9xJnN7i/Afk4xe8IxsfJQwCFm5QixIE iMVBe1idiEppiFEqtSp8JSWvLaEbCd6ULpbK8aJmpPp6rUu9dHuN4jPwdgd2tjmK A3bGH3QWm+ujQYZvjrrayvur8sTHI+SGy8I5GFHRY09R+kFZKvcKiEJ4WfaNZt4+ Dt2cAmKHLqxxWSr1QOrq/zIY69hB7zngmh3PTwbFA++7peDmnwhVZGEUoWEnkLar nDyf46uTxs+OU6qW/78WWTDo4OLrOIce0LF/ctXpFa8BV4JuTI2QH4YAxuppeowu ssPu/IaBOJ5anPdxoJ3XufWsPf6OlpIGnvJGSBrNZfRONJNNudvvZOODi0C0pDU+ +c/85dBxiquV56BRFmRH0aWoSN3jx9Zo2pRcn4YQU75KmH9I5Jj6Ux3a//lIEMvr WSYl4MNfDxJLKhzdMZN7562rfeWOmhCLIneEciHYkuRH/L38v+moXmK/TP+qzq31 mlnNYpMGLHhCOcCWMeyEfGCQ1/ah4v5LOMEbL8wcqAwoYhozwIlhyRm54QM718Eh FKOB2Mp3/w== =cpzI -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJhchQACgkQmmx57+YA GNm49g//bZ8xWgK/3762GgP6D8K/OS06/hS0BVmPTQ389R2xnsUBTguM5B+lICTV DzgVXA73Pvo6J3KiSsmRIbjGXbNFiTpnsKKkwhLXP97QupsWSImnsgoliWWvEZ7w exHmxTbIRW0AyMZV/EbLuH3OWWc7Unelg8o2P0kV91AkMZZmE25y1qekD4XlFy6i b/Wum/CYm5JMQ6wddKtCPUtaRfkhSO1PGc/nCAkIUVGiuuV3AsIM5hpBPqYZWaUg z/qU5sEXUytLCXSUt78nTUAzuvJpH6VcD8b2Ha8VUZe2nTEdQnXpPr1V06vcWDlo gu4/HrlML2ESvSp2b05uaRozzdFX+ixh5eGV9U3Q0M/t6gN/un+vY5Q/wRVEyqYF CaGwEXiOmIg5BiJT/MzJfvKsHsqsv24uWkOS7fbNqSsMS1LQmnAVZ4Rws8RhIEvd ChkI8IWz5D9ojuJl/L1C9N+ivs2b88GrpnTia0sKV8JIFPJnh5m5+x+t4fBQJBFI JM954U7BnbemvRTxJoEAkBA79AtCncO8NNw8HRtPQlkgqgeN2eGrTXyZcQ3iARtb k+Q4IN2EPX3tCIW1PjiYbwUP6wvvCc/zZOMeXvM+6LABIx8cd7uTdgTJs35Ta4Ms lBSKppqP3onphJHND7gltOWVpwIAMO6U/uXaDUiNm6FhdyVxj88= =6DSb -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.19 1. Exynos: Reduce memory usage/allocation in Exynos5422 DMC driver. 2. Renesas: - Add bindings for R-Car H3/M3/E3. - Simplify single/double data register access. 3. Minor cleanups: TI/EMIF and FSL/Corenet. * tag 'memory-controller-drv-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: fsl-corenet-cf: Use helper function devm_platform_ioremap_resource() memory: renesas-rpc-if: Simplify single/double data register access dt-bindings: memory: renesas,rpc-if: Document R-Car H3/M3/E3 support memory: emif: remove unneeded ENOMEM error messages memory: samsung: exynos5422-dmc: Avoid some over memory allocation Link: https://lore.kernel.org/r/20220420072712.12648-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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a86fb6a9a2 |
dt-bindings: devfreq: rk3399_dmc: Add more disable-freq properties
DDR DVFS tuning has found that several power-saving features don't have good tradeoffs at higher frequencies -- at higher frequencies, we'll see glitches or other errors. Provide tuning controls so these can be disabled at higher OPPs, and left active only at the lower ones. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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77c188085b |
dt-bindings: devfreq: rk3399_dmc: Specify idle params in nanoseconds
It's inefficient to use the same number of cycles for all OPPs, since lower frequencies make for longer idle times. Let's specify the idle time instead, so software can pick the optimal number of cycles on its own. NB: these bindings aren't used anywhere yet. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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4de8fd02a5 |
dt-bindings: devfreq: rk3399_dmc: Fix Hz units
The driver and all downstream device trees [1] are using Hz units, but the document claims MHz. DRAM frequency for these systems can't possibly exceed 2^32-1 Hz, so the choice of unit doesn't really matter than much. Rather than add unnecessary risk in getting the units wrong, let's just go with the unofficial convention and make the docs match reality. A sub-1MHz frequency is extremely unlikely, so include a minimum in the schema, to help catch anybody who might have believed this was MHz. [1] And notably, also those trying to upstream them: https://lore.kernel.org/lkml/20210308233858.24741-3-daniel.lezcano@linaro.org/ Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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76d136b56f |
dt-bindings: devfreq: rk3399_dmc: Deprecate unused/redundant properties
These DRAM configuration properties are all handled in ARM Trusted Firmware (and have been since the early days of this SoC), and there are no in-tree users of the DMC binding yet. It's better to just defer to firmware instead of maintaining this large list of properties. There's also some confusion about units: many of these are specified in MHz, but the downstream users and driver code are treating them as Hz, I believe. Rather than straighten all that out, I just drop them. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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2142c27ef0 |
dt-bindings: devfreq: rk3399_dmc: Convert to YAML
I want to add, deprecate, and bugfix some properties, as well as add the first users. This is easier with a proper schema. The transformation is mostly straightforward, plus a few notable tweaks: * Renamed rockchip,dram_speed_bin to rockchip,ddr3_speed_bin. The driver code and the example matched, but the description was different. I went with the implementation. Note that this property is also slated for deprecation/deletion in the subsequent patches. * Drop upthreshold and downdifferential properties from the example. These were undocumented (so, wouldn't pass validation), but were representing software properties (governor tweaks). I drop them from the driver in subsequent patches. * Rename clock from pclk_ddr_mon to dmc_clk. The driver, DT example, and all downstream users matched -- the binding definition was the exception. Anyway, "dmc_clk" is a more appropriately generic name. * Choose a better filename and location (this is a memory controller). Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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8f0e3af817 |
dt-bindings: memory: renesas,rpc-if: Document R-Car H3/M3/E3 support
Document support for the SPI Multi I/O Bus Controller (RPC-IF) in the R-Car H3, M3-W, M3-W+, M3-N, and E3 SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/3784b6cb76a008fb56d6cb4ba228d78c77e710fa.1648546583.git.geert+renesas@glider.be Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
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44e4a2c756 |
Memory controller drivers - fixes for v5.18
Issues in v5.18: 1. Freescale/NXP: fix populating children of Integrated Flash Controller DT nodes. Issues existing before: 1. Renesas: fix platform-device leak in probe's error path. 2. Atmel: fix of_node reference leak in probe's error path. 3. Synopsys: correct the bindings for snps,ddrc-3.80a (interrupts are required). -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmJOnPsQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD18r3D/sHivcq0Vq2nWC5IUcpAzL/WaF1H/rMHnE+ Y/gQxormQ6u/eBhfiHG4o6sLm4io8YJzCCvsnDnM//GExrUHJHohy5bGOGiSGRi3 lF0UWWQAWVyxIuF058gtzPuNmjZTH7VJnAIA/TNAvnQIt34269VxcdIFTIICLESo jUiZ3nswDBuS/9CQM/L2F3XBnmK2foSZIJFGNK5uNDWMyOlY2NTuejC0fs8uXFuh 14B3OwKm4LOhshGrwBGfJS0k6VxINDKGeZ6yslYEx8s/CFqTwCTsdgEgxjX5zfuA CKZjZCC9neZIdOP8tAgx8lfR4shWTf5jXkW1FXOGzvRfnKCVZeebqSUkUMQo3VuK zMeHb6iYtj9F+F0kqhlb67UtATv/0C7zFEYej8YD764SXnPl20NEVR+SrzaQtyLO V6G0Xc19pf9rnUIA0XiEF9yNXdOGswANqucHTl6+oOt3vwT0iT+kzzgQBC2Ucl1u eHLeyTTTdFKTvWuzcKK97h3/N80T/U2FMoJgIzgU9ajCkyQrWEdoCZrUqS93TA1I wALsZWqgvu6PLeUcSHCIdGPI+VktloIDKi/wlttOttBN38W1WwuyHZTt52zEmA2P /rPScCVf3IEn0rtC6EP+gZ2SYbC0LCsgs5vmpvfgoxVIGA3+lmSoKmUprFWG6Z86 ZclVVBMV4g== =1KGr -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmJO0doACgkQmmx57+YA GNlkDg/+KbDojSclosmC90vGT/dfgQ5Vj3e/frFTyQN/Dd28cnJLz4agoleWz/TD ouazIm8OKSt35qsn1CgnWn/h3gpvn6U2/Ejms//69tJdPfTRa3Hv0fnHo//It9co LQgTtXSlf69wA89YnDS1VXryjKJJXvyxoNeEv0CUmM81p01kH17LCOgnDKJSDKIK YKnPGE+SLOOUDyF4/0Fy6pihk8mBczkO5jnZAqnILfYdaYbG2BYS0mPdKWaSR2fa 9oLeM9CcUSYw/k5e1O+WoXiXQnaauINTgtn7sIcaCxo8DF7FwHiHUCi+vm0HwyWm c0ziqA1c2Tx8DVGLrq7ex3v5O89jPdkBI70SsOHEiqw5v3znTjpWbvcFX64V8rVv ZJg0i/j2xBX8eazlV1q+ssachMe+1r5CjZPaW0e70xFlr3HEKRG7Wiu0dUHhQ0RC BIVb5cMJvMGCxbkwWaPPasq0q78KnCDThVHWahJskc1KHhKI49LqF6BQMJQvGG3u n9+4OI0AI+WLspB8g4eRaS2/VBHndeDt3yhY7nz/tdacUa9xNJfzNpcLqlPrdiwA niyRhuQInIE1h7iut2iPTwG6LVLE9HjQy2sGYwZg392Mhk6Ugf61uArKu2WCw/Kf Si5rj3nbbCJvnxakuNtekbQVP4kLgWqmYRLSpcYzbcUQOX92nKw= =BmJv -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-fixes-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/fixes Memory controller drivers - fixes for v5.18 Issues in v5.18: 1. Freescale/NXP: fix populating children of Integrated Flash Controller DT nodes. Issues existing before: 1. Renesas: fix platform-device leak in probe's error path. 2. Atmel: fix of_node reference leak in probe's error path. 3. Synopsys: correct the bindings for snps,ddrc-3.80a (interrupts are required). * tag 'memory-controller-drv-fixes-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: fsl_ifc: populate child nodes of buses and mfd devices dt-bindings: memory: snps,ddrc-3.80a compatible also need interrupts memory: atmel-ebi: Fix missing of_node_put in atmel_ebi_probe memory: renesas-rpc-if: fix platform-device leak in error path Link: https://lore.kernel.org/r/20220407081448.113208-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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b2fa90ef62 |
powerpc/85xx: Remove fsl,85... bindings
Since
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4f9f45d0eb |
dt-bindings: memory: snps,ddrc-3.80a compatible also need interrupts
For the snps,ddrc-3.80a compatible, the interrupts property is also
required, also order the compatibles by name (s goes before x).
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Fixes:
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8a1e6bb3f7 |
dt-bindings: update Krzysztof Kozlowski's email
Krzysztof Kozlowski's @canonical.com email stopped working, so switch to generic @kernel.org account for all Devicetree bindings. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20220330074016.12896-2-krzysztof.kozlowski@linaro.org |
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fba2689ee7 |
Merge branch 'remove-h8300' of git://git.infradead.org/users/hch/misc into asm-generic
* 'remove-h8300' of git://git.infradead.org/users/hch/misc: remove the h8300 architecture This is clearly the least actively maintained architecture we have at the moment, and probably the least useful. It is now the only one that does not support MMUs at all, and most of the boards only support 4MB of RAM, out of which the defconfig kernel needs more than half just for .text/.data. Guenter Roeck did the original patch to remove the architecture in 2013 after it had already been obsolete for a while, and Yoshinori Sato brought it back in a much more modern form in 2015. Looking at the git history since the reinstantiation, it's clear that almost all commits in the tree are build fixes or cross-architecture cleanups: $ git log --no-merges --format=%an v4.5.. arch/h8300/ | sort | uniq -c | sort -rn | head -n 12 25 Masahiro Yamada 18 Christoph Hellwig 14 Mike Rapoport 9 Arnd Bergmann 8 Mark Rutland 7 Peter Zijlstra 6 Kees Cook 6 Ingo Molnar 6 Al Viro 5 Randy Dunlap 4 Yury Norov Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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9bf3fc5007 |
Devicetree updates for v5.18:
- Add Krzysztof Kozlowski as co-maintainer for DT bindings providing much needed help. - DT schema validation now takes DTB files as input rather than intermediate YAML files. This decouples the validation from the source level syntax information. There's a bunch of schema fixes as a result of switching to DTB based validation which exposed some errors and incomplete schemas and examples. - Kbuild improvements to explicitly warn users running 'make dt_binding_check' on missing yamllint - Expand DT_SCHEMA_FILES kbuild variable to take just a partial filename or path instead of the full path to 1 file. - Convert various bindings to schema format: mscc,vsc7514-switch, multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma, msm/mdp4, rda,8810pl-uart - New schemas for u-boot environment variable partition, TI clksel - New compatible strings for Renesas RZ/V2L SoC - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated HiSilicon - Add/fix schemas for QEMU Arm 'virt' machine - Drop unused of_alias_get_alias_list() function - Add a script to check DT unittest EXPECT message output. Pass messages also now print by default at PR_INFO level to help test automation. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmI8s64QHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhwx3tD/4j56NE+aLkL636+I8tGFm3r+r6uLLT4SWh zDuiX3MP9OKfhJw43TjjURLwX5adBnG3nn505IXcAeiMRgEiciOpSa12w0mXyjMX QgVOcoaI3H2GBMEddJRo1PLTM/K5sYzZxAKLB827xoOk4mGNA0ZBAHvlB3W+yLE5 CE5yTaFoL4EMXuhWMtMrMlG1PQrbO3FpQ2DHBKrpxHPJmnHLk3c0YtMSTHGQnWbN AxT3S6RSsOLwLzZAXi2AlswqY82n5KtUf/RBrYi8rdr/xnIsCfMeXxafkP2Hyxkq L9RfKVn05c0LRtO1Eh8kYr+lmYmcWz/SIdJZXzpviIgE9MJapCAk0blBZ4S/FH0B EVGB1JkwCZFck6DBmkNJxAwR0iQOGWkJIkn6iBPNF0dHp58eE6adaXjhFH3uBEHk dXFaxPlvZ3P/Q2I/vmQ//m5tZMyjeCY2BlVYpkUJMOFfN26MIGHUmUlLnovLDqu4 lYgZG4V244uYzALLbURpbp+5dlPH/PL2gxvJJNqTS+/hXktQx1XnML4wD+xfJ4nT OY5DD7Z+KGBrdsMtxkFtIFvKD63E2gtAR5RZO0J/txlzhW7Wg6fJbhJZeRFhZKmN GAfud2s6rliyygByBL4ea50DSLLQpc/9HZtFmZ3NTILM6NbUR74sHt+1EZ1hee+M LaNsSscHuQ== =g1li -----END PGP SIGNATURE----- Merge tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Add Krzysztof Kozlowski as co-maintainer for DT bindings providing much needed help. - DT schema validation now takes DTB files as input rather than intermediate YAML files. This decouples the validation from the source level syntax information. There's a bunch of schema fixes as a result of switching to DTB based validation which exposed some errors and incomplete schemas and examples. - Kbuild improvements to explicitly warn users running 'make dt_binding_check' on missing yamllint - Expand DT_SCHEMA_FILES kbuild variable to take just a partial filename or path instead of the full path to 1 file. - Convert various bindings to schema format: mscc,vsc7514-switch, multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma, msm/mdp4, rda,8810pl-uart - New schemas for u-boot environment variable partition, TI clksel - New compatible strings for Renesas RZ/V2L SoC - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated HiSilicon - Add/fix schemas for QEMU Arm 'virt' machine - Drop unused of_alias_get_alias_list() function - Add a script to check DT unittest EXPECT message output. Pass messages also now print by default at PR_INFO level to help test automation. * tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (96 commits) dt-bindings: kbuild: Make DT_SCHEMA_LINT a recursive variable dt-bindings: nvmem: add U-Boot environment variables binding dt-bindings: ufs: qcom: Add SM6350 compatible string dt-bindings: dmaengine: sifive,fu540-c000: include generic schema dt-bindings: gpio: pca95xx: drop useless consumer example Revert "of: base: Introduce of_alias_get_alias_list() to check alias IDs" dt-bindings: virtio,mmio: Allow setting devices 'dma-coherent' dt-bindings: gnss: Add two more chips dt-bindings: gnss: Rewrite sirfstar binding in YAML dt-bindings: gnss: Modify u-blox to use common bindings dt-bindings: gnss: Rewrite common bindings in YAML dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible dt-bindings: ata: ahci-platform: Add power-domains property dt-bindings: ata: ahci-platform: Convert DT bindings to yaml dt-bindings: kbuild: Use DTB files for validation dt-bindings: kbuild: Pass DT_SCHEMA_FILES to dt-validate dt-bindings: Add QEMU virt machine compatible dt-bindings: arm: Convert QEMU fw-cfg to DT schema dt-bindings: i2c: at91: Add SAMA7G5 compatible strings list dt-bindings: i2c: convert i2c-at91 to json-schema ... |
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608f7cf3f5 |
Memory controller drivers for v5.18, part two
1. TI: Two fixes for TI EMIF driver for quite old error path issues (so for unlikely scenarios). 2. Renesas: Document RZ/V2L SoC in bindings. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmIlwKkQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1xakD/sEI2EmFjcWr3eJmfud3+ZmJdyIV1aiQUN/ 3ClkRg/M5205zMxUj7mBoeG9nyuVWp5FuUgkY28ThvgsSbSgBwvDYZJMe//YLnNW ObDgStiu157KgfRpkZNMd5DqI0KHD++b0lrdjc3H1KWNm0bouDwKScBwEYgllLu+ gj9g5galOMhLszR2PI4FV6r/AQ4E0YIMnGSiZ87MctzNQlQVDgXrPn0G/+wqZCk4 kobFjjm9mwnqTG3LoBvUF+cjpxqWUoBLJ3+/R91iSA7OtvLsxYWoOznWXr26jNRW L3cbvAHWNriaxRP9z+nDhRsg7YFQXf69q1NFhUkicFEmN+TXf35toMkDa6eF30YT 8HCSKAqY4nb8CCTYmdgecxmXG5PTyp+B1dL0UDTHU2EcnNcKysmCiEMYUQW4LK46 YBxg5vM6XWKbqau1jszFp4ODOj+OSSBqPIvKKPrvsYBhqnSNddiyuBC32DGV6J1o ZUHZ85hgVfceAwtJtSqYYvO+wEgyWAZlLGr31xj8W4TUkfewIBthWfRX+OS9Q+yq qSNO1hXTwlbQ7+Bphoq/VrNhBDLW7AMyy7RWYhPR5p7lmUj/OQcoGWPeWDLAn2r5 F6kzsXxkr3dASTx4D2Pe6kXIDyuhAWv+Mr7heg0bl2XtvegjROTu9D/0rYufOp81 aavcdNwfPA== =f06i -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmInezoACgkQmmx57+YA GNltdRAAsGOjZI9OIL5U9+qd1kbMOyG1IRqrwPW8B+rNJW35O5Z/yswo3B5w4AIx Km4VrVNrGmNOCCrSB9kxyKjYcIMQZQWhhR8TjULU+lSCJEOke9XJXjzGJB0Jmbba vf2OILxnfMA8GFPQqnXaXe7H4o5/Km++jxn7qHUj9i71sCQRhSWHuAnTluOVgdBA /oYRg4UNfvJv2jconZ7bDwI6digxediMjT74xI3kkYyCBEbNP16hTCZYJmO1iMQp d/vsiQG6FkfdZBqTgYFsLojPiwal68z709FqaqZPGOMuP4SoykgmQB9tU/elQqMd ZAgGKosLylBRbzKYGay1SD9SPS1VjgncHavqhH7ofNwwJ4vikITCDvL1C4TehCjA rQpm1kWONLo+NaKOHrtvdjHQvpXRMC+qG6U4XXKrMn/vi924kZrz30EKDH+5HHN5 iBgELvokfnrdwGLkVG1TB+qgFwFtKGUBJ0sqXxVP2byQYqNELzHfG8Q45vOCWWvW 82vUj7wpwSTKWlHBDsy0GQXRRuYuOtwXS5WEW/8doAwLI9hp1CrU/V8I2oLf0xGm /sgvp+rw57TgtOrcXJS2Sjf7bbbIv5WF8L7Xuq9qJYk6Uyh/ZuF/NHpd0KRoeykP 9w25UgrxiSFyZNhhDz+c4UWir3xlaPDBLtSzlZ3itAaQ8IfX1xs= =Fe+j -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.18, part two 1. TI: Two fixes for TI EMIF driver for quite old error path issues (so for unlikely scenarios). 2. Renesas: Document RZ/V2L SoC in bindings. * tag 'memory-controller-drv-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC memory: emif: check the pointer temp in get_device_details() memory: emif: Add check for setup_interrupts Link: https://lore.kernel.org/r/20220307082552.55719-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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69d6941949 |
dt-bindings: memory: renesas,rpc-if: Document RZ/V2L SoC
Document RZ/V2L RPC-IF bindings. RZ/V2L RPC-IF is identical to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-rpc-if" will be used as a fallback. While at it, drop the comment "# RZ/G2L family" for "renesas,rzg2l-rpc-if" compatible string as this will avoid changing the line for every new SoC addition. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220301123527.15950-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
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88c7385290 |
Memory controller drivers for v5.18 - Mediatek SoC
1. Several updates in the MTK SMI bindings. 2. Add support for MT8186 MTK SMI and improvements in support for MT8195. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmIc+t8QHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD10TUD/wMFqZN6N1363avdimmxK+kgBEHeAFCYd1U Hg9eHWnfWnLoMBV4n91seE9kUHkJQYcI5YMJGtjKvyBB+nJzsK98XsjSJSmie6YI 0rUtllQ6z+bAEQPoZi8Z1u9iqktjVpzgWwQBN3fpC6mwNtRNXNsw9Y33qiDY3sO8 WfRJxSKRG+N/W5FT/BP3pX8FIi3+i+FkKNs7YEky15Vcriq5FlJGRDE0qGMRN/FO kJ10XU0Qeo3BcKwjk4Cv4RucoawhQbFLST5U36c3J9goUGZG5rcbWszBAB5SvRme CrZXcvL7E6wjzbgLFwCp9Ci5F66rkuigxl0GiSOJI8DhOWPcxmLMB0PPxf5Fa8cg pfMih48/I7f5syxmSeFgPe4nxLV5ARbZobWP0GHQ/NqtsUaamKAVXDQGDVRaGiU0 ZK1eOG15gFaX0eNxmyYIuNAeZzDRoxbeFsgj4S0hUmhRiO7C2qSQbxT/aRYSFXrW pgoXCKmxWY2dgqgR+v8A6SoHXwih93Irp15TkbimSS3mqkpyOJic1JelCgw7aZiQ mXtwTjqMidYQ1BZgbZBM9wb4y6w2y1gNIDgQq62Mb957a1OFda5XC9iae7+zZWMJ wq6lztAOEfmxgeicxmg5zanSGI+AuFZWR7RLhK9aAAiKc5EEaRsWgQfrPqxcKqg0 w3bxG6naAw== =V7gd -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmId7NwACgkQmmx57+YA GNkFdBAArWHbYlA28Ud5e/cDIgvaD6mQiXBmw+fz0yHHqQpkZMs74whJsJmQzaNp gJDs9/pakjPJc+tEa7Y19t0W2i+ppfpdUo43yth4KRT3RMvmuFW4Ir5HC6ipRQRy tYWTJNL+Qmkv1Xtqz1BThyw/pJN8M1Uv+wqCi6iWFw1V2xShXRJ5pWEtEoROPLxq EK8c+STsipRnmsYPc27trjpjwxoswGShC6HVZzQQBJKO9UnTStPJ0TMCvZdUiMw8 LIhe3r8t3kLeuxMnAElCA++eMFgLfCrS+uqcoQXAwWR1qiZzBj80LPNggMsNLMsG +rR/5opOGzrk6mGkGYhnFB59zhoO0Qb43NG+xNdEgH72opOiuhCMWEP5CoA2v1Rv CHLaPme5jVWbhuHISOLbBSS26kt6teg4gj8FBs9a6d0/lyWrqEka/9G7LJcdhG8N IOHz71+WY3cbhxLjyJH2lujZfzsaG/n0XHw4BIlZrD+AWraeEKQt/MlVpK/f/5B/ GtvZMa+C1O4/Uzhp1dPbZFulIOzRzVZ5uGJ/LESPmSkf5UncePBMDwEDaCz78d5/ oNcdJspM3FJwEtOsr3k6+wc4Jk3P/tXr7xxDDNKXkHQuTH04LPywo6yPCB/9KeMb NXQbY7i6crGPwnws5CxAUamhqkt7ZMC/oBFWHlMtoZYz1KQllj0= =Bquy -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-mediatek-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.18 - Mediatek SoC 1. Several updates in the MTK SMI bindings. 2. Add support for MT8186 MTK SMI and improvements in support for MT8195. * tag 'memory-controller-drv-mediatek-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: Enable sleep ctrl safety function for MT8195 memory: mtk-smi: mt8186: Add smi support memory: mtk-smi: Add sleep ctrl function memory: mtk-smi: handle positive return value for clk_bulk_prepare_enable dt-bindings: memory: mediatek: Add mt8186 support dt-bindings: memory: mtk-smi: Correct minItems to 2 for the gals clocks dt-bindings: memory: mtk-smi: No need mediatek,larb-id for mt8167 dt-bindings: memory: mtk-smi: Rename clock to clocks Link: https://lore.kernel.org/r/20220228164313.52931-2-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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80ce91730d |
dt-bindings: memory: lpddr2: Adjust revision ID property to match lpddr3
Commit
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1c4b5ecb7e |
remove the h8300 architecture
Signed-off-by: Christoph Hellwig <hch@lst.de> |
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42f94bb962 |
dt-bindings: memory: lpddr3: deprecate passing timings frequency as unit address
The timings node maximum frequency was passed as an unit address, which is actually a workaround. Such workaround and unit address are not needed at all, because the device memory node (parent) can contain multiple timing nodes without unit addresses but with suffix used for nodenames, e.g. timings-1. LPDDR2 bindings already use such version, so unify the LPDDR3 with them. Suggested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220206135807.211767-7-krzysztof.kozlowski@canonical.com |
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e531932c71 |
dt-bindings: memory: lpddr3: deprecate manufacturer ID
The memory manufacturer should be described in vendor part of compatible, so there is no need to duplicate it in a separate property. Similarly is done in LPDDR2 bindings. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220206135807.211767-6-krzysztof.kozlowski@canonical.com |
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d98e72b6f9 |
dt-bindings: memory: lpddr3: adjust IO width to spec
According to JEDEC Standard No. 209-3 (table 3.4.1 "Mode Register Assignment and Definition in LPDDR3 SDRAM"), the LPDDR3 supports only 16- and 32-bit IO width. Drop the unsupported others. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220206135807.211767-5-krzysztof.kozlowski@canonical.com |
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28f818580e |
dt-bindings: memory: lpddr3: convert to dtschema
Convert the LPDDR3 memory bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220206135807.211767-4-krzysztof.kozlowski@canonical.com |
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180a276c99 |
dt-bindings: memory: lpddr3-timings: convert to dtschema
Convert the LPDDR3 memory timings bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220206135807.211767-3-krzysztof.kozlowski@canonical.com |
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425fd283e4 |
dt-bindings: memory: lpddr2-timings: convert to dtschema
Convert the LPDDR2 memory timings bindings to DT schema format. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220206135807.211767-2-krzysztof.kozlowski@canonical.com |
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39bd2b6a37 |
dt-bindings: Improve phandle-array schemas
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it. The array of phandles case boils down to needing: items: maxItems: 1 The phandle plus args cases should typically take this form: items: - items: - description: A phandle - description: 1st arg cell - description: 2nd arg cell With this change, some examples need updating so that the bracketing of property values matches the schema. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20220119015038.2433585-1-robh@kernel.org |
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985ede63a0 |
dt-bindings: memory: fsl: convert ifc binding to yaml schema
Convert the txt binding to yaml format and add description. Drop the "simple-bus" compatible string from the example and not allowed by the binding any more. This will help to enforce the correct probe order between parent device and child devices, but will require the ifc driver to probe the child devices to work properly. Signed-off-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211116211846.16335-2-leoyang.li@nxp.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
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6d86f23c35 |
dt-bindings: memory: mediatek: Add mt8186 support
Add mt8186 smi support in the bindings. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220113111057.29918-5-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
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996ebc0e33 |
dt-bindings: memory: mtk-smi: Correct minItems to 2 for the gals clocks
Mute the warning from "make dtbs_check":
larb@14017000: clock-names: ['apb', 'smi'] is too short
arch/arm64/boot/dts/mediatek/mt8183-evb.dt.yaml
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dt.yaml
...
larb@16010000: clock-names: ['apb', 'smi'] is too short
arch/arm64/boot/dts/mediatek/mt8183-evb.dt.yaml
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dt.yaml
larb@17010000: clock-names: ['apb', 'smi'] is too short
arch/arm64/boot/dts/mediatek/mt8183-evb.dt.yaml
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-burnet.dt.yaml
If a platform's larb supports gals, there will be some larbs have one
more "gals" clock while the others still only need "apb"/"smi" clocks,
then the minItems for clocks and clock-names are 2.
Fixes:
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ddc3a32488 |
dt-bindings: memory: mtk-smi: No need mediatek,larb-id for mt8167
Mute the warning from "make dtbs_check":
larb@14016000: 'mediatek,larb-id' is a required property
arch/arm64/boot/dts/mediatek/mt8167-pumpkin.dt.yaml
larb@15001000: 'mediatek,larb-id' is a required property
arch/arm64/boot/dts/mediatek/mt8167-pumpkin.dt.yaml
larb@16010000: 'mediatek,larb-id' is a required property
arch/arm64/boot/dts/mediatek/mt8167-pumpkin.dt.yaml
As the description of mediatek,larb-id, the property is only
required when the larbid is not consecutive from its IOMMU point of view.
Also, from the description of mediatek,larbs in
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml, all the larbs
must sort by the larb index.
In mt8167, there is only one IOMMU HW and three larbs. The drivers already
know its larb index from the mediatek,larbs property of IOMMU, thus no
need this property.
Fixes:
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5bf7fa4837 |
dt-bindings: memory: mtk-smi: Rename clock to clocks
The property "clock" should be rename to "clocks", and delete the "items",
the minItems/maxItems should not be put under "items".
Fixes:
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4eb766f64d |
Devicetree updates for v5.17:
Bindings: - DT schema conversions for Samsung clocks, RNG bindings, Qcom Command DB and rmtfs, gpio-restart, i2c-mux-gpio, i2c-mux-pinctl, Tegra I2C and BPMP, pwm-vibrator, Arm DSU, and Cadence macb - DT schema conversions for Broadcom platforms: interrupt controllers, STB GPIO, STB waketimer, STB reset, iProc MDIO mux, iProc PCIe, Cygnus PCIe PHY, PWM, USB BDC, BCM6328 LEDs, TMON, SYSTEMPORT, AMAC, Northstar 2 PCIe PHY, GENET, moca PHY, GISB arbiter, and SATA - Add binding schemas for Tegra210 EMC table, TI DC-DC converters, - Clean-ups of MDIO bus schemas to fix 'unevaluatedProperties' issues - More fixes due to 'unevaluatedProperties' enabling - Data type fixes and clean-ups of binding examples found in preparation to move to validating DTB files directly (instead of intermediate YAML representation. - Vendor prefixes for T-Head Semiconductor, OnePlus, and Sunplus - Add various new compatible strings DT core: - Silence a warning for overlapping reserved memory regions - Reimplement unittest overlay tracking - Fix stack frame size warning in unittest - Clean-ups of early FDT scanning functions - Fix handling of "linux,usable-memory-range" on EFI booted systems - Add support for 'fail' status on CPU nodes - Improve error message in of_phandle_iterator_next() - kbuild: Disable duplicate unit-address warnings for disabled nodes -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmHfCdcQHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhw+UZD/0ZMQQ6VF20MW7Gg0bOutd8Q6Q6opjrCG5c nLW5mv8Q+um3sI1ZpwdMI4zAfCmTfeL13ZM9KtJKlJ0o41bgId+kZsezy4I2rN9+ sE1CwA4TninKTJsUkmyQX4fgJRUZ95Eubryfb07sy7nbK3LZQ+t18R5tzVBDpzy4 7hy4eM6mlMxgIJDi7EUboLZslkMM4TGGutLsk5C5T5V5lcWSt3Jj5WZtl5k4Wykq j4i9mU+GGTZi0nGAJQ7lNoLPatZDSVQx5tzNV/Wi8hSwZbn0Kycu+IuWZyihILz/ 9lzB/7tv8fl+xkTaJ5xxaY05HcDeX02yCLzh3PfAHRYdbQ2EkFoaKqJ81SLfAq5t aH87v41wFSrjzynxpppqswXOdqI/jofrHrGlQldnw0VHGTjEfDbyZGRQFPHmuzTG gXaSNKCxppG7ThpXarfu7D4TdYV75n+cBOsC/BBopYgIS2+xmjDA3t5Scks1/4NX 1Hfq9IMF9iYJYc/GNXBWcOrLn9d1ILYt6HrKRQar1NIEFH1Lt0c2aw5WsyvOZ4zx aLHLSbEwnl+2wleyGB9YQkFaaF7N6qcid3u9KFRJP6nTojoaeQaIi3MR9F3LVReZ LV5YfWEcij1zc+lzwgHc6+8bbgFxrKgOC2IL/B6u93u/BO0wmF/54kbEZKaLyX8d a7Iii4IYFw== =2g8v -----END PGP SIGNATURE----- Merge tag 'devicetree-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "Bindings: - DT schema conversions for Samsung clocks, RNG bindings, Qcom Command DB and rmtfs, gpio-restart, i2c-mux-gpio, i2c-mux-pinctl, Tegra I2C and BPMP, pwm-vibrator, Arm DSU, and Cadence macb - DT schema conversions for Broadcom platforms: interrupt controllers, STB GPIO, STB waketimer, STB reset, iProc MDIO mux, iProc PCIe, Cygnus PCIe PHY, PWM, USB BDC, BCM6328 LEDs, TMON, SYSTEMPORT, AMAC, Northstar 2 PCIe PHY, GENET, moca PHY, GISB arbiter, and SATA - Add binding schemas for Tegra210 EMC table, TI DC-DC converters, - Clean-ups of MDIO bus schemas to fix 'unevaluatedProperties' issues - More fixes due to 'unevaluatedProperties' enabling - Data type fixes and clean-ups of binding examples found in preparation to move to validating DTB files directly (instead of intermediate YAML representation. - Vendor prefixes for T-Head Semiconductor, OnePlus, and Sunplus - Add various new compatible strings DT core: - Silence a warning for overlapping reserved memory regions - Reimplement unittest overlay tracking - Fix stack frame size warning in unittest - Clean-ups of early FDT scanning functions - Fix handling of "linux,usable-memory-range" on EFI booted systems - Add support for 'fail' status on CPU nodes - Improve error message in of_phandle_iterator_next() - kbuild: Disable duplicate unit-address warnings for disabled nodes" * tag 'devicetree-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (114 commits) dt-bindings: net: mdio: Drop resets/reset-names child properties dt-bindings: clock: samsung: convert S5Pv210 to dtschema dt-bindings: clock: samsung: convert Exynos5410 to dtschema dt-bindings: clock: samsung: convert Exynos5260 to dtschema dt-bindings: clock: samsung: extend Exynos7 bindings with UFS dt-bindings: clock: samsung: convert Exynos7 to dtschema dt-bindings: clock: samsung: convert Exynos5433 to dtschema dt-bindings: i2c: maxim,max96712: Add bindings for Maxim Integrated MAX96712 dt-bindings: iio: adi,ltc2983: Fix 64-bit property sizes dt-bindings: power: maxim,max17040: Fix incorrect type for 'maxim,rcomp' dt-bindings: interrupt-controller: arm,gic-v3: Fix 'interrupts' cell size in example dt-bindings: iio/magnetometer: yamaha,yas530: Fix invalid 'interrupts' in example dt-bindings: clock: imx5: Drop clock consumer node from example dt-bindings: Drop required 'interrupt-parent' dt-bindings: net: ti,dp83869: Drop value on boolean 'ti,max-output-impedance' dt-bindings: net: wireless: mt76: Fix 8-bit property sizes dt-bindings: PCI: snps,dw-pcie-ep: Drop conflicting 'max-functions' schema dt-bindings: i2c: st,stm32-i2c: Make each example a separate entry dt-bindings: net: stm32-dwmac: Make each example a separate entry dt-bindings: net: Cleanup MDIO node schemas ... |
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c01d85c219 |
MTD core changes:
* mtdchar: Prevent unbounded allocation in MEMWRITE ioctl * gen_probe: Use bitmap_zalloc() when applicable * Introduce an expert mode for forensics and debugging purposes * Clear out unregistered devices a bit more * Provide unique name for nvmem device * Remove unused header file <linux/mtd/latch-addr-flash.h> * Fixed breaking list in __mtd_del_partition. MTD device changes: * sst25l, mchp48l640, mchp23k256, dataflash: - Warn about failure to unregister mtd device Raw NAND core changes: * Export nand_read_page_hwecc_oob_first() GPMC memory controller for OMAP2 NAND controller changes: * GPMC: - Add support for AM64 SoC and allow build on K3 platforms - Use a compatible match table when checking for NAND controller - Use platform_get_irq() to get the interrupt Raw NAND controller changes: * OMAP2 NAND controller: - Document the missing 'rb-gpios' DT property - Drop unused variable - Fix force_8bit flag behaviour for DMA mode - Move to exec_op interface - Use platform_get_irq() to get the interrupt * Renesas: - Add new NAND controller driver with its bindings and MAINTAINERS entry * Onenand: - Remove redundant variable ooblen * MPC5121: - Remove unused variable in ads5121_select_chip() * GPMI: - Add ERR007117 protection for nfc_apply_timings - Remove explicit default gpmi clock setting for i.MX6 - Use platform_get_irq_byname() to get the interrupt - Remove unneeded variable * Ingenic: - JZ4740 needs 'oob_first' read page function * Davinci: - Rewrite function description - Avoid duplicated page read - Don't calculate ECC when reading page SPI NOR core changes: * Add Pratyush as SPI NOR co-maintainer. * Flash parameters initialization was done in a spaghetti way. Clean flash parameters initialization. * Rework the flash_info flags and clarify where one should be used. * Initialize all flash parameters based on JESD216 SFDP where possible. Flash parameters and settings that are SFDP discoverable should not be duplicated via flash_info flags at flash declaration. * Remove debugfs entries that duplicate sysfs entries. SPI NOR manufacturer driver changes: * Use late_init() hook in various drivers to make it clear that those flash parameters are either not declared in the JESD216 SFDP standard, or the SFDP tables which define those flash parameters are not defined by the flash. * Fix mtd size for s3an flashes. * Write 2 bytes when disabling Octal DTR mode: 1 byte long transactions are not allowed in 8D-8D-8D mode. Hyperbus changes: * Couple of fixes in Renesas hyperbus rpc-if driver to avoid crash on module remove and for missing check for error value in probe. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmHO+g8ACgkQJWrqGEe9 VoRW1AgAjFC58ARNBw7asYerGyiUWv7b8RjPIRWZqmcSQ6D5m20cGNBTa15c2NrC v0dNMf2+3FrCECso6wKPbkEbLt9lHjlMmt+AdlraV0QvHBXrJq/Tc2p2ATI5kTqq WaP4oCx1mccgO+IrEIiGikOcFx/TLBBJEk+U0Anbm16eia9Cjw+uD/q7X2HbF5xQ MOFZyQ+rAVqkM8tCh6VHhCpX85pn9pj2ZdouOhPWsqjULaGqDbUopC70YPZLVJyx 9u4xHFaVLVae6AS5Gitser2ie8klypTN/H+1weSao43GGmwIrT0wK0mCOVIm90Zd 4frlpnt4QE/IIAKgAm+HxkWg+KV9qg== =E8lV -----END PGP SIGNATURE----- Merge tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Miquel Raynal: "MTD core changes: - mtdchar: Prevent unbounded allocation in MEMWRITE ioctl - gen_probe: Use bitmap_zalloc() when applicable - Introduce an expert mode for forensics and debugging purposes - Clear out unregistered devices a bit more - Provide unique name for nvmem device - Remove unused header file <linux/mtd/latch-addr-flash.h> - Fixed breaking list in __mtd_del_partition. MTD device changes: - Warn about failure to unregister mtd device in sst25l, mchp48l640, mchp23k256, and dataflash drivers. Raw NAND core changes: - Export nand_read_page_hwecc_oob_first() GPMC memory controller for OMAP2 NAND controller changes: - Add support for AM64 SoC and allow build on K3 platforms - Use a compatible match table when checking for NAND controller - Use platform_get_irq() to get the interrupt Raw NAND controller changes: - OMAP2 NAND controller: - Document the missing 'rb-gpios' DT property - Drop unused variable - Fix force_8bit flag behaviour for DMA mode - Move to exec_op interface - Use platform_get_irq() to get the interrupt - Renesas: - Add new NAND controller driver with its bindings and MAINTAINERS entry - Onenand: - Remove redundant variable ooblen - MPC5121: - Remove unused variable in ads5121_select_chip() - GPMI: - Add ERR007117 protection for nfc_apply_timings - Remove explicit default gpmi clock setting for i.MX6 - Use platform_get_irq_byname() to get the interrupt - Remove unneeded variable - Ingenic: - JZ4740 needs 'oob_first' read page function - Davinci: - Rewrite function description - Avoid duplicated page read - Don't calculate ECC when reading page SPI NOR core changes: - Add Pratyush as SPI NOR co-maintainer. - Flash parameters initialization was done in a spaghetti way. Clean flash parameters initialization. - Rework the flash_info flags and clarify where one should be used. - Initialize all flash parameters based on JESD216 SFDP where possible. Flash parameters and settings that are SFDP discoverable should not be duplicated via flash_info flags at flash declaration. - Remove debugfs entries that duplicate sysfs entries. SPI NOR manufacturer driver changes: - Use late_init() hook in various drivers to make it clear that those flash parameters are either not declared in the JESD216 SFDP standard, or the SFDP tables which define those flash parameters are not defined by the flash. - Fix mtd size for s3an flashes. - Write 2 bytes when disabling Octal DTR mode: 1 byte long transactions are not allowed in 8D-8D-8D mode. Hyperbus changes: - Couple of fixes in Renesas hyperbus rpc-if driver to avoid crash on module remove and for missing check for error value in probe" * tag 'mtd/for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (71 commits) mtd: spi-nor: Remove debugfs entries that duplicate sysfs entries mtd: spi-nor: micron-st: write 2 bytes when disabling Octal DTR mode mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode mtd: spi-nor: core: use 2 data bytes for template ops mtd: spi-nor: Constify part specific fixup hooks mtd: spi-nor: core: Remove reference to spi-nor.c mtd: rawnand: gpmi: Use platform_get_irq_byname() to get the interrupt mtd: rawnand: omap_elm: Use platform_get_irq() to get the interrupt mtd: rawnand: omap2: Select GPMC device driver for ARCH_K3 memory: omap-gpmc: Use a compatible match table when checking for NAND controller memory: omap-gpmc: Add support for GPMC on AM64 SoC dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64 memory: omap-gpmc: Use platform_get_irq() to get the interrupt MAINTAINERS: Add an entry for Renesas NAND controller mtd: rawnand: renesas: Add new NAND controller driver dt-bindings: mtd: renesas: Describe Renesas R-Car Gen3 & RZ/N1 NAND controller mtd: rawnand: gpmi: remove unneeded variable mtd: rawnand: omap2: drop unused variable mtd: rawnand: omap2: fix force_8bit flag behaviour for DMA mode mtd: rawnand: omap2: Add compatible for AM64 SoC ... |
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ff8be96420 |
- Add support for version 3 of the Synopsys DDR controller to synopsys_edac
- Add support for DRR5 and new models 0x10-0x1f and 0x50-0x5f of AMD family 0x19 CPUs to amd64_edac - The usual set of fixes and cleanups -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmHb/PwACgkQEsHwGGHe VUqhbhAAo0mRNnBF3CJn1zlXRgmqrvV1IPnJQNp+z5iaXY1vr0qRMgO4OcgsJrxF nxrx/fdAYlQQO4vz1iq4t4j+eazOQyM/JZ0DKi4e+Dw2mC0axdCx8a0pyl1g2de6 oQ5GkplRKUFn+3bTJpHIE5QnCOD7S85Mrp1F3Soa6jD9i+HwQIqAoltNMcCP7Yei ibhWUBX2H/oYcHARecIkP/YEyzSEHhcX6LRjNILW5haZQ6GziQUFzKUUwpUS3hsz 9i6hXnHXEPhOq8JyoyWWhvVDywFK9z8lh57G7DFfZIhAk1FjuLDP2iI270D/LkYF shq6+M8ST9yqwOMV3Iaoa8VZFf/fjTyV0E0L2p2+faxaJ66rqdzbagLIZQv6hDNe N1/LD72/Io4et1kEbbaHm5jpxzSJ0jQwu1o+rY1/NmKsWhzE6V4X0GnDTZzZwP9b CbFJAWdCD+fi3WQjzv8HLVepjIsV+R3VVTOLq2oodn/mtoK0DRU/vTeCCwRS9ntF IyF55L/jSqy9CtP119KBnItGo4b84UrJDozXizGtc6Zt3chz7ljSpa2gJrKF+fCR Yhyr9Pt+vYQBpnIMDu1BPcoE58pwZYKoOSO00COUHHsLn+u8qhetGmQzYwWHCq7J hz8HHZnlTdFseZTp5tavk3B4md5HiPu+A7GevK3YH3lBv/vEmDM= =85ZE -----END PGP SIGNATURE----- Merge tag 'edac_updates_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras Pull EDAC updates from Borislav Petkov: - Add support for version 3 of the Synopsys DDR controller to synopsys_edac - Add support for DRR5 and new models 0x10-0x1f and 0x50-0x5f of AMD family 0x19 CPUs to amd64_edac - The usual set of fixes and cleanups * tag 'edac_updates_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras: EDAC/amd64: Add support for family 19h, models 50h-5fh EDAC/sb_edac: Remove redundant initialization of variable rc RAS/CEC: Remove a repeated 'an' in a comment EDAC/amd64: Add support for AMD Family 19h Models 10h-1Fh and A0h-AFh EDAC: Add RDDR5 and LRDDR5 memory types EDAC/sifive: Fix non-kernel-doc comment dt-bindings: memory: Add entry for version 3.80a EDAC/synopsys: Enable the driver on Intel's N5X platform EDAC/synopsys: Add support for version 3 of the Synopsys EDAC DDR EDAC/synopsys: Use the quirk for version instead of ddr version |
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aca48b2dd1 |
ARM: SoC devicetree changes for v5.17
As usual, this is the bulk of the updates for the SoC tree, adding more devices to existing files, addressing issues from ever improving automated checking, and fixing minor issues. The most interesting bits as usual are the new platforms. All the newly supported SoCs belong into existing families this time: - Qualcomm gets support for two newly announced platforms, both of which can now work in production environments: the SDX65 5G modem that can run a minimal Linux on its Cortex-A7 core, and the Snapdragon 8 Gen 1, their latest high-end phone SoC. - Renesas adds support for R-Car S4-8, the most recent automotive Server/Communication SoC. - TI adds support for J721s2, a new automotive SoC in the K3 family. - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest generation following their popular MT76xx series. Only basic support is added for now. - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8 series. - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we have supported for a long time. New boards with the existing SoCs include - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers - AT91/SAMA5 based evaluation board - NXP gains twenty new development and industrial boards for their i.MX and Layerscape SoCs - Intel IXP4xx now supports the final two machines in device tree that were previously only supported in old style board files. - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while MT8183 is used in the Acer Chromebook 314. - Qualcomm gains support for the reference machines using the two new SoCs, plus a number of Chromebook variants and phones based on the Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia devices and the Microsoft Surface Duo 2. - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board. - Tegra now boots various older Android devices based on 32-bit chips out of the box, including a number of ASUS Transformer tablets. There is also a new Jetson AGX Orin developer kit. - Apple support adds the missing device trees for all the remaining M1 Macbook and iMac variants, though not yet the M1 Pro/Max versions. - Allwinner now supports another version of the Tanix TX6 set-top box based on the H6 SoC. - Broadcom gains support for the Netgear RAXE500 Wireless router based on BCM4908. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHDsm4ACgkQmmx57+YA GNm9YhAAm0c/uPAkDA/6ESjaMC5qIHnV8CC9ZV24iINqFutcjKm2az8OiqKZT7UW a/+n2sfjAiyoAAaXrp/WvyMH2Sula1i/OZpR4GYIbD/lbYRFk+4+iW2YY9vViCjL KH6M/H6KfOSNmGcpe3wDvu7D4YWfFKDCDyUJsEaMW2xSQehYbH5P0OuzQW1EROHr GQp60QtCbUpMmqIrkJT99MxBGCCyb4dV6BT3iU489/YU3q3pOF8OWMLKv5TlXzfw x0pLH5CKavvCFj3iqp80sCEBeSoUecLKVnBRfmwAH1vgfNrhpXh4jP9m1e3Vh3Bb aJGZ57W77Akf+TywZEojDdIDQGKcdlzpZNxN2i4e4+LECYvfOdJW8GP18MmsXEY4 apb0NeKad8FGRI4b97dIVEcTa894JkEZaEtnNaIdjWFhBgzO+Kr2iOTw71AKsJmc eIwv4SDdUQTU4VT08ceJTOVt8NikGALJStg5knpVJ9lfHvFlWj1GAE4QnCtS6pUR iiyqJ1/7khNplcgowaz6nuC2gSE49UwYQImLvBfG17eT1YU3B2OZg/FZ9xSmr2bW Thk+TKO9A6xai8QQWYV99Ae+Y6nDWUrLL5U9DXTn4cm64g5z3VkVKGcNajg/kAad hyQmSIhcypp2KN//c+d3VU/KY1EUYJDzg1EEwRuxP7Gih5/7pb8= =IF3G -----END PGP SIGNATURE----- Merge tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC devicetree updates from Arnd Bergmann: "As usual, this is the bulk of the updates for the SoC tree, adding more devices to existing files, addressing issues from ever improving automated checking, and fixing minor issues. The most interesting bits as usual are the new platforms. All the newly supported SoCs belong into existing families this time: - Qualcomm gets support for two newly announced platforms, both of which can now work in production environments: the SDX65 5G modem that can run a minimal Linux on its Cortex-A7 core, and the Snapdragon 8 Gen 1, their latest high-end phone SoC. - Renesas adds support for R-Car S4-8, the most recent automotive Server/Communication SoC. - TI adds support for J721s2, a new automotive SoC in the K3 family. - Mediatek MT7986a/b is a SoC used in Wifi routers, the latest generation following their popular MT76xx series. Only basic support is added for now. - NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8 series. - TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we have supported for a long time. New boards with the existing SoCs include - Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers - AT91/SAMA5 based evaluation board - NXP gains twenty new development and industrial boards for their i.MX and Layerscape SoCs - Intel IXP4xx now supports the final two machines in device tree that were previously only supported in old style board files. - Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while MT8183 is used in the Acer Chromebook 314. - Qualcomm gains support for the reference machines using the two new SoCs, plus a number of Chromebook variants and phones based on the Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia devices and the Microsoft Surface Duo 2. - ST STM32 now supports the Engicam i.Core STM32MP1 carrier board. - Tegra now boots various older Android devices based on 32-bit chips out of the box, including a number of ASUS Transformer tablets. There is also a new Jetson AGX Orin developer kit. - Apple support adds the missing device trees for all the remaining M1 Macbook and iMac variants, though not yet the M1 Pro/Max versions. - Allwinner now supports another version of the Tanix TX6 set-top box based on the H6 SoC. - Broadcom gains support for the Netgear RAXE500 Wireless router based on BCM4908" * tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits) Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U" arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX arm64: dts: qcom: sm8450-qrd: Enable USB nodes arm64: dts: qcom: sm8450: Add usb nodes ARM: dts: aspeed: add LCLK setting into LPC KCS nodes dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property ARM: dts: aspeed: add LCLK setting into LPC IBT node ARM: dts: aspeed: p10: Add TPM device ARM: dts: aspeed: p10: Enable USB host ports ARM: dts: aspeed: Add TYAN S8036 BMC machine ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config ARM: dts: aspeed: Adding Facebook Bletchley BMC ARM: dts: aspeed: g220a: Enable secondary flash ARM: dts: Add openbmc-flash-layout-64-alt.dtsi ARM: dts: aspeed: Add secure boot controller node dt-bindings: aspeed: Add Secure Boot Controller bindings ARM: dts: Remove "spidev" nodes dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850 dt-bindings: arm: samsung: Document E850-96 board binding dt-bindings: Add vendor prefix for WinLink ... |
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4892242784 |
dt-bindings: memory-controllers: ti,gpmc: Add compatible for AM64
AM64 SoC contains the GPMC module. Add compatible for it. Newer SoCs don't necessarily map GPMC data region at the same place as legacy SoCs. Add reg-names "data", to provide this information to the device driver. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211221131757.2030-2-rogerq@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
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c3859c1436 |
dt-bindings: memory: tegra: Add Tegra234 support
Document the variant of the memory controller and external memory controllers found on Tegra234 and add some memory client and SMMU stream ID definitions for use in device tree files. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8c970e7ee7 |
dt-bindings: memory: tegra: Update for Tegra194
The #interconnect-cells properties are required to hook up memory clients to the MC/EMC in interconnects properties. Add a description for these properties. For the nested EMC controller, the list of required properties was missing. Add it so that the validation can be more strict. Also, allow multiple reg entries required by Tegra194 and later. While at it, also remove the dummy BPMP node from the example because it is incomplete and fails validation. It's also not necessary for this file and the BPMP DT schema already has a full example. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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07bb5e0e7b |
dt-bindings: memory-controllers: ti,gpmc: Drop incorrect unevaluatedProperties
With 'unevaluatedProperties' support implemented, the TI GPMC example has a warning: Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.example.dt.yaml: memory-controller@6e000000: onenand@0,0: Unevaluated properties are not allowed ('compatible', '#address-cells', '#size-cells', 'partition@0', 'partition@100000' were unexpected) The child node definition for GPMC is not a complete binding, so specifying 'unevaluatedProperties: false' for it is not correct and should be dropped. Fixup the unnecessary 'allOf' while we're here. Cc: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Roger Quadros <rogerq@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20211206174215.2297796-1-robh@kernel.org |
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a9e6b3819b |
dt-bindings: memory: Add entry for version 3.80a
Add an entry for version 3.80a of the Synopsys DDR controller. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/20211012190709.1504152-4-dinguyen@kernel.org |
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4b5a231ff6 |
dt-bindings: memory: renesas,rpc-if: Add optional interrupts property
For completeness add optional interrupts property. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20211025205631.21151-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
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c271aa1f73 |
dt-bindings: memory: renesas,rpc-if: Add support for the R9A07G044
SPI Multi I/O Bus Controller on RZ/G2L SoC is almost identical to the RPC-IF interface found on R-Car Gen3 SoC's. This patch adds a new compatible string to identify the RZ/G2L family so that the timing values on RZ/G2L can be adjusted. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20211025205631.21151-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
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f4eedebdbf |
dt-bindings: treewide: Update @st.com email address to @foss.st.com
Not all @st.com email address are concerned, only people who have a specific @foss.st.com email will see their entry updated. For some people, who left the company, remove their email. Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> Cc: Fabien Dessenne <fabien.dessenne@foss.st.com> Cc: Christophe Roullier <christophe.roullier@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Lionel Debieve <lionel.debieve@foss.st.com> Cc: Amelie Delaunay <amelie.delaunay@foss.st.com> Cc: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> Cc: Ludovic Barre <ludovic.barre@foss.st.com> Cc: Christophe Kerello <christophe.kerello@foss.st.com> Cc: pascal Paillet <p.paillet@foss.st.com> Cc: Erwan Le Ray <erwan.leray@foss.st.com> Cc: Philippe CORNU <philippe.cornu@foss.st.com> Cc: Yannick Fertre <yannick.fertre@foss.st.com> Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Cc: Olivier Moysan <olivier.moysan@foss.st.com> Cc: Hugues Fruchet <hugues.fruchet@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20211110150144.18272-6-patrice.chotard@foss.st.com Signed-off-by: Rob Herring <robh@kernel.org> |
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c4a11bf423 |
dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files related to Ingenic SoCs with 'ingenic,'. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net |
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d461e96cd2 |
ARM: SoC drivers for 5.16
These are all the driver updates for SoC specific drivers. There are a couple of subsystems with individual maintainers picking up their patches here: - The reset controller subsystem add support for a few new SoC variants to existing drivers, along with other minor improvements - The OP-TEE subsystem gets a driver for the ARM FF-A transport - The memory controller subsystem has improvements for Tegra, Mediatek, Renesas, Freescale and Broadcom specific drivers. - The tegra cpuidle driver changes get merged through this tree this time. There are only minor changes, but they depend on other tegra driver updates here. - The ep93xx platform finally moves to using the drivers/clk/ subsystem, moving the code out of arch/arm in the process. This depends on a small sound driver change that is included here as well. - There are some minor updates for Qualcomm and Tegra specific firmware drivers. The other driver updates are mainly for drivers/soc, which contains a mixture of vendor specific drivers that don't really fit elsewhere: - Mediatek drivers gain more support for MT8192, with new support for hw-mutex and mmsys routing, plus support for reset lines in the mmsys driver. - Qualcomm gains a new "sleep stats" driver, and support for the "Generic Packet Router" in the APR driver. - There is a new user interface for routing the UARTS on ASpeed BMCs, something that apparently nobody else has needed so far. - More drivers can now be built as loadable modules, in particular for Broadcom and Samsung platforms. - Lots of improvements to the TI sysc driver for better suspend/resume support Finally, there are lots of minor cleanups and new device IDs for amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape, allwinner, broadcom, and omap. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGCvKgACgkQmmx57+YA GNnNfw/8DDTfMUycVvtaNslYlWri0/2O0nSqhNIIbTAcVuD/x5qo/McDhKuv+ldM BoTDMjRYZfQkrNXSEj3MaxB9E0o6Srva5SM8y4+Koe0VVtvEVovjYkXOhXqSEWWl aqVIe0S6Y1rF/KxJlvAfGxYHb5d+6aYqzdmhjURpXNGxqpSHb9/hqisY97Q9TpnD 6lQZOz9d1JNDq0eOh1qjcfuMjg1EHZHDZJyioCvyX38KIl2q7p3ll2z/eqrrDhQZ TrvL/YVosTXqBcAfi47Oz+n/CX2i0MrjVO8nfPSGOq5UL4Al3SZD4XYY96IOIQrH +XGFigGGAkV2LfKSEPNJWaq7g+SiQUr2jc3p8b4Zxde8/+5M127/gotiPddyG2LX 1OnFRnPskgRApGqHjGEcEzzJUTag7Hc+YVH82TMEHZhSDMq6i30k9UnyfXsziZDV 8CrkOpjuSg+YxFv/83bfa1pIoYtFfjGr16mq4muajodnX7+b7My9iv+2Oo2iQM9y DwRUKj7+eap23SEUpi4et6HlNpoF6yJMbt5Ae1k+gTK2DvQ4Cx6n4QJz/I7WC1Wp BdVhvSH8XVppVLtQqODud+VWvLgLerRxUpGRdbS8r5VsnNUJTvaS4YGMpm9616G7 TrgUSSvsyu1lLqbWMh+pOCk4l3r64vSUn581hrIw6jtioNGvMdE= =tUuj -----END PGP SIGNATURE----- Merge tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "These are all the driver updates for SoC specific drivers. There are a couple of subsystems with individual maintainers picking up their patches here: - The reset controller subsystem add support for a few new SoC variants to existing drivers, along with other minor improvements - The OP-TEE subsystem gets a driver for the ARM FF-A transport - The memory controller subsystem has improvements for Tegra, Mediatek, Renesas, Freescale and Broadcom specific drivers. - The tegra cpuidle driver changes get merged through this tree this time. There are only minor changes, but they depend on other tegra driver updates here. - The ep93xx platform finally moves to using the drivers/clk/ subsystem, moving the code out of arch/arm in the process. This depends on a small sound driver change that is included here as well. - There are some minor updates for Qualcomm and Tegra specific firmware drivers. The other driver updates are mainly for drivers/soc, which contains a mixture of vendor specific drivers that don't really fit elsewhere: - Mediatek drivers gain more support for MT8192, with new support for hw-mutex and mmsys routing, plus support for reset lines in the mmsys driver. - Qualcomm gains a new "sleep stats" driver, and support for the "Generic Packet Router" in the APR driver. - There is a new user interface for routing the UARTS on ASpeed BMCs, something that apparently nobody else has needed so far. - More drivers can now be built as loadable modules, in particular for Broadcom and Samsung platforms. - Lots of improvements to the TI sysc driver for better suspend/resume support" Finally, there are lots of minor cleanups and new device IDs for amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape, allwinner, broadcom, and omap" * tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits) optee: Fix spelling mistake "reclain" -> "reclaim" Revert "firmware: qcom: scm: Add support for MC boot address API" qcom: spm: allow compile-testing firmware: arm_ffa: Remove unused 'compat_version' variable soc: samsung: exynos-chipid: add exynosautov9 SoC support firmware: qcom: scm: Don't break compile test on non-ARM platforms soc: qcom: smp2p: Add of_node_put() before goto soc: qcom: apr: Add of_node_put() before return soc: qcom: qcom_stats: Fix client votes offset soc: qcom: rpmhpd: fix sm8350_mxc's peer domain dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226 firmware: qcom: scm: Add support for MC boot address API soc: qcom: spm: Add 8916 SPM register data dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu soc: qcom: socinfo: Add PM8150C and SMB2351 models firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available() soc: aspeed: Add UART routing support soc: fsl: dpio: rename the enqueue descriptor variable soc: fsl: dpio: use an explicit NULL instead of 0 ... |
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ae45d84fc3 |
ARM: SoC DT updates for v5.16
This is a rather large update for the ARM devicetree files, after a few quieter releases, with 775 total commits and 47 branches pulled into this one. There are 5 new SoC types plus some minor variations, and a total of 60 new machines, so I'm limiting the summary to the main noteworthy items: - Apple M1 gain support for PCI and pinctrl, getting a bit closer to a usable system out of the box. - Qualcomm gains support for Snapdragon 690 (aka SM6350) as well as SM7225, 11 new smartphones, and three additional Chromebooks, and improvements all over the place. - Samsung gains support for ExynosAutov9, an automotive version of their smartphone SoC, but otherwise no major changes. - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a number of improvements for the recently added SAMA7 family. The LAN966 SoC that was added in the platform code does not have dts files yet. Two board files are added for the older at91sam9g20 SoC - Aspeed supports two additional server boards using their AST2600 as BMC, and improves support for qemu models - Rockchip RK3566/RK3688 gets added, along with six new development boards using RK3328/RK3399/RK3566, and one Chromebook tablet. - Two NAS boxes are added using the ARMv4 based Gemini platform - One new board is added to the Intel Arria SoC FPGA family - Marvell adds one network switch based on Armada 381 and the new MOCHAbin 7040 development board - NXP adds support for the S32G2 automotive SoC, two imx6 based ebook readers, and three additional development boards, which is notably less than their usual additions, but they also gain improvements to their many existing boards - STmicroelectronics adds their stm32mp13 SoC family along with a reference board - Renesas adds new versions of their R-Car Gen3 SoCs and many updates for their older generations - Broadcom adds support for a number of Cisco Meraki wireless controllers, along with two new boards and other updates for BCM53xx/BCM47xx networking SoCs and the Raspberry Pi boards - Mediatek improves support for the MT81xx SoCs used in Chromebooks as well as the MT76xx networking SoCs - NVIDIA adds a number of cleanups and additional support for more hardware on the already supported machines - TI K3 adds support for three new boards along with cleanups - Toshiba adds one board for the Visconti family - Xilinx adds five new ZynqMP based machines - Amlogic support is added for the Radxa Zero and two Jethub home automation controllers, along with changes to other machines - Rob Herring continues his work on fixing dtc warnings all over the tree. - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon, Ux500, Unisoc -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmGDCJYACgkQmmx57+YA GNlIlQ//VOQJeP7Om3Qt3Vai/zvrSWegAagI8quF6m4fTI0D3NVRw4KD7sld1+39 lIcUTdM4eSXO+vsyWRSb9ESyymGGsTy9o8irIDTH2SSyawMwFwydgoO/riS6/tkG 37c9OvCNdjhQIgxo20vW8+dr021UNJqQNG7dQzTJrlbe8IzNGkSjVO5i97v8XK2e HWtwhOd8W7ptmuTKdq5/DTv0V9LzcJSfWlwYPscHRGHg/t0+frC+G2H3osjgGuux gbbrdocy1Qmj1sqeAPBud5O2TTEu4M09HYgVWXoKcgBzTt3hJZ9TmzE4YNfUYmv6 sYz+BaPesm2hR+zjBz0wxGG+eP27Zv4FUN/VeMGilRbhXVCv6GSf90fDTbaW4Q8F IR/BgN0lk2GyNjRyVUcDQI/Aus//TXAI7+rcfXccGBrxs/EBZ3e/hmNNTi9jCMBT NGLkXAI574tcfLUYybj87upFTPLHTwq4is9p1RY/l73wlcFDZHai+aE2X5GhYLzy XaYuyur1wA+v5938RjjwCYJjqssz+OlJJP1N2KeQT99PVkS0IunXFJGcsve6UOAN maRxI4oSU1lz6VaP8tsVJESzObwFCtOdYjgUHpRUJ8JTNTRpy/6JLAX0dnr1LrQV Fr6gLtodCOa2Udc5T+VkoodAw2f5Gta8cE1fQB9CjUDklkhUtsg= =jp4P -----END PGP SIGNATURE----- Merge tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC DT updates from Arnd Bergmann: "This is a rather large update for the ARM devicetree files, after a few quieter releases, with 775 total commits and 47 branches pulled into this one. There are 5 new SoC types plus some minor variations, and a total of 60 new machines, so I'm limiting the summary to the main noteworthy items: - Apple M1 gain support for PCI and pinctrl, getting a bit closer to a usable system out of the box. - Qualcomm gains support for Snapdragon 690 (aka SM6350) as well as SM7225, 11 new smartphones, and three additional Chromebooks, and improvements all over the place. - Samsung gains support for ExynosAutov9, an automotive version of their smartphone SoC, but otherwise no major changes. - Microchip adds the SAMA5D29 SoC in the SAMA5 family, and a number of improvements for the recently added SAMA7 family. The LAN966 SoC that was added in the platform code does not have dts files yet. Two board files are added for the older at91sam9g20 SoC - Aspeed supports two additional server boards using their AST2600 as BMC, and improves support for qemu models - Rockchip RK3566/RK3688 gets added, along with six new development boards using RK3328/RK3399/RK3566, and one Chromebook tablet. - Two NAS boxes are added using the ARMv4 based Gemini platform - One new board is added to the Intel Arria SoC FPGA family - Marvell adds one network switch based on Armada 381 and the new MOCHAbin 7040 development board - NXP adds support for the S32G2 automotive SoC, two imx6 based ebook readers, and three additional development boards, which is notably less than their usual additions, but they also gain improvements to their many existing boards - STmicroelectronics adds their stm32mp13 SoC family along with a reference board - Renesas adds new versions of their R-Car Gen3 SoCs and many updates for their older generations - Broadcom adds support for a number of Cisco Meraki wireless controllers, along with two new boards and other updates for BCM53xx/BCM47xx networking SoCs and the Raspberry Pi boards - Mediatek improves support for the MT81xx SoCs used in Chromebooks as well as the MT76xx networking SoCs - NVIDIA adds a number of cleanups and additional support for more hardware on the already supported machines - TI K3 adds support for three new boards along with cleanups - Toshiba adds one board for the Visconti family - Xilinx adds five new ZynqMP based machines - Amlogic support is added for the Radxa Zero and two Jethub home automation controllers, along with changes to other machines - Rob Herring continues his work on fixing dtc warnings all over the tree. - Minor updates for TI OMAP, Mstar, Allwinner/sunxi, Hisilicon, Ux500, Unisoc" * tag 'dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (720 commits) arm64: dts: apple: j274: Expose PCI node for the Ethernet MAC address arm64: dts: apple: t8103: Add root port interrupt routing arm64: dts: apple: t8103: Add PCIe DARTs arm64: apple: Add PCIe node arm64: apple: Add pinctrl nodes ARM: dts: arm: Update ICST clock nodes 'reg' and node names ARM: dts: arm: Update register-bit-led nodes 'reg' and node names arm64: dts: exynos: add chipid node for exynosautov9 SoC ARM: dts: qcom: fix typo in IPQ8064 thermal-sensor node Revert "arm64: dts: qcom: msm8916-asus-z00l: Add sensors" arm64: dts: qcom: ipq6018: Remove unused 'iface_clk' property from dma-controller node arm64: dts: qcom: ipq6018: Remove unused 'qcom,config-pipe-trust-reg' property arm64: dts: qcom: sm8350: Add CPU topology and idle-states arm64: dts: qcom: Drop unneeded extra device-specific includes arm64: dts: qcom: msm8916: Drop standalone smem node arm64: dts: qcom: Fix node name of rpm-msg-ram device nodes arm64: dts: qcom: msm8916-asus-z00l: Add sensors arm64: dts: qcom: msm8916-asus-z00l: Add SDCard arm64: dts: qcom: msm8916-asus-z00l: Add touchscreen arm64: dts: qcom: sdm845-oneplus: remove devinfo-size from ramoops node ... |
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bccb5d53e2 |
Memory controller drivers for v5.16, part two
1. Convert LPDDR2 bindings to dtschema and extend them with new properties. 2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from devicetree. -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmFxMrMQHGtyemtAa2Vy bmVsLm9yZwAKCRDBN2bmhouD1zN4EACUUda2z/Ico+Y0J8ygDdHFa9CE2Q0rbWPc 4cCeQSae+joWSTGxZUGIKd2SDCz2Ai0U2AOe4v9YqbmW4J6izdeUqaJHSorC7g+8 /Or307HKwOi0kV8kwSC0AABPlkTFDTR5wjG908vAfEU4KfmkHXpKB7EJn2vpM/Km JzZ9K+v0Bm6VH5CLQZpcFiffXQJDeN1Cqve45g50BfpFITUche/TR8FRfJPJ90n0 fJ2kjlMGT87U8tb4JKpYy6UoRCToxJq+uy/0nUAzUXAgBzM1zF9tVFGpw2WNUu1a j+PwFAA7eybX53BKFm0LfC/Z3PNJ+GYeDzUv+3VaSL+x5aNWRa1ffBBgWNAnnoWD QO0QGnZUxM+JEtTkgeByVblP4Aq4hmlSOJ3ErZ0NyH7iJyREqJEpJkXoSm0QIY4F TxiyrHJg0rSF4VTFU1qVBzn1m1VbfWR36RqOW29t8GJoMri8vCW7eyT0Z7xe4x8W er9kIGGpRQ2G3mtBRjHSXGjIztG5dVNbp5eEq7roJoQDcEcPnwox+8Au6NkA7JDS ednahUQ3qFEzS0vLXNgwvM1z77xPcgVFRRfdySfMUN0R3wBuhBp8EMTUNs2GrGSD KhxlK7WYcvwMy++o1M6Lmy7ukh40Tpgsmhg9CNr+eLTjJDs3rO/qdgteRnuQtsFd qh0PqiaX1w== =cTPK -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFxwL0ACgkQmmx57+YA GNkfPw//ZFrn9+3SKYzXRgWKdPeGO9DfOrooEFe37DMsdCCDkTsZPxnKooidI61t g4UlgpPnnDEOas7glALgPwdFGqePzbocXgWtzgc/9kKNVNlJfE4OBVo8WykNSTOB Yqv38Z0Fz7XURfxzQCRHi9oMihkp0j9MaMmApO1/1ejYSueKnZ13OESPhmwrJBx0 0oJCpkpOdxzfBlDaoaymSa0seWl1kAcWX6bya5dgDBGKKXhl69yLrqDSafmc57dx fOSgmpHSWPT+VavuGG6+p0daEk4vY3A37A/cVgaXl+Te02/O78luNHj0Wu1kjcxk lXhsBbb0iEyCUBRHpxwBm5cszm3yaN1GFnd0kW7vjV1kscnjwcDVJ8r9B/u1jIIj RQQq32QJ548c4eqSOT/OqhpI+r/R3z4pdFnaYiz6NDW5WY3UucKwoFCmhGRYk+T6 Xp+5RreoUisDKg6rDDG6M6H/iTcYQw9W6NvLkf2HghokmcTG9cH1o/Q05COZe7dK yyZmb61fxS3SmsiWHrAtz2L8ztFibAjHjRfMV44TXX5JKp//hcMWg6HBMf+zD474 wLsKGSimeKgSsy2NjqRwh3VSueA4ETrp4Iue2NaRCZ5ROnepCa6WzuUBPNTqXv+8 HZTAHG7d7TAQ2O+hhShSGMP2tCkssuJ4OkmzbkPKDDe8xECaf9k= =NKAR -----END PGP SIGNATURE----- Merge tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.16, part two 1. Convert LPDDR2 bindings to dtschema and extend them with new properties. 2. Tegra 20 EMC: support matching timings by LPDDR2 configuration from devicetree. * tag 'memory-controller-drv-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: tegra20-emc: Add runtime dependency on devfreq governor module memory: tegra20-emc: Support matching timings by LPDDR2 configuration memory: Add LPDDR2-info helpers dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node dt-bindings: Add vendor prefix for Elpida Memory dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F dt-bindings: memory: lpddr2: Add revision-id properties dt-bindings: memory: lpddr2: Convert to schema dt-bindings: Relocate DDR bindings Link: https://lore.kernel.org/r/20211021093002.118192-1-krzysztof.kozlowski@canonical.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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ce004ae6c5 |
dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node
Some Tegra20 boards don't have RAM code stored in NVMEM, which is used for the memory chip identification and the identity information should be read out from LPDDR2 chip in this case. Document new sub-node containing generic LPDDR2 properties that will be used for the memory chip identification if RAM code isn't available. The identification is done by reading out memory configuration values from generic LPDDR2 mode registers of SDRAM chip and comparing them with the values of device-tree 'lpddr2' sub-node. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-8-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
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2782ece0d3 |
dt-bindings: memory: lpddr2: Document Elpida B8132B2PB-6D-F
Elpida B8132B2PB-6D-F memory chip is used by ASUS Transformer TF101 tablet, add compatible for it. We need to specify this compatible it for a device-tree node containing corresponding memory timings in order to allow software to match the timings with the detected hardware. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211006224659.21434-5-digetx@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |