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ARM: dts: amlogic: meson8: switch to the new PWM controller binding

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Use the new PWM controller binding which now relies on passing all
clock inputs available on the SoC (instead of passing the "wanted"
clock input for a given board).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20241227212514.1376682-2-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This commit is contained in:
Martin Blumenstingl 2024-12-27 22:25:10 +01:00 committed by Neil Armstrong
parent 2014c95afe
commit 802cff460a
1 changed files with 15 additions and 3 deletions
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18
arch/arm/boot/dts/amlogic/meson8.dtsi
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@ -449,7 +449,11 @@ analog_top: analog-top@81a8 {
};
pwm_ef: pwm@86c0 {
compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
compatible = "amlogic,meson8-pwm-v2";
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
reg = <0x86c0 0x10>;
#pwm-cells = <3>;
status = "disabled";
@ -699,11 +703,19 @@ timer@600 {
};
&pwm_ab {
compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
compatible = "amlogic,meson8-pwm-v2";
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
};
&pwm_cd {
compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
compatible = "amlogic,meson8-pwm-v2";
clocks = <&xtal>,
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_FCLK_DIV3>;
};
&rtc {