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218 lines
8.6 KiB
Plaintext
218 lines
8.6 KiB
Plaintext
The PCI Express Port Bus Driver Guide HOWTO
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Tom L Nguyen tom.l.nguyen@intel.com
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11/03/2004
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1. About this guide
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This guide describes the basics of the PCI Express Port Bus driver
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and provides information on how to enable the service drivers to
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register/unregister with the PCI Express Port Bus Driver.
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2. Copyright 2004 Intel Corporation
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3. What is the PCI Express Port Bus Driver
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A PCI Express Port is a logical PCI-PCI Bridge structure. There
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are two types of PCI Express Port: the Root Port and the Switch
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Port. The Root Port originates a PCI Express link from a PCI Express
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Root Complex and the Switch Port connects PCI Express links to
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internal logical PCI buses. The Switch Port, which has its secondary
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bus representing the switch's internal routing logic, is called the
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switch's Upstream Port. The switch's Downstream Port is bridging from
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switch's internal routing bus to a bus representing the downstream
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PCI Express link from the PCI Express Switch.
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A PCI Express Port can provide up to four distinct functions,
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referred to in this document as services, depending on its port type.
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PCI Express Port's services include native hotplug support (HP),
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power management event support (PME), advanced error reporting
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support (AER), and virtual channel support (VC). These services may
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be handled by a single complex driver or be individually distributed
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and handled by corresponding service drivers.
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4. Why use the PCI Express Port Bus Driver?
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In existing Linux kernels, the Linux Device Driver Model allows a
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physical device to be handled by only a single driver. The PCI
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Express Port is a PCI-PCI Bridge device with multiple distinct
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services. To maintain a clean and simple solution each service
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may have its own software service driver. In this case several
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service drivers will compete for a single PCI-PCI Bridge device.
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For example, if the PCI Express Root Port native hotplug service
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driver is loaded first, it claims a PCI-PCI Bridge Root Port. The
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kernel therefore does not load other service drivers for that Root
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Port. In other words, it is impossible to have multiple service
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drivers load and run on a PCI-PCI Bridge device simultaneously
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using the current driver model.
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To enable multiple service drivers running simultaneously requires
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having a PCI Express Port Bus driver, which manages all populated
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PCI Express Ports and distributes all provided service requests
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to the corresponding service drivers as required. Some key
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advantages of using the PCI Express Port Bus driver are listed below:
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- Allow multiple service drivers to run simultaneously on
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a PCI-PCI Bridge Port device.
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- Allow service drivers implemented in an independent
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staged approach.
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- Allow one service driver to run on multiple PCI-PCI Bridge
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Port devices.
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- Manage and distribute resources of a PCI-PCI Bridge Port
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device to requested service drivers.
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5. Configuring the PCI Express Port Bus Driver vs. Service Drivers
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5.1 Including the PCI Express Port Bus Driver Support into the Kernel
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Including the PCI Express Port Bus driver depends on whether the PCI
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Express support is included in the kernel config. The kernel will
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automatically include the PCI Express Port Bus driver as a kernel
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driver when the PCI Express support is enabled in the kernel.
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5.2 Enabling Service Driver Support
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PCI device drivers are implemented based on Linux Device Driver Model.
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All service drivers are PCI device drivers. As discussed above, it is
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impossible to load any service driver once the kernel has loaded the
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PCI Express Port Bus Driver. To meet the PCI Express Port Bus Driver
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Model requires some minimal changes on existing service drivers that
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imposes no impact on the functionality of existing service drivers.
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A service driver is required to use the two APIs shown below to
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register its service with the PCI Express Port Bus driver (see
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section 5.2.1 & 5.2.2). It is important that a service driver
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initializes the pcie_port_service_driver data structure, included in
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header file /include/linux/pcieport_if.h, before calling these APIs.
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Failure to do so will result an identity mismatch, which prevents
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the PCI Express Port Bus driver from loading a service driver.
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5.2.1 pcie_port_service_register
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int pcie_port_service_register(struct pcie_port_service_driver *new)
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This API replaces the Linux Driver Model's pci_module_init API. A
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service driver should always calls pcie_port_service_register at
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module init. Note that after service driver being loaded, calls
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such as pci_enable_device(dev) and pci_set_master(dev) are no longer
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necessary since these calls are executed by the PCI Port Bus driver.
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5.2.2 pcie_port_service_unregister
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void pcie_port_service_unregister(struct pcie_port_service_driver *new)
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pcie_port_service_unregister replaces the Linux Driver Model's
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pci_unregister_driver. It's always called by service driver when a
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module exits.
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5.2.3 Sample Code
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Below is sample service driver code to initialize the port service
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driver data structure.
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static struct pcie_port_service_id service_id[] = { {
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.vendor = PCI_ANY_ID,
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.device = PCI_ANY_ID,
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.port_type = PCIE_RC_PORT,
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.service_type = PCIE_PORT_SERVICE_AER,
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}, { /* end: all zeroes */ }
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};
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static struct pcie_port_service_driver root_aerdrv = {
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.name = (char *)device_name,
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.id_table = &service_id[0],
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.probe = aerdrv_load,
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.remove = aerdrv_unload,
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.suspend = aerdrv_suspend,
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.resume = aerdrv_resume,
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};
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Below is a sample code for registering/unregistering a service
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driver.
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static int __init aerdrv_service_init(void)
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{
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int retval = 0;
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retval = pcie_port_service_register(&root_aerdrv);
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if (!retval) {
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/*
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* FIX ME
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*/
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}
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return retval;
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}
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static void __exit aerdrv_service_exit(void)
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{
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pcie_port_service_unregister(&root_aerdrv);
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}
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module_init(aerdrv_service_init);
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module_exit(aerdrv_service_exit);
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6. Possible Resource Conflicts
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Since all service drivers of a PCI-PCI Bridge Port device are
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allowed to run simultaneously, below lists a few of possible resource
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conflicts with proposed solutions.
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6.1 MSI Vector Resource
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The MSI capability structure enables a device software driver to call
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pci_enable_msi to request MSI based interrupts. Once MSI interrupts
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are enabled on a device, it stays in this mode until a device driver
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calls pci_disable_msi to disable MSI interrupts and revert back to
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INTx emulation mode. Since service drivers of the same PCI-PCI Bridge
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port share the same physical device, if an individual service driver
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calls pci_enable_msi/pci_disable_msi it may result unpredictable
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behavior. For example, two service drivers run simultaneously on the
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same physical Root Port. Both service drivers call pci_enable_msi to
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request MSI based interrupts. A service driver may not know whether
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any other service drivers have run on this Root Port. If either one
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of them calls pci_disable_msi, it puts the other service driver
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in a wrong interrupt mode.
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To avoid this situation all service drivers are not permitted to
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switch interrupt mode on its device. The PCI Express Port Bus driver
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is responsible for determining the interrupt mode and this should be
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transparent to service drivers. Service drivers need to know only
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the vector IRQ assigned to the field irq of struct pcie_device, which
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is passed in when the PCI Express Port Bus driver probes each service
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driver. Service drivers should use (struct pcie_device*)dev->irq to
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call request_irq/free_irq. In addition, the interrupt mode is stored
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in the field interrupt_mode of struct pcie_device.
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6.2 MSI-X Vector Resources
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Similar to the MSI a device driver for an MSI-X capable device can
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call pci_enable_msix to request MSI-X interrupts. All service drivers
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are not permitted to switch interrupt mode on its device. The PCI
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Express Port Bus driver is responsible for determining the interrupt
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mode and this should be transparent to service drivers. Any attempt
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by service driver to call pci_enable_msix/pci_disable_msix may
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result unpredictable behavior. Service drivers should use
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(struct pcie_device*)dev->irq and call request_irq/free_irq.
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6.3 PCI Memory/IO Mapped Regions
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Service drivers for PCI Express Power Management (PME), Advanced
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Error Reporting (AER), Hot-Plug (HP) and Virtual Channel (VC) access
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PCI configuration space on the PCI Express port. In all cases the
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registers accessed are independent of each other. This patch assumes
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that all service drivers will be well behaved and not overwrite
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other service driver's configuration settings.
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6.4 PCI Config Registers
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Each service driver runs its PCI config operations on its own
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capability structure except the PCI Express capability structure, in
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which Root Control register and Device Control register are shared
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between PME and AER. This patch assumes that all service drivers
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will be well behaved and not overwrite other service driver's
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configuration settings.
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