mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-10-31 12:39:23 +00:00
6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
122 lines
3.2 KiB
C
122 lines
3.2 KiB
C
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#include <asm/io.h>
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#include <asm/mach-au1x00/au1000.h>
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#ifdef CONFIG_KGDB
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/*
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* FIXME the user should be able to select the
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* uart to be used for debugging.
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*/
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#define DEBUG_BASE UART_DEBUG_BASE
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/**/
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/* we need uint32 uint8 */
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/* #include "types.h" */
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typedef unsigned char uint8;
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typedef unsigned int uint32;
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#define UART16550_BAUD_2400 2400
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#define UART16550_BAUD_4800 4800
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#define UART16550_BAUD_9600 9600
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#define UART16550_BAUD_19200 19200
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#define UART16550_BAUD_38400 38400
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#define UART16550_BAUD_57600 57600
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#define UART16550_BAUD_115200 115200
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#define UART16550_PARITY_NONE 0
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#define UART16550_PARITY_ODD 0x08
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#define UART16550_PARITY_EVEN 0x18
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#define UART16550_PARITY_MARK 0x28
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#define UART16550_PARITY_SPACE 0x38
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#define UART16550_DATA_5BIT 0x0
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#define UART16550_DATA_6BIT 0x1
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#define UART16550_DATA_7BIT 0x2
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#define UART16550_DATA_8BIT 0x3
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#define UART16550_STOP_1BIT 0x0
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#define UART16550_STOP_2BIT 0x4
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#define UART_RX 0 /* Receive buffer */
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#define UART_TX 4 /* Transmit buffer */
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#define UART_IER 8 /* Interrupt Enable Register */
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#define UART_IIR 0xC /* Interrupt ID Register */
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#define UART_FCR 0x10 /* FIFO Control Register */
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#define UART_LCR 0x14 /* Line Control Register */
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#define UART_MCR 0x18 /* Modem Control Register */
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#define UART_LSR 0x1C /* Line Status Register */
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#define UART_MSR 0x20 /* Modem Status Register */
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#define UART_CLK 0x28 /* Baud Rat4e Clock Divider */
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#define UART_MOD_CNTRL 0x100 /* Module Control */
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/* memory-mapped read/write of the port */
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#define UART16550_READ(y) (au_readl(DEBUG_BASE + y) & 0xff)
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#define UART16550_WRITE(y,z) (au_writel(z&0xff, DEBUG_BASE + y))
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extern unsigned long get_au1x00_uart_baud_base(void);
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extern unsigned long cal_r4koff(void);
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void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
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{
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if (UART16550_READ(UART_MOD_CNTRL) != 0x3) {
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UART16550_WRITE(UART_MOD_CNTRL, 3);
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}
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cal_r4koff();
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/* disable interrupts */
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UART16550_WRITE(UART_IER, 0);
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/* set up baud rate */
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{
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uint32 divisor;
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/* set divisor */
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divisor = get_au1x00_uart_baud_base() / baud;
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UART16550_WRITE(UART_CLK, divisor & 0xffff);
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}
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/* set data format */
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UART16550_WRITE(UART_LCR, (data | parity | stop));
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}
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static int remoteDebugInitialized = 0;
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uint8 getDebugChar(void)
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{
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if (!remoteDebugInitialized) {
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remoteDebugInitialized = 1;
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debugInit(UART16550_BAUD_115200,
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UART16550_DATA_8BIT,
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UART16550_PARITY_NONE,
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UART16550_STOP_1BIT);
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}
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while((UART16550_READ(UART_LSR) & 0x1) == 0);
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return UART16550_READ(UART_RX);
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}
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int putDebugChar(uint8 byte)
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{
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// int i;
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if (!remoteDebugInitialized) {
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remoteDebugInitialized = 1;
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debugInit(UART16550_BAUD_115200,
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UART16550_DATA_8BIT,
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UART16550_PARITY_NONE,
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UART16550_STOP_1BIT);
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}
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while ((UART16550_READ(UART_LSR)&0x40) == 0);
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UART16550_WRITE(UART_TX, byte);
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//for (i=0;i<0xfff;i++);
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return 1;
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}
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#endif
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