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	 9bbafce2ee
			
		
	
	
		9bbafce2ee
		
	
	
	
	
		
			
			Presently with preempt enabled there's the possibility to be preempted after the TIF_USEDFPU test and the register save, leading to bogus state post-__switch_to(). Use an explicit preempt_disable()/enable() pair around unlazy_fpu()/clear_fpu() to avoid this. Follows the x86 change. Reported-by: Takuo Koguchi <takuo.koguchi.sw@hitachi.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
		
			
				
	
	
		
			168 lines
		
	
	
		
			4.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			168 lines
		
	
	
		
			4.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * arch/sh/kernel/cpu/sh5/fpu.c
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|  *
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|  * Copyright (C) 2001  Manuela Cirronis, Paolo Alberelli
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|  * Copyright (C) 2002  STMicroelectronics Limited
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|  *   Author : Stuart Menefy
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|  *
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|  * Started from SH4 version:
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|  *   Copyright (C) 1999, 2000  Kaz Kojima & Niibe Yutaka
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|  *
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  */
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| #include <linux/sched.h>
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| #include <linux/signal.h>
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| #include <asm/processor.h>
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| #include <asm/user.h>
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| #include <asm/io.h>
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| #include <asm/fpu.h>
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| 
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| /*
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|  * Initially load the FPU with signalling NANS.  This bit pattern
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|  * has the property that no matter whether considered as single or as
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|  * double precision, it still represents a signalling NAN.
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|  */
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| #define sNAN64		0xFFFFFFFFFFFFFFFFULL
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| #define sNAN32		0xFFFFFFFFUL
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| 
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| static union sh_fpu_union init_fpuregs = {
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| 	.hard = {
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| 		.fp_regs = { [0 ... 63] = sNAN32 },
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| 		.fpscr = FPSCR_INIT
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| 	}
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| };
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| 
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| void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
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| {
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| 	asm volatile("fst.p     %0, (0*8), fp0\n\t"
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| 		     "fst.p     %0, (1*8), fp2\n\t"
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| 		     "fst.p     %0, (2*8), fp4\n\t"
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| 		     "fst.p     %0, (3*8), fp6\n\t"
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| 		     "fst.p     %0, (4*8), fp8\n\t"
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| 		     "fst.p     %0, (5*8), fp10\n\t"
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| 		     "fst.p     %0, (6*8), fp12\n\t"
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| 		     "fst.p     %0, (7*8), fp14\n\t"
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| 		     "fst.p     %0, (8*8), fp16\n\t"
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| 		     "fst.p     %0, (9*8), fp18\n\t"
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| 		     "fst.p     %0, (10*8), fp20\n\t"
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| 		     "fst.p     %0, (11*8), fp22\n\t"
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| 		     "fst.p     %0, (12*8), fp24\n\t"
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| 		     "fst.p     %0, (13*8), fp26\n\t"
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| 		     "fst.p     %0, (14*8), fp28\n\t"
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| 		     "fst.p     %0, (15*8), fp30\n\t"
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| 		     "fst.p     %0, (16*8), fp32\n\t"
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| 		     "fst.p     %0, (17*8), fp34\n\t"
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| 		     "fst.p     %0, (18*8), fp36\n\t"
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| 		     "fst.p     %0, (19*8), fp38\n\t"
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| 		     "fst.p     %0, (20*8), fp40\n\t"
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| 		     "fst.p     %0, (21*8), fp42\n\t"
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| 		     "fst.p     %0, (22*8), fp44\n\t"
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| 		     "fst.p     %0, (23*8), fp46\n\t"
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| 		     "fst.p     %0, (24*8), fp48\n\t"
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| 		     "fst.p     %0, (25*8), fp50\n\t"
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| 		     "fst.p     %0, (26*8), fp52\n\t"
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| 		     "fst.p     %0, (27*8), fp54\n\t"
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| 		     "fst.p     %0, (28*8), fp56\n\t"
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| 		     "fst.p     %0, (29*8), fp58\n\t"
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| 		     "fst.p     %0, (30*8), fp60\n\t"
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| 		     "fst.p     %0, (31*8), fp62\n\t"
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| 
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| 		     "fgetscr   fr63\n\t"
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| 		     "fst.s     %0, (32*8), fr63\n\t"
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| 		: /* no output */
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| 		: "r" (&tsk->thread.fpu.hard)
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| 		: "memory");
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| }
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| 
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| static inline void
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| fpload(struct sh_fpu_hard_struct *fpregs)
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| {
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| 	asm volatile("fld.p     %0, (0*8), fp0\n\t"
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| 		     "fld.p     %0, (1*8), fp2\n\t"
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| 		     "fld.p     %0, (2*8), fp4\n\t"
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| 		     "fld.p     %0, (3*8), fp6\n\t"
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| 		     "fld.p     %0, (4*8), fp8\n\t"
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| 		     "fld.p     %0, (5*8), fp10\n\t"
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| 		     "fld.p     %0, (6*8), fp12\n\t"
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| 		     "fld.p     %0, (7*8), fp14\n\t"
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| 		     "fld.p     %0, (8*8), fp16\n\t"
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| 		     "fld.p     %0, (9*8), fp18\n\t"
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| 		     "fld.p     %0, (10*8), fp20\n\t"
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| 		     "fld.p     %0, (11*8), fp22\n\t"
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| 		     "fld.p     %0, (12*8), fp24\n\t"
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| 		     "fld.p     %0, (13*8), fp26\n\t"
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| 		     "fld.p     %0, (14*8), fp28\n\t"
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| 		     "fld.p     %0, (15*8), fp30\n\t"
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| 		     "fld.p     %0, (16*8), fp32\n\t"
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| 		     "fld.p     %0, (17*8), fp34\n\t"
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| 		     "fld.p     %0, (18*8), fp36\n\t"
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| 		     "fld.p     %0, (19*8), fp38\n\t"
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| 		     "fld.p     %0, (20*8), fp40\n\t"
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| 		     "fld.p     %0, (21*8), fp42\n\t"
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| 		     "fld.p     %0, (22*8), fp44\n\t"
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| 		     "fld.p     %0, (23*8), fp46\n\t"
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| 		     "fld.p     %0, (24*8), fp48\n\t"
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| 		     "fld.p     %0, (25*8), fp50\n\t"
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| 		     "fld.p     %0, (26*8), fp52\n\t"
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| 		     "fld.p     %0, (27*8), fp54\n\t"
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| 		     "fld.p     %0, (28*8), fp56\n\t"
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| 		     "fld.p     %0, (29*8), fp58\n\t"
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| 		     "fld.p     %0, (30*8), fp60\n\t"
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| 
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| 		     "fld.s     %0, (32*8), fr63\n\t"
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| 		     "fputscr   fr63\n\t"
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| 
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| 		     "fld.p     %0, (31*8), fp62\n\t"
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| 		: /* no output */
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| 		: "r" (fpregs) );
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| }
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| 
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| void fpinit(struct sh_fpu_hard_struct *fpregs)
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| {
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| 	*fpregs = init_fpuregs.hard;
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| }
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| 
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| asmlinkage void
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| do_fpu_error(unsigned long ex, struct pt_regs *regs)
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| {
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| 	struct task_struct *tsk = current;
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| 
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| 	regs->pc += 4;
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| 
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| 	tsk->thread.trap_no = 11;
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| 	tsk->thread.error_code = 0;
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| 	force_sig(SIGFPE, tsk);
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| }
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| 
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| 
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| asmlinkage void
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| do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
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| {
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| 	void die(const char *str, struct pt_regs *regs, long err);
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| 
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| 	if (! user_mode(regs))
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| 		die("FPU used in kernel", regs, ex);
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| 
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| 	regs->sr &= ~SR_FD;
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| 
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| 	if (last_task_used_math == current)
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| 		return;
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| 
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| 	enable_fpu();
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| 	if (last_task_used_math != NULL)
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| 		/* Other processes fpu state, save away */
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| 		save_fpu(last_task_used_math, regs);
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| 
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|         last_task_used_math = current;
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|         if (used_math()) {
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|                 fpload(¤t->thread.fpu.hard);
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|         } else {
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| 		/* First time FPU user.  */
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| 		fpload(&init_fpuregs.hard);
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|                 set_used_math();
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|         }
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| 	disable_fpu();
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| }
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