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		edb6310aaa
		
	
	
	
	
		
			
			The following patch add support for the NXP PNX833x SOC. More specifically it adds support for the STB222/5 variant. It fixes the vectored interrupt issue. Signed-off-by: daniel.j.laird <daniel.j.laird@nxp.com> Signed-off-by: Jason Wessel <jason.wessel@windriver.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
		
			
				
	
	
		
			65 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			65 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *  setup.c: Setup PNX833X Soc.
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|  *
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|  *  Copyright 2008 NXP Semiconductors
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|  *	  Chris Steel <chris.steel@nxp.com>
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|  *    Daniel Laird <daniel.j.laird@nxp.com>
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|  *
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|  *  Based on software written by:
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|  *      Nikita Youshchenko <yoush@debian.org>, based on PNX8550 code.
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|  *
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|  *  This program is free software; you can redistribute it and/or modify
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|  *  it under the terms of the GNU General Public License as published by
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|  *  the Free Software Foundation; either version 2 of the License, or
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|  *  (at your option) any later version.
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|  *
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|  *  This program is distributed in the hope that it will be useful,
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|  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  *  GNU General Public License for more details.
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|  *
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|  *  You should have received a copy of the GNU General Public License
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|  *  along with this program; if not, write to the Free Software
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|  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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|  */
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| #include <linux/init.h>
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| #include <linux/interrupt.h>
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| #include <linux/ioport.h>
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| #include <linux/io.h>
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| #include <linux/pci.h>
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| #include <asm/reboot.h>
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| #include <pnx833x.h>
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| #include <gpio.h>
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| 
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| extern void pnx833x_board_setup(void);
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| extern void pnx833x_machine_restart(char *);
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| extern void pnx833x_machine_halt(void);
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| extern void pnx833x_machine_power_off(void);
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| 
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| int __init plat_mem_setup(void)
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| {
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| 	/* fake pci bus to avoid bounce buffers */
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| 	PCI_DMA_BUS_IS_PHYS = 1;
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| 
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| 	/* set mips clock to 320MHz */
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| #if defined(CONFIG_SOC_PNX8335)
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| 	PNX8335_WRITEFIELD(0x17, CLOCK_PLL_CPU_CTL, FREQ);
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| #endif
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| 	pnx833x_gpio_init();	/* so it will be ready in board_setup() */
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| 
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| 	pnx833x_board_setup();
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| 
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| 	_machine_restart = pnx833x_machine_restart;
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| 	_machine_halt = pnx833x_machine_halt;
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| 	pm_power_off = pnx833x_machine_power_off;
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| 
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| 	/* IO/MEM resources. */
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| 	set_io_port_base(KSEG1);
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| 	ioport_resource.start = 0;
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| 	ioport_resource.end = ~0;
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| 	iomem_resource.start = 0;
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| 	iomem_resource.end = ~0;
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| 
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| 	return 0;
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| }
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