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		58fa7304a2
		
	
	
	
	
		
			
			This is only used in dmar.c and intel-iommu.h, so dma_remapping.h seems like the appropriate place for it. Signed-off-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
		
			
				
	
	
		
			158 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			158 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2006, Intel Corporation.
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|  *
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|  * This program is free software; you can redistribute it and/or modify it
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|  * under the terms and conditions of the GNU General Public License,
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|  * version 2, as published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope it will be useful, but WITHOUT
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|  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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|  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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|  * more details.
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|  *
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|  * You should have received a copy of the GNU General Public License along with
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|  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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|  * Place - Suite 330, Boston, MA 02111-1307 USA.
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|  *
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|  * Copyright (C) Ashok Raj <ashok.raj@intel.com>
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|  * Copyright (C) Shaohua Li <shaohua.li@intel.com>
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|  */
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| 
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| #ifndef __DMAR_H__
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| #define __DMAR_H__
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| 
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| #include <linux/acpi.h>
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| #include <linux/types.h>
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| #include <linux/msi.h>
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| 
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| #if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP)
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| struct intel_iommu;
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| 
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| struct dmar_drhd_unit {
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| 	struct list_head list;		/* list of drhd units	*/
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| 	struct  acpi_dmar_header *hdr;	/* ACPI header		*/
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| 	u64	reg_base_addr;		/* register base address*/
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| 	struct	pci_dev **devices; 	/* target device array	*/
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| 	int	devices_cnt;		/* target device count	*/
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| 	u8	ignored:1; 		/* ignore drhd		*/
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| 	u8	include_all:1;
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| 	struct intel_iommu *iommu;
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| };
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| 
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| extern struct list_head dmar_drhd_units;
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| 
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| #define for_each_drhd_unit(drhd) \
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| 	list_for_each_entry(drhd, &dmar_drhd_units, list)
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| 
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| extern int dmar_table_init(void);
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| extern int dmar_dev_scope_init(void);
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| 
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| /* Intel IOMMU detection */
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| extern void detect_intel_iommu(void);
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| 
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| 
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| extern int parse_ioapics_under_ir(void);
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| extern int alloc_iommu(struct dmar_drhd_unit *);
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| #else
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| static inline void detect_intel_iommu(void)
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| {
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| 	return;
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| }
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| 
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| static inline int dmar_table_init(void)
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| {
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| 	return -ENODEV;
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| }
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| #endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */
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| 
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| #ifdef CONFIG_INTR_REMAP
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| extern int intr_remapping_enabled;
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| extern int enable_intr_remapping(int);
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| 
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| struct irte {
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| 	union {
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| 		struct {
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| 			__u64	present 	: 1,
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| 				fpd		: 1,
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| 				dst_mode	: 1,
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| 				redir_hint	: 1,
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| 				trigger_mode	: 1,
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| 				dlvry_mode	: 3,
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| 				avail		: 4,
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| 				__reserved_1	: 4,
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| 				vector		: 8,
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| 				__reserved_2	: 8,
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| 				dest_id		: 32;
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| 		};
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| 		__u64 low;
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| 	};
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| 
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| 	union {
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| 		struct {
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| 			__u64	sid		: 16,
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| 				sq		: 2,
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| 				svt		: 2,
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| 				__reserved_3	: 44;
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| 		};
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| 		__u64 high;
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| 	};
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| };
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| extern int get_irte(int irq, struct irte *entry);
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| extern int modify_irte(int irq, struct irte *irte_modified);
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| extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count);
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| extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index,
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|    			u16 sub_handle);
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| extern int map_irq_to_irte_handle(int irq, u16 *sub_handle);
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| extern int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index);
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| extern int flush_irte(int irq);
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| extern int free_irte(int irq);
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| 
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| extern int irq_remapped(int irq);
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| extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev);
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| extern struct intel_iommu *map_ioapic_to_ir(int apic);
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| #else
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| #define irq_remapped(irq)		(0)
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| #define enable_intr_remapping(mode)	(-1)
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| #define intr_remapping_enabled		(0)
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| #endif
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| 
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| #ifdef CONFIG_DMAR
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| extern const char *dmar_get_fault_reason(u8 fault_reason);
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| 
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| /* Can't use the common MSI interrupt functions
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|  * since DMAR is not a pci device
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|  */
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| extern void dmar_msi_unmask(unsigned int irq);
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| extern void dmar_msi_mask(unsigned int irq);
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| extern void dmar_msi_read(int irq, struct msi_msg *msg);
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| extern void dmar_msi_write(int irq, struct msi_msg *msg);
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| extern int dmar_set_interrupt(struct intel_iommu *iommu);
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| extern int arch_setup_dmar_msi(unsigned int irq);
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| 
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| extern int iommu_detected, no_iommu;
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| extern struct list_head dmar_rmrr_units;
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| struct dmar_rmrr_unit {
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| 	struct list_head list;		/* list of rmrr units	*/
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| 	struct acpi_dmar_header *hdr;	/* ACPI header		*/
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| 	u64	base_address;		/* reserved base address*/
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| 	u64	end_address;		/* reserved end address */
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| 	struct pci_dev **devices;	/* target devices */
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| 	int	devices_cnt;		/* target device count */
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| };
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| 
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| #define for_each_rmrr_units(rmrr) \
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| 	list_for_each_entry(rmrr, &dmar_rmrr_units, list)
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| /* Intel DMAR  initialization functions */
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| extern int intel_iommu_init(void);
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| #else
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| static inline int intel_iommu_init(void)
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| {
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| #ifdef CONFIG_INTR_REMAP
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| 	return dmar_dev_scope_init();
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| #else
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| 	return -ENODEV;
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| #endif
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| }
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| #endif /* !CONFIG_DMAR */
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| #endif /* __DMAR_H__ */
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