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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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b9c78022b0
Move the definition of MAX_DMA_ADDRESS from mach/dma.h to mach/memory.h, thereby placing it along side its relative, ISA_DMA_THRESHOLD. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
161 lines
3.8 KiB
C
161 lines
3.8 KiB
C
/*
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* arch/arm/mach-pnx4008/include/mach/dma.h
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*
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* PNX4008 DMA header file
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*
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* Author: Vitaly Wool
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* Copyright: MontaVista Software Inc. (c) 2005
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_DMA_H
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#define __ASM_ARCH_DMA_H
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#include "platform.h"
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#define MAX_DMA_CHANNELS 8
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#define DMAC_BASE IO_ADDRESS(PNX4008_DMA_CONFIG_BASE)
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#define DMAC_INT_STAT (DMAC_BASE + 0x0000)
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#define DMAC_INT_TC_STAT (DMAC_BASE + 0x0004)
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#define DMAC_INT_TC_CLEAR (DMAC_BASE + 0x0008)
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#define DMAC_INT_ERR_STAT (DMAC_BASE + 0x000c)
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#define DMAC_INT_ERR_CLEAR (DMAC_BASE + 0x0010)
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#define DMAC_SOFT_SREQ (DMAC_BASE + 0x0024)
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#define DMAC_CONFIG (DMAC_BASE + 0x0030)
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#define DMAC_Cx_SRC_ADDR(c) (DMAC_BASE + 0x0100 + (c) * 0x20)
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#define DMAC_Cx_DEST_ADDR(c) (DMAC_BASE + 0x0104 + (c) * 0x20)
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#define DMAC_Cx_LLI(c) (DMAC_BASE + 0x0108 + (c) * 0x20)
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#define DMAC_Cx_CONTROL(c) (DMAC_BASE + 0x010c + (c) * 0x20)
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#define DMAC_Cx_CONFIG(c) (DMAC_BASE + 0x0110 + (c) * 0x20)
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enum {
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WIDTH_BYTE = 0,
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WIDTH_HWORD,
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WIDTH_WORD
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};
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enum {
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FC_MEM2MEM_DMA,
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FC_MEM2PER_DMA,
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FC_PER2MEM_DMA,
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FC_PER2PER_DMA,
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FC_PER2PER_DPER,
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FC_MEM2PER_PER,
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FC_PER2MEM_PER,
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FC_PER2PER_SPER
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};
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enum {
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DMA_INT_UNKNOWN = 0,
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DMA_ERR_INT = 1,
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DMA_TC_INT = 2,
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};
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enum {
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DMA_BUFFER_ALLOCATED = 1,
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DMA_HAS_LL = 2,
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};
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enum {
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PER_CAM_DMA_1 = 0,
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PER_NDF_FLASH = 1,
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PER_MBX_SLAVE_FIFO = 2,
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PER_SPI2_REC_XMIT = 3,
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PER_MS_SD_RX_XMIT = 4,
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PER_HS_UART_1_XMIT = 5,
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PER_HS_UART_1_RX = 6,
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PER_HS_UART_2_XMIT = 7,
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PER_HS_UART_2_RX = 8,
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PER_HS_UART_7_XMIT = 9,
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PER_HS_UART_7_RX = 10,
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PER_SPI1_REC_XMIT = 11,
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PER_MLC_NDF_SREC = 12,
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PER_CAM_DMA_2 = 13,
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PER_PRNG_INFIFO = 14,
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PER_PRNG_OUTFIFO = 15,
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};
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struct pnx4008_dma_ch_ctrl {
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int tc_mask;
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int cacheable;
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int bufferable;
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int priv_mode;
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int di;
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int si;
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int dest_ahb1;
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int src_ahb1;
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int dwidth;
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int swidth;
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int dbsize;
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int sbsize;
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int tr_size;
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};
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struct pnx4008_dma_ch_config {
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int halt;
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int active;
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int lock;
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int itc;
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int ie;
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int flow_cntrl;
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int dest_per;
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int src_per;
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};
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struct pnx4008_dma_ll {
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unsigned long src_addr;
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unsigned long dest_addr;
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u32 next_dma;
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unsigned long ch_ctrl;
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struct pnx4008_dma_ll *next;
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int flags;
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void *alloc_data;
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int (*free) (void *);
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};
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struct pnx4008_dma_config {
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int is_ll;
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unsigned long src_addr;
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unsigned long dest_addr;
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unsigned long ch_ctrl;
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unsigned long ch_cfg;
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struct pnx4008_dma_ll *ll;
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u32 ll_dma;
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int flags;
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void *alloc_data;
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int (*free) (void *);
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};
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extern struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t *);
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extern void pnx4008_free_ll_entry(struct pnx4008_dma_ll *, dma_addr_t);
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extern void pnx4008_free_ll(u32 ll_dma, struct pnx4008_dma_ll *);
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extern int pnx4008_request_channel(char *, int,
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void (*)(int, int, void *),
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void *);
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extern void pnx4008_free_channel(int);
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extern int pnx4008_config_dma(int, int, int);
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extern int pnx4008_dma_pack_control(const struct pnx4008_dma_ch_ctrl *,
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unsigned long *);
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extern int pnx4008_dma_parse_control(unsigned long,
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struct pnx4008_dma_ch_ctrl *);
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extern int pnx4008_dma_pack_config(const struct pnx4008_dma_ch_config *,
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unsigned long *);
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extern int pnx4008_dma_parse_config(unsigned long,
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struct pnx4008_dma_ch_config *);
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extern int pnx4008_config_channel(int, struct pnx4008_dma_config *);
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extern int pnx4008_channel_get_config(int, struct pnx4008_dma_config *);
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extern int pnx4008_dma_ch_enable(int);
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extern int pnx4008_dma_ch_disable(int);
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extern int pnx4008_dma_ch_enabled(int);
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extern void pnx4008_dma_split_head_entry(struct pnx4008_dma_config *,
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struct pnx4008_dma_ch_ctrl *);
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extern void pnx4008_dma_split_ll_entry(struct pnx4008_dma_ll *,
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struct pnx4008_dma_ch_ctrl *);
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#endif /* _ASM_ARCH_DMA_H */
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