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	 70f82f2c59
			
		
	
	
		70f82f2c59
		
	
	
	
	
		
			
			Remove the cpu subtype cpp macros in favor of runtime detection, to improve compile coverage of the alchemy common code. (Increases kernel size by 700 bytes). Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/699/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
		
			
				
	
	
		
			127 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			127 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *  Copyright (C) 2007-2009, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
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|  *  	GPIOLIB support for Au1000, Au1500, Au1100, Au1550 and Au12x0.
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|  *
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|  *  This program is free software; you can redistribute	 it and/or modify it
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|  *  under  the terms of	 the GNU General  Public License as published by the
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|  *  Free Software Foundation;  either version 2 of the	License, or (at your
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|  *  option) any later version.
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|  *
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|  *  THIS  SOFTWARE  IS PROVIDED	  ``AS	IS'' AND   ANY	EXPRESS OR IMPLIED
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|  *  WARRANTIES,	  INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
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|  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
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|  *  NO	EVENT  SHALL   THE AUTHOR  BE	 LIABLE FOR ANY	  DIRECT, INDIRECT,
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|  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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|  *  NOT LIMITED	  TO, PROCUREMENT OF  SUBSTITUTE GOODS	OR SERVICES; LOSS OF
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|  *  USE, DATA,	OR PROFITS; OR	BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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|  *  ANY THEORY OF LIABILITY, WHETHER IN	 CONTRACT, STRICT LIABILITY, OR TORT
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|  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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|  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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|  *
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|  *  You should have received a copy of the  GNU General Public License along
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|  *  with this program; if not, write  to the Free Software Foundation, Inc.,
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|  *  675 Mass Ave, Cambridge, MA 02139, USA.
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|  *
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|  *  Notes :
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|  * 	au1000 SoC have only one GPIO block : GPIO1
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|  * 	Au1100, Au15x0, Au12x0 have a second one : GPIO2
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|  */
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| 
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| #include <linux/kernel.h>
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| #include <linux/module.h>
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| #include <linux/types.h>
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| #include <linux/platform_device.h>
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| #include <linux/gpio.h>
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| 
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| #include <asm/mach-au1x00/au1000.h>
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| #include <asm/mach-au1x00/gpio.h>
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| 
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| static int gpio2_get(struct gpio_chip *chip, unsigned offset)
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| {
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| 	return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE);
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| }
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| 
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| static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value)
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| {
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| 	alchemy_gpio2_set_value(offset + ALCHEMY_GPIO2_BASE, value);
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| }
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| 
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| static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset)
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| {
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| 	return alchemy_gpio2_direction_input(offset + ALCHEMY_GPIO2_BASE);
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| }
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| 
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| static int gpio2_direction_output(struct gpio_chip *chip, unsigned offset,
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| 				  int value)
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| {
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| 	return alchemy_gpio2_direction_output(offset + ALCHEMY_GPIO2_BASE,
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| 						value);
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| }
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| 
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| static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset)
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| {
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| 	return alchemy_gpio2_to_irq(offset + ALCHEMY_GPIO2_BASE);
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| }
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| 
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| 
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| static int gpio1_get(struct gpio_chip *chip, unsigned offset)
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| {
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| 	return alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE);
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| }
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| 
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| static void gpio1_set(struct gpio_chip *chip,
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| 				unsigned offset, int value)
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| {
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| 	alchemy_gpio1_set_value(offset + ALCHEMY_GPIO1_BASE, value);
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| }
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| 
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| static int gpio1_direction_input(struct gpio_chip *chip, unsigned offset)
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| {
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| 	return alchemy_gpio1_direction_input(offset + ALCHEMY_GPIO1_BASE);
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| }
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| 
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| static int gpio1_direction_output(struct gpio_chip *chip,
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| 					unsigned offset, int value)
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| {
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| 	return alchemy_gpio1_direction_output(offset + ALCHEMY_GPIO1_BASE,
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| 					     value);
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| }
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| 
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| static int gpio1_to_irq(struct gpio_chip *chip, unsigned offset)
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| {
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| 	return alchemy_gpio1_to_irq(offset + ALCHEMY_GPIO1_BASE);
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| }
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| 
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| struct gpio_chip alchemy_gpio_chip[] = {
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| 	[0] = {
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| 		.label			= "alchemy-gpio1",
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| 		.direction_input	= gpio1_direction_input,
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| 		.direction_output	= gpio1_direction_output,
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| 		.get			= gpio1_get,
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| 		.set			= gpio1_set,
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| 		.to_irq			= gpio1_to_irq,
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| 		.base			= ALCHEMY_GPIO1_BASE,
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| 		.ngpio			= ALCHEMY_GPIO1_NUM,
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| 	},
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| 	[1] = {
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| 		.label                  = "alchemy-gpio2",
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| 		.direction_input        = gpio2_direction_input,
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| 		.direction_output       = gpio2_direction_output,
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| 		.get                    = gpio2_get,
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| 		.set                    = gpio2_set,
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| 		.to_irq			= gpio2_to_irq,
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| 		.base                   = ALCHEMY_GPIO2_BASE,
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| 		.ngpio                  = ALCHEMY_GPIO2_NUM,
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| 	},
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| };
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| 
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| static int __init alchemy_gpiolib_init(void)
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| {
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| 	gpiochip_add(&alchemy_gpio_chip[0]);
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| 	if (alchemy_get_cputype() != ALCHEMY_CPU_AU1000)
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| 		gpiochip_add(&alchemy_gpio_chip[1]);
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| 
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| 	return 0;
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| }
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| arch_initcall(alchemy_gpiolib_init);
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