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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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f3d46f9d31
In preparation for removing volatile from the atomic_t definition, this patch adds a volatile cast to all the atomic read functions. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
319 lines
7.2 KiB
C
319 lines
7.2 KiB
C
#ifndef _ASM_M32R_ATOMIC_H
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#define _ASM_M32R_ATOMIC_H
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/*
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* linux/include/asm-m32r/atomic.h
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*
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* M32R version:
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* Copyright (C) 2001, 2002 Hitoshi Yamamoto
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* Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
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*/
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#include <linux/types.h>
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#include <asm/assembler.h>
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#include <asm/system.h>
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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*/
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#define ATOMIC_INIT(i) { (i) }
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/**
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* atomic_read - read atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically reads the value of @v.
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*/
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#define atomic_read(v) (*(volatile int *)&(v)->counter)
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/**
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* atomic_set - set atomic variable
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* @v: pointer of type atomic_t
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* @i: required value
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*
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* Atomically sets the value of @v to @i.
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*/
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#define atomic_set(v,i) (((v)->counter) = (i))
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/**
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* atomic_add_return - add integer to atomic variable and return it
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* @i: integer value to add
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* @v: pointer of type atomic_t
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*
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* Atomically adds @i to @v and return (@i + @v).
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*/
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static __inline__ int atomic_add_return(int i, atomic_t *v)
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{
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unsigned long flags;
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int result;
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local_irq_save(flags);
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__asm__ __volatile__ (
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"# atomic_add_return \n\t"
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DCACHE_CLEAR("%0", "r4", "%1")
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M32R_LOCK" %0, @%1; \n\t"
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"add %0, %2; \n\t"
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M32R_UNLOCK" %0, @%1; \n\t"
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: "=&r" (result)
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: "r" (&v->counter), "r" (i)
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: "memory"
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#ifdef CONFIG_CHIP_M32700_TS1
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, "r4"
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#endif /* CONFIG_CHIP_M32700_TS1 */
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);
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local_irq_restore(flags);
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return result;
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}
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/**
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* atomic_sub_return - subtract integer from atomic variable and return it
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v and return (@v - @i).
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*/
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static __inline__ int atomic_sub_return(int i, atomic_t *v)
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{
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unsigned long flags;
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int result;
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local_irq_save(flags);
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__asm__ __volatile__ (
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"# atomic_sub_return \n\t"
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DCACHE_CLEAR("%0", "r4", "%1")
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M32R_LOCK" %0, @%1; \n\t"
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"sub %0, %2; \n\t"
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M32R_UNLOCK" %0, @%1; \n\t"
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: "=&r" (result)
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: "r" (&v->counter), "r" (i)
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: "memory"
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#ifdef CONFIG_CHIP_M32700_TS1
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, "r4"
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#endif /* CONFIG_CHIP_M32700_TS1 */
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);
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local_irq_restore(flags);
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return result;
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}
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/**
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* atomic_add - add integer to atomic variable
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* @i: integer value to add
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* @v: pointer of type atomic_t
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*
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* Atomically adds @i to @v.
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*/
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#define atomic_add(i,v) ((void) atomic_add_return((i), (v)))
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/**
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* atomic_sub - subtract the atomic variable
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v.
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*/
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#define atomic_sub(i,v) ((void) atomic_sub_return((i), (v)))
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/**
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* atomic_sub_and_test - subtract value from variable and test result
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* @i: integer value to subtract
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* @v: pointer of type atomic_t
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*
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* Atomically subtracts @i from @v and returns
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* true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
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/**
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* atomic_inc_return - increment atomic variable and return it
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1 and returns the result.
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*/
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static __inline__ int atomic_inc_return(atomic_t *v)
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{
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unsigned long flags;
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int result;
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local_irq_save(flags);
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__asm__ __volatile__ (
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"# atomic_inc_return \n\t"
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DCACHE_CLEAR("%0", "r4", "%1")
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M32R_LOCK" %0, @%1; \n\t"
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"addi %0, #1; \n\t"
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M32R_UNLOCK" %0, @%1; \n\t"
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: "=&r" (result)
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: "r" (&v->counter)
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: "memory"
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#ifdef CONFIG_CHIP_M32700_TS1
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, "r4"
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#endif /* CONFIG_CHIP_M32700_TS1 */
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);
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local_irq_restore(flags);
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return result;
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}
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/**
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* atomic_dec_return - decrement atomic variable and return it
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* @v: pointer of type atomic_t
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*
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* Atomically decrements @v by 1 and returns the result.
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*/
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static __inline__ int atomic_dec_return(atomic_t *v)
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{
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unsigned long flags;
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int result;
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local_irq_save(flags);
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__asm__ __volatile__ (
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"# atomic_dec_return \n\t"
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DCACHE_CLEAR("%0", "r4", "%1")
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M32R_LOCK" %0, @%1; \n\t"
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"addi %0, #-1; \n\t"
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M32R_UNLOCK" %0, @%1; \n\t"
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: "=&r" (result)
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: "r" (&v->counter)
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: "memory"
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#ifdef CONFIG_CHIP_M32700_TS1
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, "r4"
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#endif /* CONFIG_CHIP_M32700_TS1 */
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);
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local_irq_restore(flags);
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return result;
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}
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/**
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* atomic_inc - increment atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1.
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*/
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#define atomic_inc(v) ((void)atomic_inc_return(v))
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/**
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* atomic_dec - decrement atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically decrements @v by 1.
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*/
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#define atomic_dec(v) ((void)atomic_dec_return(v))
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/**
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
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/**
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* atomic_dec_and_test - decrement and test
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* @v: pointer of type atomic_t
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*
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* Atomically decrements @v by 1 and
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* returns true if the result is 0, or false for all
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* other cases.
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*/
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#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
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/**
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* atomic_add_negative - add and test if negative
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* @v: pointer of type atomic_t
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* @i: integer value to add
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*
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* Atomically adds @i to @v and returns true
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* if the result is negative, or false when
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* result is greater than or equal to zero.
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*/
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#define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
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#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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/**
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* atomic_add_unless - add unless the number is a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns non-zero if @v was not @u, and zero otherwise.
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*/
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static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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return c != (u);
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}
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#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
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static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr)
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{
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unsigned long flags;
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unsigned long tmp;
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local_irq_save(flags);
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__asm__ __volatile__ (
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"# atomic_clear_mask \n\t"
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DCACHE_CLEAR("%0", "r5", "%1")
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M32R_LOCK" %0, @%1; \n\t"
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"and %0, %2; \n\t"
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M32R_UNLOCK" %0, @%1; \n\t"
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: "=&r" (tmp)
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: "r" (addr), "r" (~mask)
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: "memory"
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#ifdef CONFIG_CHIP_M32700_TS1
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, "r5"
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#endif /* CONFIG_CHIP_M32700_TS1 */
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);
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local_irq_restore(flags);
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}
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static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *addr)
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{
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unsigned long flags;
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unsigned long tmp;
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local_irq_save(flags);
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__asm__ __volatile__ (
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"# atomic_set_mask \n\t"
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DCACHE_CLEAR("%0", "r5", "%1")
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M32R_LOCK" %0, @%1; \n\t"
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"or %0, %2; \n\t"
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M32R_UNLOCK" %0, @%1; \n\t"
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: "=&r" (tmp)
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: "r" (addr), "r" (mask)
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: "memory"
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#ifdef CONFIG_CHIP_M32700_TS1
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, "r5"
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#endif /* CONFIG_CHIP_M32700_TS1 */
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);
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local_irq_restore(flags);
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}
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/* Atomic operations are already serializing on m32r */
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#define smp_mb__before_atomic_dec() barrier()
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#define smp_mb__after_atomic_dec() barrier()
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#define smp_mb__before_atomic_inc() barrier()
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#define smp_mb__after_atomic_inc() barrier()
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#include <asm-generic/atomic-long.h>
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#endif /* _ASM_M32R_ATOMIC_H */
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