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	 a439fe51a1
			
		
	
	
		a439fe51a1
		
	
	
	
	
		
			
			The majority of this patch was created by the following script: *** ASM=arch/sparc/include/asm mkdir -p $ASM git mv include/asm-sparc64/ftrace.h $ASM git rm include/asm-sparc64/* git mv include/asm-sparc/* $ASM sed -ie 's/asm-sparc64/asm/g' $ASM/* sed -ie 's/asm-sparc/asm/g' $ASM/* *** The rest was an update of the top-level Makefile to use sparc for header files when sparc64 is being build. And a small fixlet to pick up the correct unistd.h from sparc64 code. Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
		
			
				
	
	
		
			52 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			52 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef _SPARC_MEMREG_H
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| #define _SPARC_MEMREG_H
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| /* memreg.h:  Definitions of the values found in the synchronous
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|  *            and asynchronous memory error registers when a fault
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|  *            occurs on the sun4c.
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|  *
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|  * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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|  */
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| 
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| /* First the synchronous error codes, these are usually just
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|  * normal page faults.
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|  */
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| 
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| #define SUN4C_SYNC_WDRESET   0x0001  /* watchdog reset */
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| #define SUN4C_SYNC_SIZE      0x0002  /* bad access size? whuz this? */
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| #define SUN4C_SYNC_PARITY    0x0008  /* bad ram chips caused a parity error */
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| #define SUN4C_SYNC_SBUS      0x0010  /* the SBUS had some problems... */
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| #define SUN4C_SYNC_NOMEM     0x0020  /* translation to non-existent ram */
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| #define SUN4C_SYNC_PROT      0x0040  /* access violated pte protections */
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| #define SUN4C_SYNC_NPRESENT  0x0080  /* pte said that page was not present */
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| #define SUN4C_SYNC_BADWRITE  0x8000  /* while writing something went bogus */
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| 
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| #define SUN4C_SYNC_BOLIXED  \
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|         (SUN4C_SYNC_WDRESET | SUN4C_SYNC_SIZE | SUN4C_SYNC_SBUS | \
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|          SUN4C_SYNC_NOMEM | SUN4C_SYNC_PARITY)
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| 
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| /* Now the asynchronous error codes, these are almost always produced
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|  * by the cache writing things back to memory and getting a bad translation.
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|  * Bad DVMA transactions can cause these faults too.
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|  */
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| 
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| #define SUN4C_ASYNC_BADDVMA 0x0010  /* error during DVMA access */
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| #define SUN4C_ASYNC_NOMEM   0x0020  /* write back pointed to bad phys addr */
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| #define SUN4C_ASYNC_BADWB   0x0080  /* write back points to non-present page */
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| 
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| /* Memory parity error register with associated bit constants. */
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| #ifndef __ASSEMBLY__
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| extern __volatile__ unsigned long __iomem *sun4c_memerr_reg;
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| #endif
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| 
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| #define	SUN4C_MPE_ERROR	0x80	/* Parity error detected. (ro) */
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| #define	SUN4C_MPE_MULTI	0x40	/* Multiple parity errors detected. (ro) */
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| #define	SUN4C_MPE_TEST	0x20	/* Write inverse parity. (rw) */
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| #define	SUN4C_MPE_CHECK	0x10	/* Enable parity checking. (rw) */
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| #define	SUN4C_MPE_ERR00	0x08	/* Parity error in bits 0-7. (ro) */
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| #define	SUN4C_MPE_ERR08	0x04	/* Parity error in bits 8-15. (ro) */
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| #define	SUN4C_MPE_ERR16	0x02	/* Parity error in bits 16-23. (ro) */
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| #define	SUN4C_MPE_ERR24	0x01	/* Parity error in bits 24-31. (ro) */
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| #define	SUN4C_MPE_ERRS	0x0F	/* Bit mask for the error bits. (ro) */
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| 
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| #endif /* !(_SPARC_MEMREG_H) */
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