mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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5382f419c1
Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
51 lines
1.4 KiB
C
51 lines
1.4 KiB
C
/*
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* linux/arch/arm/mach-mmp/include/mach/regs-apmu.h
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*
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* Application Subsystem Power Management Unit
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_MACH_REGS_APMU_H
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#define __ASM_MACH_REGS_APMU_H
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#include <mach/addr-map.h>
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#define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800)
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#define APMU_REG(x) (APMU_VIRT_BASE + (x))
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/* Clock Reset Control */
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#define APMU_IRE APMU_REG(0x048)
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#define APMU_LCD APMU_REG(0x04c)
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#define APMU_CCIC APMU_REG(0x050)
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#define APMU_SDH0 APMU_REG(0x054)
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#define APMU_SDH1 APMU_REG(0x058)
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#define APMU_USB APMU_REG(0x05c)
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#define APMU_NAND APMU_REG(0x060)
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#define APMU_DMA APMU_REG(0x064)
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#define APMU_GEU APMU_REG(0x068)
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#define APMU_BUS APMU_REG(0x06c)
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#define APMU_SDH2 APMU_REG(0x0e8)
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#define APMU_SDH3 APMU_REG(0x0ec)
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#define APMU_FNCLK_EN (1 << 4)
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#define APMU_AXICLK_EN (1 << 3)
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#define APMU_FNRST_DIS (1 << 1)
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#define APMU_AXIRST_DIS (1 << 0)
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/* Wake Clear Register */
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#define APMU_WAKE_CLR APMU_REG(0x07c)
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#define APMU_PXA168_KP_WAKE_CLR (1 << 7)
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#define APMU_PXA168_CFI_WAKE_CLR (1 << 6)
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#define APMU_PXA168_XD_WAKE_CLR (1 << 5)
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#define APMU_PXA168_MSP_WAKE_CLR (1 << 4)
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#define APMU_PXA168_SD4_WAKE_CLR (1 << 3)
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#define APMU_PXA168_SD3_WAKE_CLR (1 << 2)
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#define APMU_PXA168_SD2_WAKE_CLR (1 << 1)
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#define APMU_PXA168_SD1_WAKE_CLR (1 << 0)
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#endif /* __ASM_MACH_REGS_APMU_H */
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