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	 2f7e8faef5
			
		
	
	
		2f7e8faef5
		
	
	
	
	
		
			
			Marvell MMP2 (aka ARMADA610) is a SoC based on PJ4 core. It's ARMv6 compatible. Support basic interrupt handler and timer, and basic support for MMP2 based FLINT platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
		
			
				
	
	
		
			31 lines
		
	
	
		
			745 B
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			31 lines
		
	
	
		
			745 B
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*
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|  * linux/arch/arm/mach-mmp/include/mach/entry-macro.S
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| 
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| #include <mach/regs-icu.h>
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| 
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| 	.macro	disable_fiq
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| 	.endm
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| 
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| 	.macro	arch_ret_to_user, tmp1, tmp2
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| 	.endm
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| 
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| 	.macro	get_irqnr_preamble, base, tmp
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| 	mrc	p15, 0, \tmp, c0, c0, 0		@ CPUID
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| 	and	\tmp, \tmp, #0xff00
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| 	cmp	\tmp, #0x5800
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| 	ldr	\base, =ICU_VIRT_BASE
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| 	addne	\base, \base, #0x10c		@ PJ1 AP INT SEL register
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| 	addeq	\base, \base, #0x104		@ PJ4 IRQ SEL register
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| 	.endm
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| 
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| 	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
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| 	ldr	\tmp, [\base, #0]
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| 	and	\irqnr, \tmp, #0x3f
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| 	tst	\tmp, #(1 << 6)
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| 	.endm
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