mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-10-31 22:26:12 +00:00
6ab3d5624e
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
462 lines
11 KiB
C
462 lines
11 KiB
C
/*
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* PowerPC hash table management proc entry. Will show information
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* about the current hash table and will allow changes to it.
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*
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* Written by Cort Dougan (cort@cs.nmt.edu)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/proc_fs.h>
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#include <linux/stat.h>
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#include <linux/sysctl.h>
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#include <linux/capability.h>
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#include <linux/ctype.h>
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#include <linux/threads.h>
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#include <linux/smp_lock.h>
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#include <linux/seq_file.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <asm/uaccess.h>
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#include <asm/mmu.h>
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#include <asm/residual.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/cputable.h>
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#include <asm/system.h>
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#include <asm/reg.h>
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static int ppc_htab_show(struct seq_file *m, void *v);
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static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
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size_t count, loff_t *ppos);
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extern PTE *Hash, *Hash_end;
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extern unsigned long Hash_size, Hash_mask;
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extern unsigned long _SDR1;
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extern unsigned long htab_reloads;
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extern unsigned long htab_preloads;
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extern unsigned long htab_evicts;
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extern unsigned long pte_misses;
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extern unsigned long pte_errors;
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extern unsigned int primary_pteg_full;
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extern unsigned int htab_hash_searches;
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static int ppc_htab_open(struct inode *inode, struct file *file)
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{
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return single_open(file, ppc_htab_show, NULL);
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}
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const struct file_operations ppc_htab_operations = {
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.open = ppc_htab_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.write = ppc_htab_write,
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.release = single_release,
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};
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static char *pmc1_lookup(unsigned long mmcr0)
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{
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switch ( mmcr0 & (0x7f<<7) )
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{
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case 0x0:
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return "none";
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case MMCR0_PMC1_CYCLES:
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return "cycles";
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case MMCR0_PMC1_ICACHEMISS:
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return "ic miss";
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case MMCR0_PMC1_DTLB:
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return "dtlb miss";
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default:
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return "unknown";
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}
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}
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static char *pmc2_lookup(unsigned long mmcr0)
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{
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switch ( mmcr0 & 0x3f )
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{
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case 0x0:
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return "none";
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case MMCR0_PMC2_CYCLES:
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return "cycles";
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case MMCR0_PMC2_DCACHEMISS:
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return "dc miss";
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case MMCR0_PMC2_ITLB:
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return "itlb miss";
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case MMCR0_PMC2_LOADMISSTIME:
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return "load miss time";
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default:
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return "unknown";
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}
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}
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/*
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* print some useful info about the hash table. This function
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* is _REALLY_ slow (see the nested for loops below) but nothing
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* in here should be really timing critical. -- Cort
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*/
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static int ppc_htab_show(struct seq_file *m, void *v)
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{
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unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
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#if defined(CONFIG_PPC_STD_MMU)
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unsigned int kptes = 0, uptes = 0;
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PTE *ptr;
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#endif /* CONFIG_PPC_STD_MMU */
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if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
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mmcr0 = mfspr(SPRN_MMCR0);
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pmc1 = mfspr(SPRN_PMC1);
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pmc2 = mfspr(SPRN_PMC2);
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seq_printf(m,
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"604 Performance Monitoring\n"
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"MMCR0\t\t: %08lx %s%s ",
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mmcr0,
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( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
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( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
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seq_printf(m,
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"\nPMC1\t\t: %08lx (%s)\n"
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"PMC2\t\t: %08lx (%s)\n",
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pmc1, pmc1_lookup(mmcr0),
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pmc2, pmc2_lookup(mmcr0));
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}
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#ifdef CONFIG_PPC_STD_MMU
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/* if we don't have a htab */
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if ( Hash_size == 0 ) {
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seq_printf(m, "No Hash Table used\n");
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return 0;
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}
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for (ptr = Hash; ptr < Hash_end; ptr++) {
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unsigned int mctx, vsid;
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if (!ptr->v)
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continue;
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/* undo the esid skew */
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vsid = ptr->vsid;
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mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
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if (mctx == 0)
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kptes++;
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else
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uptes++;
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}
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seq_printf(m,
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"PTE Hash Table Information\n"
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"Size\t\t: %luKb\n"
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"Buckets\t\t: %lu\n"
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"Address\t\t: %08lx\n"
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"Entries\t\t: %lu\n"
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"User ptes\t: %u\n"
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"Kernel ptes\t: %u\n"
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"Percent full\t: %lu%%\n"
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, (unsigned long)(Hash_size>>10),
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(Hash_size/(sizeof(PTE)*8)),
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(unsigned long)Hash,
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Hash_size/sizeof(PTE)
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, uptes,
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kptes,
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((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
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);
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seq_printf(m,
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"Reloads\t\t: %lu\n"
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"Preloads\t: %lu\n"
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"Searches\t: %u\n"
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"Overflows\t: %u\n"
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"Evicts\t\t: %lu\n",
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htab_reloads, htab_preloads, htab_hash_searches,
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primary_pteg_full, htab_evicts);
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#endif /* CONFIG_PPC_STD_MMU */
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seq_printf(m,
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"Non-error misses: %lu\n"
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"Error misses\t: %lu\n",
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pte_misses, pte_errors);
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return 0;
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}
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/*
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* Allow user to define performance counters and resize the hash table
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*/
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static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
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size_t count, loff_t *ppos)
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{
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#ifdef CONFIG_PPC_STD_MMU
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unsigned long tmp;
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char buffer[16];
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if (!capable(CAP_SYS_ADMIN))
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return -EACCES;
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if (strncpy_from_user(buffer, ubuffer, 15))
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return -EFAULT;
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buffer[15] = 0;
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/* don't set the htab size for now */
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if ( !strncmp( buffer, "size ", 5) )
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return -EBUSY;
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if ( !strncmp( buffer, "reset", 5) )
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{
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if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
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/* reset PMC1 and PMC2 */
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mtspr(SPRN_PMC1, 0);
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mtspr(SPRN_PMC2, 0);
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}
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htab_reloads = 0;
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htab_evicts = 0;
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pte_misses = 0;
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pte_errors = 0;
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}
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/* Everything below here requires the performance monitor feature. */
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if (!cpu_has_feature(CPU_FTR_604_PERF_MON))
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return count;
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/* turn off performance monitoring */
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if ( !strncmp( buffer, "off", 3) )
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{
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mtspr(SPRN_MMCR0, 0);
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mtspr(SPRN_PMC1, 0);
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mtspr(SPRN_PMC2, 0);
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}
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if ( !strncmp( buffer, "user", 4) )
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{
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/* setup mmcr0 and clear the correct pmc */
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tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
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mtspr(SPRN_MMCR0, tmp);
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mtspr(SPRN_PMC1, 0);
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mtspr(SPRN_PMC2, 0);
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}
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if ( !strncmp( buffer, "kernel", 6) )
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{
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/* setup mmcr0 and clear the correct pmc */
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tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
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mtspr(SPRN_MMCR0, tmp);
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mtspr(SPRN_PMC1, 0);
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mtspr(SPRN_PMC2, 0);
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}
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/* PMC1 values */
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if ( !strncmp( buffer, "dtlb", 4) )
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{
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/* setup mmcr0 and clear the correct pmc */
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tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
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mtspr(SPRN_MMCR0, tmp);
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mtspr(SPRN_PMC1, 0);
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}
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if ( !strncmp( buffer, "ic miss", 7) )
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{
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/* setup mmcr0 and clear the correct pmc */
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tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
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mtspr(SPRN_MMCR0, tmp);
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mtspr(SPRN_PMC1, 0);
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}
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/* PMC2 values */
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if ( !strncmp( buffer, "load miss time", 14) )
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{
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/* setup mmcr0 and clear the correct pmc */
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asm volatile(
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"mfspr %0,%1\n\t" /* get current mccr0 */
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"rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
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"ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
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"mtspr %1,%0 \n\t" /* set new mccr0 */
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"mtspr %3,%4 \n\t" /* reset the pmc */
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: "=r" (tmp)
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: "i" (SPRN_MMCR0),
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"i" (MMCR0_PMC2_LOADMISSTIME),
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"i" (SPRN_PMC2), "r" (0) );
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}
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if ( !strncmp( buffer, "itlb", 4) )
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{
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/* setup mmcr0 and clear the correct pmc */
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asm volatile(
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"mfspr %0,%1\n\t" /* get current mccr0 */
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"rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
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"ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
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"mtspr %1,%0 \n\t" /* set new mccr0 */
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"mtspr %3,%4 \n\t" /* reset the pmc */
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: "=r" (tmp)
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: "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
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"i" (SPRN_PMC2), "r" (0) );
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}
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if ( !strncmp( buffer, "dc miss", 7) )
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{
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/* setup mmcr0 and clear the correct pmc */
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asm volatile(
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"mfspr %0,%1\n\t" /* get current mccr0 */
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"rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
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"ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
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"mtspr %1,%0 \n\t" /* set new mccr0 */
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"mtspr %3,%4 \n\t" /* reset the pmc */
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: "=r" (tmp)
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: "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
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"i" (SPRN_PMC2), "r" (0) );
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}
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return count;
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#else /* CONFIG_PPC_STD_MMU */
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return 0;
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#endif /* CONFIG_PPC_STD_MMU */
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}
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int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
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void __user *buffer_arg, size_t *lenp, loff_t *ppos)
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{
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int vleft, first=1, len, left, val;
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char __user *buffer = (char __user *) buffer_arg;
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#define TMPBUFLEN 256
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char buf[TMPBUFLEN], *p;
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static const char *sizestrings[4] = {
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"2MB", "256KB", "512KB", "1MB"
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};
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static const char *clockstrings[8] = {
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"clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
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"+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
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};
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static const char *typestrings[4] = {
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"flow-through burst SRAM", "reserved SRAM",
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"pipelined burst SRAM", "pipelined late-write SRAM"
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};
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static const char *holdstrings[4] = {
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"0.5", "1.0", "(reserved2)", "(reserved3)"
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};
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if (!cpu_has_feature(CPU_FTR_L2CR))
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return -EFAULT;
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if ( /*!table->maxlen ||*/ (*ppos && !write)) {
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*lenp = 0;
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return 0;
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}
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vleft = table->maxlen / sizeof(int);
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left = *lenp;
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for (; left /*&& vleft--*/; first=0) {
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if (write) {
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while (left) {
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char c;
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if(get_user(c, buffer))
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return -EFAULT;
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if (!isspace(c))
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break;
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left--;
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buffer++;
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}
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if (!left)
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break;
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len = left;
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if (len > TMPBUFLEN-1)
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len = TMPBUFLEN-1;
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if(copy_from_user(buf, buffer, len))
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return -EFAULT;
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buf[len] = 0;
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p = buf;
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if (*p < '0' || *p > '9')
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break;
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val = simple_strtoul(p, &p, 0);
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len = p-buf;
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if ((len < left) && *p && !isspace(*p))
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break;
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buffer += len;
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left -= len;
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_set_L2CR(val);
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} else {
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p = buf;
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if (!first)
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*p++ = '\t';
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val = _get_L2CR();
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p += sprintf(p, "0x%08x: ", val);
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p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
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"disabled");
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p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
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p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
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p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
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p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
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p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
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p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
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p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
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"copy-back");
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p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
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p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
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p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
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p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
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p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
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p += sprintf(p,"\n");
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len = strlen(buf);
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if (len > left)
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len = left;
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if (copy_to_user(buffer, buf, len))
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return -EFAULT;
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left -= len;
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buffer += len;
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break;
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}
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}
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if (!write && !first && left) {
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if(put_user('\n', (char __user *) buffer))
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return -EFAULT;
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left--, buffer++;
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}
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if (write) {
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char __user *s = (char __user *) buffer;
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while (left) {
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char c;
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if(get_user(c, s++))
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return -EFAULT;
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if (!isspace(c))
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break;
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left--;
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}
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}
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if (write && first)
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return -EINVAL;
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*lenp -= left;
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*ppos += *lenp;
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return 0;
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}
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#ifdef CONFIG_SYSCTL
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/*
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* Register our sysctl.
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*/
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static ctl_table htab_ctl_table[]={
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{
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.ctl_name = KERN_PPC_L2CR,
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.procname = "l2cr",
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.mode = 0644,
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.proc_handler = &proc_dol2crvec,
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},
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{ 0, },
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};
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static ctl_table htab_sysctl_root[] = {
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{ 1, "kernel", NULL, 0, 0755, htab_ctl_table, },
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{ 0,},
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};
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static int __init
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register_ppc_htab_sysctl(void)
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{
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register_sysctl_table(htab_sysctl_root, 0);
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return 0;
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}
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__initcall(register_ppc_htab_sysctl);
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#endif
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