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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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ba11c79aba
This is the microcode for the FEC task and the associated support code. The microcode itself comes directly from the offical API (v2.2) Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
79 lines
2.6 KiB
C
79 lines
2.6 KiB
C
/*
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* Bestcomm FEC RX task microcode
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*
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Automatically created based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex
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* on Tue Mar 22 11:19:38 2005 GMT
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*/
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#include <asm/types.h>
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/*
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* The header consists of the following fields:
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* u32 magic;
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* u8 desc_size;
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* u8 var_size;
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* u8 inc_size;
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* u8 first_var;
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* u8 reserved[8];
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*
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* The size fields contain the number of 32-bit words.
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*/
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u32 bcom_fec_rx_task[] = {
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/* header */
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0x4243544b,
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0x18060709,
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0x00000000,
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0x00000000,
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/* Task descriptors */
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0x808220e3, /* LCD: idx0 = var1, idx1 = var4; idx1 <= var3; idx0 += inc4, idx1 += inc3 */
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0x10601010, /* DRD1A: var4 = var2; FN=0 MORE init=3 WS=0 RS=0 */
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0xb8800264, /* LCD: idx2 = *idx1, idx3 = var0; idx2 < var9; idx2 += inc4, idx3 += inc4 */
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0x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
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0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */
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0x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */
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0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */
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0xb8c58029, /* LCD: idx3 = *(idx1 + var00000015); idx3 once var0; idx3 += inc5 */
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0x60000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=0 RS=0 */
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0x088cf8cc, /* DRD2B1: idx2 = EU3(); EU3(idx3,var12) */
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0x991982f2, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var11; idx2 += inc6, idx3 += inc2 */
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0x006acf80, /* DRD1A: *idx3 = *idx0; FN=0 init=3 WS=1 RS=1 */
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0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */
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0x9999802d, /* LCD: idx3 = idx3; idx3 once var0; idx3 += inc5 */
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0x70000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */
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0x034cfc4e, /* DRD2B1: var13 = EU3(); EU3(*idx1,var14) */
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0x00008868, /* DRD1A: idx2 = var13; FN=0 init=0 WS=0 RS=0 */
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0x99198341, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var13; idx2 += inc0, idx3 += inc1 */
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0x007ecf80, /* DRD1A: *idx3 = *idx0; FN=0 init=3 WS=3 RS=3 */
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0x99198272, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var9; idx2 += inc6, idx3 += inc2 */
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0x046acf80, /* DRD1A: *idx3 = *idx0; FN=0 INT init=3 WS=1 RS=1 */
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0x9819002d, /* LCD: idx2 = idx0; idx2 once var0; idx2 += inc5 */
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0x0060c790, /* DRD1A: *idx1 = *idx2; FN=0 init=3 WS=0 RS=0 */
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0x000001f8, /* NOP */
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/* VAR[9]-VAR[14] */
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0x40000000,
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0x7fff7fff,
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0x00000000,
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0x00000003,
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0x40000008,
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0x43ffffff,
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/* INC[0]-INC[6] */
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0x40000000,
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0xe0000000,
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0xe0000000,
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0xa0000008,
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0x20000000,
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0x00000000,
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0x4000ffff,
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};
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