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		25aec76a3b
		
	
	
	
	
		
			
			struct net_device has its own struct net_device_stats member, so use this one instead of a private copy in the ether1_priv struct. As the new ndo_get_stats function would just return dev->stats we can omit it. This patch also removes an incorrect memset of the stats on open. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
		
			
				
	
	
		
			281 lines
		
	
	
		
			7.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			281 lines
		
	
	
		
			7.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  *  linux/drivers/acorn/net/ether1.h
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|  *
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|  *  Copyright (C) 1996 Russell King
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  *
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|  *  Network driver for Acorn Ether1 cards.
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|  */
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| 
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| #ifndef _LINUX_ether1_H
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| #define _LINUX_ether1_H
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| 
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| #ifdef __ETHER1_C
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| /* use 0 for production, 1 for verification, >2 for debug */
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| #ifndef NET_DEBUG
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| #define NET_DEBUG 0
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| #endif
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| 
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| #define priv(dev)	((struct ether1_priv *)netdev_priv(dev))
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| 
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| /* Page register */
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| #define REG_PAGE	(priv(dev)->base + 0x0000)
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| 
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| /* Control register */
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| #define REG_CONTROL	(priv(dev)->base + 0x0004)
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| #define CTRL_RST	0x01
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| #define CTRL_LOOPBACK	0x02
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| #define CTRL_CA		0x04
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| #define CTRL_ACK	0x08
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| 
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| #define ETHER1_RAM	(priv(dev)->base + 0x2000)
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| 
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| /* HW address */
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| #define IDPROM_ADDRESS	(priv(dev)->base + 0x0024)
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| 
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| struct ether1_priv {
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| 	void __iomem *base;
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| 	unsigned int tx_link;
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| 	unsigned int tx_head;
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| 	volatile unsigned int tx_tail;
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| 	volatile unsigned int rx_head;
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| 	volatile unsigned int rx_tail;
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| 	unsigned char bus_type;
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| 	unsigned char resetting;
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| 	unsigned char initialising : 1;
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| 	unsigned char restart      : 1;
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| };
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| 
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| #define I82586_NULL (-1)
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| 
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| typedef struct { /* tdr */
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| 	unsigned short tdr_status;
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| 	unsigned short tdr_command;
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| 	unsigned short tdr_link;
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| 	unsigned short tdr_result;
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| #define TDR_TIME	(0x7ff)
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| #define TDR_SHORT	(1 << 12)
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| #define TDR_OPEN	(1 << 13)
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| #define TDR_XCVRPROB	(1 << 14)
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| #define TDR_LNKOK	(1 << 15)
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| } tdr_t;
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| 
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| typedef struct { /* transmit */
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| 	unsigned short tx_status;
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| 	unsigned short tx_command;
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| 	unsigned short tx_link;
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| 	unsigned short tx_tbdoffset;
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| } tx_t;
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| 
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| typedef struct { /* tbd */
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| 	unsigned short tbd_opts;
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| #define TBD_CNT		(0x3fff)
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| #define TBD_EOL		(1 << 15)
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| 	unsigned short tbd_link;
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| 	unsigned short tbd_bufl;
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| 	unsigned short tbd_bufh;
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| } tbd_t;
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| 
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| typedef struct { /* rfd */
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| 	unsigned short rfd_status;
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| #define RFD_NOEOF	(1 << 6)
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| #define RFD_FRAMESHORT	(1 << 7)
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| #define RFD_DMAOVRN	(1 << 8)
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| #define RFD_NORESOURCES	(1 << 9)
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| #define RFD_ALIGNERROR	(1 << 10)
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| #define RFD_CRCERROR	(1 << 11)
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| #define RFD_OK		(1 << 13)
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| #define RFD_FDCONSUMED	(1 << 14)
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| #define RFD_COMPLETE	(1 << 15)
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| 	unsigned short rfd_command;
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| #define RFD_CMDSUSPEND	(1 << 14)
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| #define RFD_CMDEL	(1 << 15)
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| 	unsigned short rfd_link;
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| 	unsigned short rfd_rbdoffset;
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| 	unsigned char  rfd_dest[6];
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| 	unsigned char  rfd_src[6];
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| 	unsigned short rfd_len;
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| } rfd_t;
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| 
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| typedef struct { /* rbd */
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| 	unsigned short rbd_status;
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| #define RBD_ACNT	(0x3fff)
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| #define RBD_ACNTVALID	(1 << 14)
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| #define RBD_EOF		(1 << 15)
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| 	unsigned short rbd_link;
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| 	unsigned short rbd_bufl;
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| 	unsigned short rbd_bufh;
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| 	unsigned short rbd_len;
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| } rbd_t;
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| 
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| typedef struct { /* nop */
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| 	unsigned short nop_status;
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| 	unsigned short nop_command;
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| 	unsigned short nop_link;
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| } nop_t;
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| 
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| typedef struct { /* set multicast */
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| 	unsigned short mc_status;
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| 	unsigned short mc_command;
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| 	unsigned short mc_link;
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| 	unsigned short mc_cnt;
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| 	unsigned char  mc_addrs[1][6];
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| } mc_t;
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| 
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| typedef struct { /* set address */
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| 	unsigned short sa_status;
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| 	unsigned short sa_command;
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| 	unsigned short sa_link;
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| 	unsigned char  sa_addr[6];
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| } sa_t;
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| 
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| typedef struct { /* config command */
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| 	unsigned short cfg_status;
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| 	unsigned short cfg_command;
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| 	unsigned short cfg_link;
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| 	unsigned char  cfg_bytecnt;	/* size foll data: 4 - 12		 */
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| 	unsigned char  cfg_fifolim;	/* FIFO threshold			 */
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| 	unsigned char  cfg_byte8;
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| #define CFG8_SRDY	(1 << 6)
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| #define CFG8_SAVEBADF	(1 << 7)
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| 	unsigned char  cfg_byte9;
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| #define CFG9_ADDRLEN(x)	(x)
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| #define CFG9_ADDRLENBUF	(1 << 3)
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| #define CFG9_PREAMB2	(0 << 4)
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| #define CFG9_PREAMB4	(1 << 4)
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| #define CFG9_PREAMB8	(2 << 4)
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| #define CFG9_PREAMB16	(3 << 4)
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| #define CFG9_ILOOPBACK	(1 << 6)
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| #define CFG9_ELOOPBACK	(1 << 7)
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| 	unsigned char  cfg_byte10;
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| #define CFG10_LINPRI(x)	(x)
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| #define CFG10_ACR(x)	(x << 4)
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| #define CFG10_BOFMET	(1 << 7)
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| 	unsigned char  cfg_ifs;
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| 	unsigned char  cfg_slotl;
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| 	unsigned char  cfg_byte13;
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| #define CFG13_SLOTH(x)	(x)
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| #define CFG13_RETRY(x)	(x << 4)
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| 	unsigned char  cfg_byte14;
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| #define CFG14_PROMISC	(1 << 0)
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| #define CFG14_DISBRD	(1 << 1)
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| #define CFG14_MANCH	(1 << 2)
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| #define CFG14_TNCRS	(1 << 3)
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| #define CFG14_NOCRC	(1 << 4)
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| #define CFG14_CRC16	(1 << 5)
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| #define CFG14_BTSTF	(1 << 6)
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| #define CFG14_FLGPAD	(1 << 7)
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| 	unsigned char  cfg_byte15;
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| #define CFG15_CSTF(x)	(x)
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| #define CFG15_ICSS	(1 << 3)
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| #define CFG15_CDTF(x)	(x << 4)
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| #define CFG15_ICDS	(1 << 7)
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| 	unsigned short cfg_minfrmlen;
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| } cfg_t;
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| 
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| typedef struct { /* scb */
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| 	unsigned short scb_status;	/* status of 82586			*/
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| #define SCB_STRXMASK		(7 << 4)	/* Receive unit status		*/
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| #define SCB_STRXIDLE		(0 << 4)	/* Idle				*/
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| #define SCB_STRXSUSP		(1 << 4)	/* Suspended			*/
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| #define SCB_STRXNRES		(2 << 4)	/* No resources			*/
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| #define SCB_STRXRDY		(4 << 4)	/* Ready			*/
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| #define SCB_STCUMASK		(7 << 8)	/* Command unit status		*/
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| #define SCB_STCUIDLE		(0 << 8)	/* Idle				*/
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| #define SCB_STCUSUSP		(1 << 8)	/* Suspended			*/
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| #define SCB_STCUACTV		(2 << 8)	/* Active			*/
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| #define SCB_STRNR		(1 << 12)	/* Receive unit not ready	*/
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| #define SCB_STCNA		(1 << 13)	/* Command unit not ready	*/
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| #define SCB_STFR		(1 << 14)	/* Frame received		*/
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| #define SCB_STCX		(1 << 15)	/* Command completed		*/
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| 	unsigned short scb_command;	/* Next command				*/
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| #define SCB_CMDRXSTART		(1 << 4)	/* Start (at rfa_offset)	*/
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| #define SCB_CMDRXRESUME		(2 << 4)	/* Resume reception		*/
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| #define SCB_CMDRXSUSPEND	(3 << 4)	/* Suspend reception		*/
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| #define SCB_CMDRXABORT		(4 << 4)	/* Abort reception		*/
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| #define SCB_CMDCUCSTART		(1 << 8)	/* Start (at cbl_offset)	*/
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| #define SCB_CMDCUCRESUME	(2 << 8)	/* Resume execution		*/
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| #define SCB_CMDCUCSUSPEND	(3 << 8)	/* Suspend execution		*/
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| #define SCB_CMDCUCABORT		(4 << 8)	/* Abort execution		*/
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| #define SCB_CMDACKRNR		(1 << 12)	/* Ack RU not ready		*/
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| #define SCB_CMDACKCNA		(1 << 13)	/* Ack CU not ready		*/
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| #define SCB_CMDACKFR		(1 << 14)	/* Ack Frame received		*/
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| #define SCB_CMDACKCX		(1 << 15)	/* Ack Command complete		*/
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| 	unsigned short scb_cbl_offset;	/* Offset of first command unit		*/
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| 	unsigned short scb_rfa_offset;	/* Offset of first receive frame area	*/
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| 	unsigned short scb_crc_errors;	/* Properly aligned frame with CRC error*/
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| 	unsigned short scb_aln_errors;	/* Misaligned frames			*/
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| 	unsigned short scb_rsc_errors;	/* Frames lost due to no space		*/
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| 	unsigned short scb_ovn_errors;	/* Frames lost due to slow bus		*/
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| } scb_t;
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| 
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| typedef struct { /* iscp */
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| 	unsigned short iscp_busy;	/* set by CPU before CA			*/
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| 	unsigned short iscp_offset;	/* offset of SCB			*/
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| 	unsigned short iscp_basel;	/* base of SCB				*/
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| 	unsigned short iscp_baseh;
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| } iscp_t;
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| 
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|     /* this address must be 0xfff6 */
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| typedef struct { /* scp */
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| 	unsigned short scp_sysbus;	/* bus size */
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| #define SCP_SY_16BBUS	0x00
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| #define SCP_SY_8BBUS	0x01
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| 	unsigned short scp_junk[2];	/* junk */
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| 	unsigned short scp_iscpl;	/* lower 16 bits of iscp */
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| 	unsigned short scp_iscph;	/* upper 16 bits of iscp */
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| } scp_t;
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| 
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| /* commands */
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| #define CMD_NOP			0
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| #define CMD_SETADDRESS		1
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| #define CMD_CONFIG		2
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| #define CMD_SETMULTICAST	3
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| #define CMD_TX			4
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| #define CMD_TDR			5
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| #define CMD_DUMP		6
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| #define CMD_DIAGNOSE		7
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| 
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| #define CMD_MASK		7
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| 
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| #define CMD_INTR		(1 << 13)
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| #define CMD_SUSP		(1 << 14)
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| #define CMD_EOL			(1 << 15)
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| 
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| #define STAT_COLLISIONS		(15)
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| #define STAT_COLLEXCESSIVE	(1 << 5)
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| #define STAT_COLLAFTERTX	(1 << 6)
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| #define STAT_TXDEFERRED		(1 << 7)
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| #define STAT_TXSLOWDMA		(1 << 8)
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| #define STAT_TXLOSTCTS		(1 << 9)
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| #define STAT_NOCARRIER		(1 << 10)
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| #define STAT_FAIL		(1 << 11)
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| #define STAT_ABORTED		(1 << 12)
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| #define STAT_OK			(1 << 13)
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| #define STAT_BUSY		(1 << 14)
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| #define STAT_COMPLETE		(1 << 15)
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| #endif
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| #endif
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| 
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| /*
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|  * Ether1 card definitions:
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|  *
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|  * FAST accesses:
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|  *	+0	Page register
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|  * 			16 pages
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|  *	+4	Control
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|  *			'1' = reset
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|  *			'2' = loopback
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|  *			'4' = CA
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|  *			'8' = int ack
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|  *
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|  * RAM at address + 0x2000
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|  * Pod. Prod id = 3
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|  * Words after ID block [base + 8 words]
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|  *	+0 pcb issue (0x0c and 0xf3 invalid)
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|  *	+1 - +6 eth hw address
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|  */
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