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				https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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	 5bf3df3f00
			
		
	
	
		5bf3df3f00
		
	
	
	
	
		
			
			The remaining registers are separated into: - <mach/regs-ost.h> - <mach/regs-rtc.h> - <mach/regs-intc.h> and then we can remove pxa-regs.h completely. Instead of #include this file, let's: 1. include the specific <mach/regs-*.h> with care (if that's absolutely necessary) 2. define the registers in the driver, make cleanly defined API to expose the register access to external with sufficient reason Signed-off-by: Eric Miao <eric.miao@marvell.com>
		
			
				
	
	
		
			441 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			441 lines
		
	
	
		
			10 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
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|  *
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|  * Copyright (c) 2000 Nils Faerber
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|  *
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|  * Based on rtc.c by Paul Gortmaker
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|  *
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|  * Original Driver by Nils Faerber <nils@kernelconcepts.de>
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|  *
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|  * Modifications from:
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|  *   CIH <cih@coventive.com>
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|  *   Nicolas Pitre <nico@cam.org>
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|  *   Andrew Christian <andrew.christian@hp.com>
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|  *
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|  * Converted to the RTC subsystem and Driver Model
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|  *   by Richard Purdie <rpurdie@rpsys.net>
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License
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|  * as published by the Free Software Foundation; either version
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|  * 2 of the License, or (at your option) any later version.
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|  */
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| 
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| #include <linux/platform_device.h>
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| #include <linux/module.h>
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| #include <linux/rtc.h>
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| #include <linux/init.h>
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| #include <linux/fs.h>
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| #include <linux/interrupt.h>
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| #include <linux/string.h>
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| #include <linux/pm.h>
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| #include <linux/bitops.h>
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| 
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| #include <mach/hardware.h>
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| #include <asm/irq.h>
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| 
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| #ifdef CONFIG_ARCH_PXA
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| #include <mach/regs-rtc.h>
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| #include <mach/regs-ost.h>
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| #endif
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| 
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| #define RTC_DEF_DIVIDER		32768 - 1
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| #define RTC_DEF_TRIM		0
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| 
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| static unsigned long rtc_freq = 1024;
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| static unsigned long timer_freq;
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| static struct rtc_time rtc_alarm;
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| static DEFINE_SPINLOCK(sa1100_rtc_lock);
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| 
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| static inline int rtc_periodic_alarm(struct rtc_time *tm)
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| {
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| 	return  (tm->tm_year == -1) ||
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| 		((unsigned)tm->tm_mon >= 12) ||
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| 		((unsigned)(tm->tm_mday - 1) >= 31) ||
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| 		((unsigned)tm->tm_hour > 23) ||
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| 		((unsigned)tm->tm_min > 59) ||
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| 		((unsigned)tm->tm_sec > 59);
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| }
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| 
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| /*
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|  * Calculate the next alarm time given the requested alarm time mask
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|  * and the current time.
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|  */
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| static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm)
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| {
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| 	unsigned long next_time;
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| 	unsigned long now_time;
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| 
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| 	next->tm_year = now->tm_year;
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| 	next->tm_mon = now->tm_mon;
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| 	next->tm_mday = now->tm_mday;
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| 	next->tm_hour = alrm->tm_hour;
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| 	next->tm_min = alrm->tm_min;
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| 	next->tm_sec = alrm->tm_sec;
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| 
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| 	rtc_tm_to_time(now, &now_time);
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| 	rtc_tm_to_time(next, &next_time);
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| 
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| 	if (next_time < now_time) {
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| 		/* Advance one day */
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| 		next_time += 60 * 60 * 24;
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| 		rtc_time_to_tm(next_time, next);
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| 	}
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| }
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| 
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| static int rtc_update_alarm(struct rtc_time *alrm)
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| {
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| 	struct rtc_time alarm_tm, now_tm;
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| 	unsigned long now, time;
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| 	int ret;
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| 
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| 	do {
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| 		now = RCNR;
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| 		rtc_time_to_tm(now, &now_tm);
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| 		rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
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| 		ret = rtc_tm_to_time(&alarm_tm, &time);
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| 		if (ret != 0)
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| 			break;
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| 
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| 		RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
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| 		RTAR = time;
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| 	} while (now != RCNR);
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| 
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| 	return ret;
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| }
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| 
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| static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
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| {
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| 	struct platform_device *pdev = to_platform_device(dev_id);
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| 	struct rtc_device *rtc = platform_get_drvdata(pdev);
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| 	unsigned int rtsr;
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| 	unsigned long events = 0;
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| 
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| 	spin_lock(&sa1100_rtc_lock);
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| 
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| 	rtsr = RTSR;
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| 	/* clear interrupt sources */
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| 	RTSR = 0;
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| 	RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
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| 
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| 	/* clear alarm interrupt if it has occurred */
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| 	if (rtsr & RTSR_AL)
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| 		rtsr &= ~RTSR_ALE;
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| 	RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
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| 
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| 	/* update irq data & counter */
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| 	if (rtsr & RTSR_AL)
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| 		events |= RTC_AF | RTC_IRQF;
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| 	if (rtsr & RTSR_HZ)
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| 		events |= RTC_UF | RTC_IRQF;
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| 
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| 	rtc_update_irq(rtc, 1, events);
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| 
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| 	if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
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| 		rtc_update_alarm(&rtc_alarm);
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| 
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| 	spin_unlock(&sa1100_rtc_lock);
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| 
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| 	return IRQ_HANDLED;
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| }
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| 
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| static int rtc_timer1_count;
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| 
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| static irqreturn_t timer1_interrupt(int irq, void *dev_id)
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| {
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| 	struct platform_device *pdev = to_platform_device(dev_id);
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| 	struct rtc_device *rtc = platform_get_drvdata(pdev);
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| 
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| 	/*
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| 	 * If we match for the first time, rtc_timer1_count will be 1.
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| 	 * Otherwise, we wrapped around (very unlikely but
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| 	 * still possible) so compute the amount of missed periods.
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| 	 * The match reg is updated only when the data is actually retrieved
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| 	 * to avoid unnecessary interrupts.
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| 	 */
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| 	OSSR = OSSR_M1;	/* clear match on timer1 */
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| 
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| 	rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF);
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| 
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| 	if (rtc_timer1_count == 1)
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| 		rtc_timer1_count = (rtc_freq * ((1 << 30) / (timer_freq >> 2)));
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| 
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| 	return IRQ_HANDLED;
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| }
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| 
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| static int sa1100_rtc_read_callback(struct device *dev, int data)
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| {
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| 	if (data & RTC_PF) {
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| 		/* interpolate missed periods and set match for the next */
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| 		unsigned long period = timer_freq / rtc_freq;
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| 		unsigned long oscr = OSCR;
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| 		unsigned long osmr1 = OSMR1;
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| 		unsigned long missed = (oscr - osmr1)/period;
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| 		data += missed << 8;
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| 		OSSR = OSSR_M1;	/* clear match on timer 1 */
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| 		OSMR1 = osmr1 + (missed + 1)*period;
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| 		/* Ensure we didn't miss another match in the mean time.
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| 		 * Here we compare (match - OSCR) 8 instead of 0 --
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| 		 * see comment in pxa_timer_interrupt() for explanation.
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| 		 */
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| 		while( (signed long)((osmr1 = OSMR1) - OSCR) <= 8 ) {
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| 			data += 0x100;
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| 			OSSR = OSSR_M1;	/* clear match on timer 1 */
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| 			OSMR1 = osmr1 + period;
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| 		}
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| 	}
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| 	return data;
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| }
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| 
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| static int sa1100_rtc_open(struct device *dev)
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| {
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| 	int ret;
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| 
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| 	ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
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| 				"rtc 1Hz", dev);
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| 	if (ret) {
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| 		dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
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| 		goto fail_ui;
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| 	}
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| 	ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
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| 				"rtc Alrm", dev);
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| 	if (ret) {
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| 		dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
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| 		goto fail_ai;
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| 	}
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| 	ret = request_irq(IRQ_OST1, timer1_interrupt, IRQF_DISABLED,
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| 				"rtc timer", dev);
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| 	if (ret) {
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| 		dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1);
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| 		goto fail_pi;
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| 	}
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| 	return 0;
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| 
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|  fail_pi:
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| 	free_irq(IRQ_RTCAlrm, dev);
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|  fail_ai:
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| 	free_irq(IRQ_RTC1Hz, dev);
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|  fail_ui:
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| 	return ret;
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| }
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| 
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| static void sa1100_rtc_release(struct device *dev)
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| {
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| 	spin_lock_irq(&sa1100_rtc_lock);
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| 	RTSR = 0;
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| 	OIER &= ~OIER_E1;
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| 	OSSR = OSSR_M1;
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| 	spin_unlock_irq(&sa1100_rtc_lock);
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| 
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| 	free_irq(IRQ_OST1, dev);
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| 	free_irq(IRQ_RTCAlrm, dev);
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| 	free_irq(IRQ_RTC1Hz, dev);
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| }
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| 
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| 
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| static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd,
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| 		unsigned long arg)
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| {
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| 	switch(cmd) {
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| 	case RTC_AIE_OFF:
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| 		spin_lock_irq(&sa1100_rtc_lock);
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| 		RTSR &= ~RTSR_ALE;
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| 		spin_unlock_irq(&sa1100_rtc_lock);
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| 		return 0;
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| 	case RTC_AIE_ON:
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| 		spin_lock_irq(&sa1100_rtc_lock);
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| 		RTSR |= RTSR_ALE;
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| 		spin_unlock_irq(&sa1100_rtc_lock);
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| 		return 0;
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| 	case RTC_UIE_OFF:
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| 		spin_lock_irq(&sa1100_rtc_lock);
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| 		RTSR &= ~RTSR_HZE;
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| 		spin_unlock_irq(&sa1100_rtc_lock);
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| 		return 0;
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| 	case RTC_UIE_ON:
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| 		spin_lock_irq(&sa1100_rtc_lock);
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| 		RTSR |= RTSR_HZE;
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| 		spin_unlock_irq(&sa1100_rtc_lock);
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| 		return 0;
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| 	case RTC_PIE_OFF:
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| 		spin_lock_irq(&sa1100_rtc_lock);
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| 		OIER &= ~OIER_E1;
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| 		spin_unlock_irq(&sa1100_rtc_lock);
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| 		return 0;
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| 	case RTC_PIE_ON:
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| 		spin_lock_irq(&sa1100_rtc_lock);
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| 		OSMR1 = timer_freq / rtc_freq + OSCR;
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| 		OIER |= OIER_E1;
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| 		rtc_timer1_count = 1;
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| 		spin_unlock_irq(&sa1100_rtc_lock);
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| 		return 0;
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| 	case RTC_IRQP_READ:
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| 		return put_user(rtc_freq, (unsigned long *)arg);
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| 	case RTC_IRQP_SET:
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| 		if (arg < 1 || arg > timer_freq)
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| 			return -EINVAL;
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| 		rtc_freq = arg;
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| 		return 0;
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| 	}
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| 	return -ENOIOCTLCMD;
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| }
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| 
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| static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
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| {
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| 	rtc_time_to_tm(RCNR, tm);
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| 	return 0;
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| }
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| 
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| static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
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| {
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| 	unsigned long time;
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| 	int ret;
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| 
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| 	ret = rtc_tm_to_time(tm, &time);
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| 	if (ret == 0)
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| 		RCNR = time;
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| 	return ret;
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| }
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| 
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| static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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| {
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| 	u32	rtsr;
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| 
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| 	memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
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| 	rtsr = RTSR;
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| 	alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
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| 	alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
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| 	return 0;
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| }
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| 
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| static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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| {
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| 	int ret;
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| 
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| 	spin_lock_irq(&sa1100_rtc_lock);
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| 	ret = rtc_update_alarm(&alrm->time);
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| 	if (ret == 0) {
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| 		if (alrm->enabled)
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| 			RTSR |= RTSR_ALE;
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| 		else
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| 			RTSR &= ~RTSR_ALE;
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| 	}
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| 	spin_unlock_irq(&sa1100_rtc_lock);
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| 
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| 	return ret;
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| }
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| 
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| static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
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| {
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| 	seq_printf(seq, "trim/divider\t: 0x%08x\n", (u32) RTTR);
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| 	seq_printf(seq, "update_IRQ\t: %s\n",
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| 			(RTSR & RTSR_HZE) ? "yes" : "no");
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| 	seq_printf(seq, "periodic_IRQ\t: %s\n",
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| 			(OIER & OIER_E1) ? "yes" : "no");
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| 	seq_printf(seq, "periodic_freq\t: %ld\n", rtc_freq);
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| 
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| 	return 0;
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| }
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| 
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| static const struct rtc_class_ops sa1100_rtc_ops = {
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| 	.open = sa1100_rtc_open,
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| 	.read_callback = sa1100_rtc_read_callback,
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| 	.release = sa1100_rtc_release,
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| 	.ioctl = sa1100_rtc_ioctl,
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| 	.read_time = sa1100_rtc_read_time,
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| 	.set_time = sa1100_rtc_set_time,
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| 	.read_alarm = sa1100_rtc_read_alarm,
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| 	.set_alarm = sa1100_rtc_set_alarm,
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| 	.proc = sa1100_rtc_proc,
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| };
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| 
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| static int sa1100_rtc_probe(struct platform_device *pdev)
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| {
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| 	struct rtc_device *rtc;
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| 
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| 	timer_freq = get_clock_tick_rate();
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| 
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| 	/*
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| 	 * According to the manual we should be able to let RTTR be zero
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| 	 * and then a default diviser for a 32.768KHz clock is used.
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| 	 * Apparently this doesn't work, at least for my SA1110 rev 5.
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| 	 * If the clock divider is uninitialized then reset it to the
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| 	 * default value to get the 1Hz clock.
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| 	 */
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| 	if (RTTR == 0) {
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| 		RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
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| 		dev_warn(&pdev->dev, "warning: initializing default clock divider/trim value\n");
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| 		/* The current RTC value probably doesn't make sense either */
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| 		RCNR = 0;
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| 	}
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| 
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| 	device_init_wakeup(&pdev->dev, 1);
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| 
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| 	rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
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| 				THIS_MODULE);
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| 
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| 	if (IS_ERR(rtc))
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| 		return PTR_ERR(rtc);
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| 
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| 	platform_set_drvdata(pdev, rtc);
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| 
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| 	return 0;
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| }
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| 
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| static int sa1100_rtc_remove(struct platform_device *pdev)
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| {
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| 	struct rtc_device *rtc = platform_get_drvdata(pdev);
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| 
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|  	if (rtc)
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| 		rtc_device_unregister(rtc);
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| 
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| 	return 0;
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| }
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| 
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| #ifdef CONFIG_PM
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| static int sa1100_rtc_suspend(struct platform_device *pdev, pm_message_t state)
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| {
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| 	if (device_may_wakeup(&pdev->dev))
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| 		enable_irq_wake(IRQ_RTCAlrm);
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| 	return 0;
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| }
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| 
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| static int sa1100_rtc_resume(struct platform_device *pdev)
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| {
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| 	if (device_may_wakeup(&pdev->dev))
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| 		disable_irq_wake(IRQ_RTCAlrm);
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| 	return 0;
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| }
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| #else
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| #define sa1100_rtc_suspend	NULL
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| #define sa1100_rtc_resume	NULL
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| #endif
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| 
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| static struct platform_driver sa1100_rtc_driver = {
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| 	.probe		= sa1100_rtc_probe,
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| 	.remove		= sa1100_rtc_remove,
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| 	.suspend	= sa1100_rtc_suspend,
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| 	.resume		= sa1100_rtc_resume,
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| 	.driver		= {
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| 		.name		= "sa1100-rtc",
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| 	},
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| };
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| 
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| static int __init sa1100_rtc_init(void)
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| {
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| 	return platform_driver_register(&sa1100_rtc_driver);
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| }
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| 
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| static void __exit sa1100_rtc_exit(void)
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| {
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| 	platform_driver_unregister(&sa1100_rtc_driver);
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| }
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| 
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| module_init(sa1100_rtc_init);
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| module_exit(sa1100_rtc_exit);
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| 
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| MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
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| MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
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| MODULE_LICENSE("GPL");
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| MODULE_ALIAS("platform:sa1100-rtc");
 |