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			This patch allows UCB1400 to get IRQ GPIO from platform data. In case platform_data are not supplied or the IRQ supplied in the platform_data is negative, fall back to the old IRQ detection algorithm. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
		
			
				
	
	
		
			174 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			174 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Register definitions and functions for:
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|  *  Philips UCB1400 driver
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|  *
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|  * Based on ucb1400_ts:
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|  *  Author:	Nicolas Pitre
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|  *  Created:	September 25, 2006
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|  *  Copyright:	MontaVista Software, Inc.
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|  *
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|  * Spliting done by: Marek Vasut <marek.vasut@gmail.com>
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|  * If something doesnt work and it worked before spliting, e-mail me,
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|  * dont bother Nicolas please ;-)
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  *
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|  * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
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|  * covering the UCB1100, UCB1200 and UCB1300..  Support for the UCB1400 has
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|  * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
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|  */
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| 
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| #ifndef _LINUX__UCB1400_H
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| #define _LINUX__UCB1400_H
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| 
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| #include <sound/ac97_codec.h>
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| #include <linux/mutex.h>
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| #include <linux/platform_device.h>
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| #include <linux/gpio.h>
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| 
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| /*
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|  * UCB1400 AC-link registers
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|  */
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| 
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| #define UCB_IO_DATA		0x5a
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| #define UCB_IO_DIR		0x5c
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| #define UCB_IE_RIS		0x5e
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| #define UCB_IE_FAL		0x60
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| #define UCB_IE_STATUS		0x62
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| #define UCB_IE_CLEAR		0x62
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| #define UCB_IE_ADC		(1 << 11)
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| #define UCB_IE_TSPX		(1 << 12)
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| 
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| #define UCB_TS_CR		0x64
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| #define UCB_TS_CR_TSMX_POW	(1 << 0)
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| #define UCB_TS_CR_TSPX_POW	(1 << 1)
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| #define UCB_TS_CR_TSMY_POW	(1 << 2)
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| #define UCB_TS_CR_TSPY_POW	(1 << 3)
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| #define UCB_TS_CR_TSMX_GND	(1 << 4)
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| #define UCB_TS_CR_TSPX_GND	(1 << 5)
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| #define UCB_TS_CR_TSMY_GND	(1 << 6)
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| #define UCB_TS_CR_TSPY_GND	(1 << 7)
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| #define UCB_TS_CR_MODE_INT	(0 << 8)
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| #define UCB_TS_CR_MODE_PRES	(1 << 8)
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| #define UCB_TS_CR_MODE_POS	(2 << 8)
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| #define UCB_TS_CR_BIAS_ENA	(1 << 11)
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| #define UCB_TS_CR_TSPX_LOW	(1 << 12)
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| #define UCB_TS_CR_TSMX_LOW	(1 << 13)
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| 
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| #define UCB_ADC_CR		0x66
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| #define UCB_ADC_SYNC_ENA	(1 << 0)
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| #define UCB_ADC_VREFBYP_CON	(1 << 1)
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| #define UCB_ADC_INP_TSPX	(0 << 2)
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| #define UCB_ADC_INP_TSMX	(1 << 2)
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| #define UCB_ADC_INP_TSPY	(2 << 2)
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| #define UCB_ADC_INP_TSMY	(3 << 2)
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| #define UCB_ADC_INP_AD0		(4 << 2)
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| #define UCB_ADC_INP_AD1		(5 << 2)
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| #define UCB_ADC_INP_AD2		(6 << 2)
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| #define UCB_ADC_INP_AD3		(7 << 2)
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| #define UCB_ADC_EXT_REF		(1 << 5)
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| #define UCB_ADC_START		(1 << 7)
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| #define UCB_ADC_ENA		(1 << 15)
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| 
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| #define UCB_ADC_DATA		0x68
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| #define UCB_ADC_DAT_VALID	(1 << 15)
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| 
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| #define UCB_FCSR		0x6c
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| #define UCB_FCSR_AVE		(1 << 12)
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| 
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| #define UCB_ADC_DAT_MASK	0x3ff
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| 
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| #define UCB_ID			0x7e
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| #define UCB_ID_1400             0x4304
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| 
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| struct ucb1400_gpio_data {
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| 	int gpio_offset;
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| 	int (*gpio_setup)(struct device *dev, int ngpio);
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| 	int (*gpio_teardown)(struct device *dev, int ngpio);
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| };
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| 
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| struct ucb1400_gpio {
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| 	struct gpio_chip	gc;
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| 	struct snd_ac97		*ac97;
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| };
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| 
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| struct ucb1400_ts {
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| 	struct input_dev	*ts_idev;
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| 	struct task_struct	*ts_task;
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| 	int			id;
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| 	wait_queue_head_t	ts_wait;
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| 	unsigned int		ts_restart:1;
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| 	int			irq;
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| 	unsigned int		irq_pending;	/* not bit field shared */
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| 	struct snd_ac97		*ac97;
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| };
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| 
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| struct ucb1400 {
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| 	struct platform_device	*ucb1400_ts;
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| 	struct platform_device	*ucb1400_gpio;
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| };
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| 
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| struct ucb1400_pdata {
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| 	int	irq;
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| };
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| 
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| static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg)
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| {
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| 	return ac97->bus->ops->read(ac97, reg);
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| }
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| 
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| static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val)
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| {
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| 	ac97->bus->ops->write(ac97, reg, val);
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| }
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| 
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| static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio)
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| {
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| 	return ucb1400_reg_read(ac97, UCB_IO_DATA) & (1 << gpio);
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| }
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| 
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| static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio,
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| 						u16 val)
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| {
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| 	ucb1400_reg_write(ac97, UCB_IO_DATA, val ?
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| 			ucb1400_reg_read(ac97, UCB_IO_DATA) | (1 << gpio) :
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| 			ucb1400_reg_read(ac97, UCB_IO_DATA) & ~(1 << gpio));
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| }
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| 
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| static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio)
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| {
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| 	return ucb1400_reg_read(ac97, UCB_IO_DIR) & (1 << gpio);
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| }
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| 
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| static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio,
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| 						u16 dir)
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| {
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| 	ucb1400_reg_write(ac97, UCB_IO_DIR, dir ?
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| 			ucb1400_reg_read(ac97, UCB_IO_DIR) | (1 << gpio) :
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| 			ucb1400_reg_read(ac97, UCB_IO_DIR) & ~(1 << gpio));
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| }
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| 
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| static inline void ucb1400_adc_enable(struct snd_ac97 *ac97)
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| {
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| 	ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA);
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| }
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| 
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| static inline void ucb1400_adc_disable(struct snd_ac97 *ac97)
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| {
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| 	ucb1400_reg_write(ac97, UCB_ADC_CR, 0);
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| }
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| 
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| 
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| unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel,
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| 			      int adcsync);
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| 
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| #ifdef CONFIG_GPIO_UCB1400
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| void __init ucb1400_gpio_set_data(struct ucb1400_gpio_data *data);
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| #else
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| static inline void ucb1400_gpio_set_data(struct ucb1400_gpio_data *data) {}
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| #endif
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| 
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| #endif
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