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	 5886269962
			
		
	
	
		5886269962
		
	
	
	
	
		
			
			Many files include the filename at the beginning, serveral used a wrong one. Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
		
			
				
	
	
		
			82 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			82 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * arch/sh/kernel/cpu/sh4a/clock-sh73180.c
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|  *
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|  * SH73180 support for the clock framework
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|  *
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|  *  Copyright (C) 2005  Paul Mundt
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|  *
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|  * FRQCR parsing hacked out of arch/sh/kernel/time.c
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|  *
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|  *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
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|  *  Copyright (C) 2000  Philipp Rumpf <prumpf@tux.org>
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|  *  Copyright (C) 2002, 2003, 2004  Paul Mundt
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|  *  Copyright (C) 2002  M. R. Brown  <mrbrown@linux-sh.org>
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|  *
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  */
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| #include <linux/init.h>
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| #include <linux/kernel.h>
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| #include <asm/clock.h>
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| #include <asm/freq.h>
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| #include <asm/io.h>
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| 
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| /*
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|  * SH73180 uses a common set of divisors, so this is quite simple..
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|  */
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| static int divisors[] = { 1, 2, 3, 4, 6, 8, 12, 16 };
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| 
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| static void master_clk_init(struct clk *clk)
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| {
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| 	clk->rate *= divisors[ctrl_inl(FRQCR) & 0x0007];
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| }
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| 
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| static struct clk_ops sh73180_master_clk_ops = {
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| 	.init		= master_clk_init,
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| };
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| 
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| static void module_clk_recalc(struct clk *clk)
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| {
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| 	int idx = (ctrl_inl(FRQCR) & 0x0007);
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| 	clk->rate = clk->parent->rate / divisors[idx];
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| }
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| 
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| static struct clk_ops sh73180_module_clk_ops = {
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| 	.recalc		= module_clk_recalc,
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| };
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| 
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| static void bus_clk_recalc(struct clk *clk)
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| {
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| 	int idx = (ctrl_inl(FRQCR) >> 12) & 0x0007;
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| 	clk->rate = clk->parent->rate / divisors[idx];
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| }
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| 
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| static struct clk_ops sh73180_bus_clk_ops = {
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| 	.recalc		= bus_clk_recalc,
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| };
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| 
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| static void cpu_clk_recalc(struct clk *clk)
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| {
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| 	int idx = (ctrl_inl(FRQCR) >> 20) & 0x0007;
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| 	clk->rate = clk->parent->rate / divisors[idx];
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| }
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| 
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| static struct clk_ops sh73180_cpu_clk_ops = {
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| 	.recalc		= cpu_clk_recalc,
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| };
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| 
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| static struct clk_ops *sh73180_clk_ops[] = {
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| 	&sh73180_master_clk_ops,
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| 	&sh73180_module_clk_ops,
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| 	&sh73180_bus_clk_ops,
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| 	&sh73180_cpu_clk_ops,
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| };
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| 
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| void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
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| {
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| 	if (idx < ARRAY_SIZE(sh73180_clk_ops))
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| 		*ops = sh73180_clk_ops[idx];
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| }
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| 
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