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		684f4a4c4a
		
	
	
	
	
		
			
			in drivers/net/eexpress.c:558, function unstick_cu()
while (!SCB_complete(rsst=scb_status(dev))) {
	...
	if (...)
		printk(KERN_WARNING "%s: Reset timed out status %04x, retrying...\n",
                                                       dev->name,rsst);
}
but this will become 
while (!((rsst = scb_status(dev) & 0x8000) != 0) ...
because of the macro:
#define SCB_complete(s) ((s&0x8000)!=0)
so rsst can only become either 0x8000 or 0, but in the latter case the
loop ends, I think the wrong timed out status is printed. This also
cleans up similar macros.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
		
	
			
		
			
				
	
	
		
			180 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			180 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * eexpress.h: Intel EtherExpress16 defines
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|  */
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| 
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| /*
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|  * EtherExpress card register addresses
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|  * as offsets from the base IO region (dev->base_addr)
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|  */
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| 
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| #define DATAPORT      0x0000
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| #define WRITE_PTR     0x0002
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| #define READ_PTR      0x0004
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| #define SIGNAL_CA     0x0006
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| #define SET_IRQ       0x0007
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| #define SM_PTR        0x0008
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| #define	MEM_Dec	      0x000a
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| #define MEM_Ctrl      0x000b
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| #define MEM_Page_Ctrl 0x000c
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| #define Config        0x000d
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| #define EEPROM_Ctrl   0x000e
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| #define ID_PORT       0x000f
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| #define	MEM_ECtrl     0x000f
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| 
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| /*
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|  * card register defines
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|  */
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| 
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| /* SET_IRQ */
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| #define SIRQ_en       0x08
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| #define SIRQ_dis      0x00
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| 
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| /* EEPROM_Ctrl */
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| #define EC_Clk        0x01
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| #define EC_CS         0x02
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| #define EC_Wr         0x04
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| #define EC_Rd         0x08
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| #define ASIC_RST      0x40
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| #define i586_RST      0x80
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| 
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| #define eeprom_delay() { udelay(40); }
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| 
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| /*
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|  * i82586 Memory Configuration
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|  */
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| 
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| /* (System Configuration Pointer) System start up block, read after 586_RST */
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| #define SCP_START 0xfff6
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| 
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| /* Intermediate System Configuration Pointer */
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| #define ISCP_START 0x0000
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| 
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| /* System Command Block */
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| #define SCB_START 0x0008
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| 
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| /* Start of buffer region.  Everything before this is used for control
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|  * structures and the CU configuration program.  The memory layout is
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|  * determined in eexp_hw_probe(), once we know how much memory is
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|  * available on the card.
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|  */
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| 
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| #define TX_BUF_START 0x0100
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| 
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| #define TX_BUF_SIZE ((24+ETH_FRAME_LEN+31)&~0x1f)
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| #define RX_BUF_SIZE ((32+ETH_FRAME_LEN+31)&~0x1f)
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| 
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| /*
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|  * SCB defines
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|  */
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| 
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| /* these functions take the SCB status word and test the relevant status bit */
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| #define SCB_complete(s) (((s) & 0x8000) != 0)
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| #define SCB_rxdframe(s) (((s) & 0x4000) != 0)
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| #define SCB_CUdead(s)   (((s) & 0x2000) != 0)
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| #define SCB_RUdead(s)   (((s) & 0x1000) != 0)
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| #define SCB_ack(s)      ((s) & 0xf000)
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| 
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| /* Command unit status: 0=idle, 1=suspended, 2=active */
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| #define SCB_CUstat(s)   (((s)&0x0300)>>8)
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| 
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| /* Receive unit status: 0=idle, 1=suspended, 2=out of resources, 4=ready */
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| #define SCB_RUstat(s)   (((s)&0x0070)>>4)
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| 
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| /* SCB commands */
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| #define SCB_CUnop       0x0000
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| #define SCB_CUstart     0x0100
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| #define SCB_CUresume    0x0200
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| #define SCB_CUsuspend   0x0300
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| #define SCB_CUabort     0x0400
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| #define SCB_resetchip   0x0080
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| 
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| #define SCB_RUnop       0x0000
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| #define SCB_RUstart     0x0010
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| #define SCB_RUresume    0x0020
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| #define SCB_RUsuspend   0x0030
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| #define SCB_RUabort     0x0040
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| 
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| /*
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|  * Command block defines
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|  */
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| 
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| #define Stat_Done(s)    (((s) & 0x8000) != 0)
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| #define Stat_Busy(s)    (((s) & 0x4000) != 0)
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| #define Stat_OK(s)      (((s) & 0x2000) != 0)
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| #define Stat_Abort(s)   (((s) & 0x1000) != 0)
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| #define Stat_STFail     (((s) & 0x0800) != 0)
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| #define Stat_TNoCar(s)  (((s) & 0x0400) != 0)
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| #define Stat_TNoCTS(s)  (((s) & 0x0200) != 0)
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| #define Stat_TNoDMA(s)  (((s) & 0x0100) != 0)
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| #define Stat_TDefer(s)  (((s) & 0x0080) != 0)
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| #define Stat_TColl(s)   (((s) & 0x0040) != 0)
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| #define Stat_TXColl(s)  (((s) & 0x0020) != 0)
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| #define Stat_NoColl(s)  ((s) & 0x000f)
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| 
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| /* Cmd_END will end AFTER the command if this is the first
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|  * command block after an SCB_CUstart, but BEFORE the command
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|  * for all subsequent commands. Best strategy is to place
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|  * Cmd_INT on the last command in the sequence, followed by a
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|  * dummy Cmd_Nop with Cmd_END after this.
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|  */
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| 
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| #define Cmd_END     0x8000
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| #define Cmd_SUS     0x4000
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| #define Cmd_INT     0x2000
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| 
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| #define Cmd_Nop     0x0000
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| #define Cmd_SetAddr 0x0001
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| #define Cmd_Config  0x0002
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| #define Cmd_MCast   0x0003
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| #define Cmd_Xmit    0x0004
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| #define Cmd_TDR     0x0005
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| #define Cmd_Dump    0x0006
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| #define Cmd_Diag    0x0007
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| 
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| 
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| /*
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|  * Frame Descriptor (Receive block) defines
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|  */
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| 
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| #define FD_Done(s)  (((s) & 0x8000) != 0)
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| #define FD_Busy(s)  (((s) & 0x4000) != 0)
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| #define FD_OK(s)    (((s) & 0x2000) != 0)
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| 
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| #define FD_CRC(s)   (((s) & 0x0800) != 0)
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| #define FD_Align(s) (((s) & 0x0400) != 0)
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| #define FD_Resrc(s) (((s) & 0x0200) != 0)
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| #define FD_DMA(s)   (((s) & 0x0100) != 0)
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| #define FD_Short(s) (((s) & 0x0080) != 0)
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| #define FD_NoEOF(s) (((s) & 0x0040) != 0)
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| 
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| struct rfd_header {
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| 	volatile unsigned long flags;
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| 	volatile unsigned short link;
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| 	volatile unsigned short rbd_offset;
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| 	volatile unsigned short dstaddr1;
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| 	volatile unsigned short dstaddr2;
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| 	volatile unsigned short dstaddr3;
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| 	volatile unsigned short srcaddr1;
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| 	volatile unsigned short srcaddr2;
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| 	volatile unsigned short srcaddr3;
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| 	volatile unsigned short length;
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| 
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| 	/* This is actually a Receive Buffer Descriptor.  The way we
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| 	 * arrange memory means that an RBD always follows the RFD that
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| 	 * points to it, so they might as well be in the same structure.
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| 	 */
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| 	volatile unsigned short actual_count;
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| 	volatile unsigned short next_rbd;
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| 	volatile unsigned short buf_addr1;
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| 	volatile unsigned short buf_addr2;
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| 	volatile unsigned short size;
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| };
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| 
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| /* Returned data from the Time Domain Reflectometer */
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| 
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| #define TDR_LINKOK       (1<<15)
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| #define TDR_XCVRPROBLEM  (1<<14)
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| #define TDR_OPEN         (1<<13)
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| #define TDR_SHORT        (1<<12)
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| #define TDR_TIME         0x7ff
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