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	 02a00cf672
			
		
	
	
		02a00cf672
		
	
	
	
	
		
			
			Implement Standby support. In this mode, we'll suspend all drivers,
put the SDRAM in self-refresh mode and switch off the HSB bus
("frozen" mode.)
Implement Suspend-to-mem support. In this mode, we suspend all
drivers, put the SDRAM into self-refresh mode and switch off all
internal clocks except the 32 kHz oscillator ("stop" mode.)
The lowest-level suspend code runs from a small portion of SRAM
allocated at startup time. This gets rid of a small potential race
with the SDRAM where we might try to enter self-refresh mode in the
middle of an icache burst. We also relocate all interrupt and
exception handlers to SRAM during the small window when we enter and
exit the low-power modes.
We don't need to do any special tricks to start and stop the PLL. The
main clock is automatically gated by hardware until the PLL is stable.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
		
	
			
		
			
				
	
	
		
			218 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			218 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2006, 2008 Atmel Corporation
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| 
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| #include <linux/clk.h>
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| #include <linux/err.h>
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| #include <linux/init.h>
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| #include <linux/interrupt.h>
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| #include <linux/irq.h>
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| #include <linux/platform_device.h>
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| #include <linux/sysdev.h>
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| 
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| #include <asm/io.h>
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| 
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| #include "intc.h"
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| 
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| struct intc {
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| 	void __iomem		*regs;
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| 	struct irq_chip		chip;
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| 	struct sys_device	sysdev;
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| #ifdef CONFIG_PM
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| 	unsigned long		suspend_ipr;
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| 	unsigned long		saved_ipr[64];
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| #endif
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| };
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| 
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| extern struct platform_device at32_intc0_device;
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| 
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| /*
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|  * TODO: We may be able to implement mask/unmask by setting IxM flags
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|  * in the status register.
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|  */
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| static void intc_mask_irq(unsigned int irq)
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| {
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| 
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| }
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| 
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| static void intc_unmask_irq(unsigned int irq)
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| {
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| 
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| }
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| 
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| static struct intc intc0 = {
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| 	.chip = {
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| 		.name		= "intc",
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| 		.mask		= intc_mask_irq,
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| 		.unmask		= intc_unmask_irq,
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| 	},
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| };
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| 
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| /*
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|  * All interrupts go via intc at some point.
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|  */
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| asmlinkage void do_IRQ(int level, struct pt_regs *regs)
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| {
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| 	struct irq_desc *desc;
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| 	struct pt_regs *old_regs;
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| 	unsigned int irq;
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| 	unsigned long status_reg;
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| 
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| 	local_irq_disable();
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| 
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| 	old_regs = set_irq_regs(regs);
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| 
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| 	irq_enter();
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| 
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| 	irq = intc_readl(&intc0, INTCAUSE0 - 4 * level);
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| 	desc = irq_desc + irq;
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| 	desc->handle_irq(irq, desc);
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| 
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| 	/*
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| 	 * Clear all interrupt level masks so that we may handle
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| 	 * interrupts during softirq processing.  If this is a nested
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| 	 * interrupt, interrupts must stay globally disabled until we
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| 	 * return.
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| 	 */
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| 	status_reg = sysreg_read(SR);
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| 	status_reg &= ~(SYSREG_BIT(I0M) | SYSREG_BIT(I1M)
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| 			| SYSREG_BIT(I2M) | SYSREG_BIT(I3M));
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| 	sysreg_write(SR, status_reg);
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| 
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| 	irq_exit();
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| 
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| 	set_irq_regs(old_regs);
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| }
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| 
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| void __init init_IRQ(void)
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| {
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| 	extern void _evba(void);
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| 	extern void irq_level0(void);
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| 	struct resource *regs;
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| 	struct clk *pclk;
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| 	unsigned int i;
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| 	u32 offset, readback;
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| 
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| 	regs = platform_get_resource(&at32_intc0_device, IORESOURCE_MEM, 0);
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| 	if (!regs) {
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| 		printk(KERN_EMERG "intc: no mmio resource defined\n");
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| 		goto fail;
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| 	}
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| 	pclk = clk_get(&at32_intc0_device.dev, "pclk");
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| 	if (IS_ERR(pclk)) {
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| 		printk(KERN_EMERG "intc: no clock defined\n");
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| 		goto fail;
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| 	}
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| 
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| 	clk_enable(pclk);
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| 
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| 	intc0.regs = ioremap(regs->start, regs->end - regs->start + 1);
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| 	if (!intc0.regs) {
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| 		printk(KERN_EMERG "intc: failed to map registers (0x%08lx)\n",
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| 		       (unsigned long)regs->start);
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| 		goto fail;
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| 	}
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| 
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| 	/*
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| 	 * Initialize all interrupts to level 0 (lowest priority). The
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| 	 * priority level may be changed by calling
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| 	 * irq_set_priority().
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| 	 *
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| 	 */
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| 	offset = (unsigned long)&irq_level0 - (unsigned long)&_evba;
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| 	for (i = 0; i < NR_INTERNAL_IRQS; i++) {
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| 		intc_writel(&intc0, INTPR0 + 4 * i, offset);
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| 		readback = intc_readl(&intc0, INTPR0 + 4 * i);
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| 		if (readback == offset)
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| 			set_irq_chip_and_handler(i, &intc0.chip,
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| 						 handle_simple_irq);
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| 	}
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| 
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| 	/* Unmask all interrupt levels */
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| 	sysreg_write(SR, (sysreg_read(SR)
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| 			  & ~(SR_I3M | SR_I2M | SR_I1M | SR_I0M)));
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| 
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| 	return;
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| 
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| fail:
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| 	panic("Interrupt controller initialization failed!\n");
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| }
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| 
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| #ifdef CONFIG_PM
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| void intc_set_suspend_handler(unsigned long offset)
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| {
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| 	intc0.suspend_ipr = offset;
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| }
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| 
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| static int intc_suspend(struct sys_device *sdev, pm_message_t state)
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| {
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| 	struct intc *intc = container_of(sdev, struct intc, sysdev);
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| 	int i;
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| 
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| 	if (unlikely(!irqs_disabled())) {
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| 		pr_err("intc_suspend: called with interrupts enabled\n");
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| 		return -EINVAL;
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| 	}
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| 
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| 	if (unlikely(!intc->suspend_ipr)) {
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| 		pr_err("intc_suspend: suspend_ipr not initialized\n");
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| 		return -EINVAL;
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| 	}
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| 
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| 	for (i = 0; i < 64; i++) {
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| 		intc->saved_ipr[i] = intc_readl(intc, INTPR0 + 4 * i);
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| 		intc_writel(intc, INTPR0 + 4 * i, intc->suspend_ipr);
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static int intc_resume(struct sys_device *sdev)
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| {
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| 	struct intc *intc = container_of(sdev, struct intc, sysdev);
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| 	int i;
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| 
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| 	WARN_ON(!irqs_disabled());
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| 
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| 	for (i = 0; i < 64; i++)
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| 		intc_writel(intc, INTPR0 + 4 * i, intc->saved_ipr[i]);
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| 
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| 	return 0;
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| }
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| #else
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| #define intc_suspend	NULL
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| #define intc_resume	NULL
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| #endif
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| 
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| static struct sysdev_class intc_class = {
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| 	.name		= "intc",
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| 	.suspend	= intc_suspend,
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| 	.resume		= intc_resume,
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| };
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| 
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| static int __init intc_init_sysdev(void)
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| {
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| 	int ret;
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| 
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| 	ret = sysdev_class_register(&intc_class);
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| 	if (ret)
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| 		return ret;
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| 
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| 	intc0.sysdev.id = 0;
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| 	intc0.sysdev.cls = &intc_class;
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| 	ret = sysdev_register(&intc0.sysdev);
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| 
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| 	return ret;
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| }
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| device_initcall(intc_init_sysdev);
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| 
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| unsigned long intc_get_pending(unsigned int group)
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| {
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| 	return intc_readl(&intc0, INTREQ0 + 4 * group);
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| }
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| EXPORT_SYMBOL_GPL(intc_get_pending);
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