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		c15a3837d2
		
	
	
	
	
		
			
			Currently a parport_driver can't get a handle on the device node for the underlying parport (PNPACPI, PCI, etc). That prevents correct placement of sysfs child nodes, which can affect things like power management. This patch adds a field to "struct parport" pointing to that device node, and updates non-legacy port drivers to initialize that device pointer. That field replaces the analagous PCI-only support in parport_pc. [akpm@linux-foundation.org: fix powerpc build] Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
		
			
				
	
	
		
			238 lines
		
	
	
		
			6.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			238 lines
		
	
	
		
			6.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef __LINUX_PARPORT_PC_H
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| #define __LINUX_PARPORT_PC_H
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| 
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| #include <asm/io.h>
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| 
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| /* --- register definitions ------------------------------- */
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| 
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| #define ECONTROL(p) ((p)->base_hi + 0x2)
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| #define CONFIGB(p)  ((p)->base_hi + 0x1)
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| #define CONFIGA(p)  ((p)->base_hi + 0x0)
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| #define FIFO(p)     ((p)->base_hi + 0x0)
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| #define EPPDATA(p)  ((p)->base    + 0x4)
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| #define EPPADDR(p)  ((p)->base    + 0x3)
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| #define CONTROL(p)  ((p)->base    + 0x2)
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| #define STATUS(p)   ((p)->base    + 0x1)
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| #define DATA(p)     ((p)->base    + 0x0)
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| 
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| struct parport_pc_private {
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| 	/* Contents of CTR. */
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| 	unsigned char ctr;
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| 
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| 	/* Bitmask of writable CTR bits. */
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| 	unsigned char ctr_writable;
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| 
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| 	/* Whether or not there's an ECR. */
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| 	int ecr;
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| 
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| 	/* Number of PWords that FIFO will hold. */
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| 	int fifo_depth;
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| 
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| 	/* Number of bytes per portword. */
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| 	int pword;
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| 
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| 	/* Not used yet. */
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| 	int readIntrThreshold;
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| 	int writeIntrThreshold;
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| 
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| 	/* buffer suitable for DMA, if DMA enabled */
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| 	char *dma_buf;
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| 	dma_addr_t dma_handle;
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| 	struct list_head list;
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| 	struct parport *port;
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| };
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| 
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| struct parport_pc_via_data
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| {
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| 	/* ISA PnP IRQ routing register 1 */
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| 	u8 via_pci_parport_irq_reg;
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| 	/* ISA PnP DMA request routing register */
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| 	u8 via_pci_parport_dma_reg;
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| 	/* Register and value to enable SuperIO configuration access */
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| 	u8 via_pci_superio_config_reg;
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| 	u8 via_pci_superio_config_data;
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| 	/* SuperIO function register number */
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| 	u8 viacfg_function;
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| 	/* parallel port control register number */
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| 	u8 viacfg_parport_control;
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| 	/* Parallel port base address register */
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| 	u8 viacfg_parport_base;
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| };
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| 
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| static __inline__ void parport_pc_write_data(struct parport *p, unsigned char d)
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| {
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| #ifdef DEBUG_PARPORT
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| 	printk (KERN_DEBUG "parport_pc_write_data(%p,0x%02x)\n", p, d);
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| #endif
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| 	outb(d, DATA(p));
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| }
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| 
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| static __inline__ unsigned char parport_pc_read_data(struct parport *p)
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| {
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| 	unsigned char val = inb (DATA (p));
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| #ifdef DEBUG_PARPORT
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| 	printk (KERN_DEBUG "parport_pc_read_data(%p) = 0x%02x\n",
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| 		p, val);
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| #endif
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| 	return val;
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| }
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| 
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| #ifdef DEBUG_PARPORT
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| static inline void dump_parport_state (char *str, struct parport *p)
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| {
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| 	/* here's hoping that reading these ports won't side-effect anything underneath */
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| 	unsigned char ecr = inb (ECONTROL (p));
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| 	unsigned char dcr = inb (CONTROL (p));
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| 	unsigned char dsr = inb (STATUS (p));
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| 	static const char *const ecr_modes[] = {"SPP", "PS2", "PPFIFO", "ECP", "xXx", "yYy", "TST", "CFG"};
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| 	const struct parport_pc_private *priv = p->physport->private_data;
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| 	int i;
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| 
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| 	printk (KERN_DEBUG "*** parport state (%s): ecr=[%s", str, ecr_modes[(ecr & 0xe0) >> 5]);
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| 	if (ecr & 0x10) printk (",nErrIntrEn");
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| 	if (ecr & 0x08) printk (",dmaEn");
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| 	if (ecr & 0x04) printk (",serviceIntr");
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| 	if (ecr & 0x02) printk (",f_full");
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| 	if (ecr & 0x01) printk (",f_empty");
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| 	for (i=0; i<2; i++) {
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| 		printk ("]  dcr(%s)=[", i ? "soft" : "hard");
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| 		dcr = i ? priv->ctr : inb (CONTROL (p));
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| 	
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| 		if (dcr & 0x20) {
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| 			printk ("rev");
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| 		} else {
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| 			printk ("fwd");
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| 		}
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| 		if (dcr & 0x10) printk (",ackIntEn");
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| 		if (!(dcr & 0x08)) printk (",N-SELECT-IN");
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| 		if (dcr & 0x04) printk (",N-INIT");
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| 		if (!(dcr & 0x02)) printk (",N-AUTOFD");
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| 		if (!(dcr & 0x01)) printk (",N-STROBE");
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| 	}
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| 	printk ("]  dsr=[");
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| 	if (!(dsr & 0x80)) printk ("BUSY");
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| 	if (dsr & 0x40) printk (",N-ACK");
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| 	if (dsr & 0x20) printk (",PERROR");
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| 	if (dsr & 0x10) printk (",SELECT");
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| 	if (dsr & 0x08) printk (",N-FAULT");
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| 	printk ("]\n");
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| 	return;
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| }
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| #else	/* !DEBUG_PARPORT */
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| #define dump_parport_state(args...)
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| #endif	/* !DEBUG_PARPORT */
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| 
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| /* __parport_pc_frob_control differs from parport_pc_frob_control in that
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|  * it doesn't do any extra masking. */
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| static __inline__ unsigned char __parport_pc_frob_control (struct parport *p,
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| 							   unsigned char mask,
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| 							   unsigned char val)
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| {
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| 	struct parport_pc_private *priv = p->physport->private_data;
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| 	unsigned char ctr = priv->ctr;
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| #ifdef DEBUG_PARPORT
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| 	printk (KERN_DEBUG
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| 		"__parport_pc_frob_control(%02x,%02x): %02x -> %02x\n",
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| 		mask, val, ctr, ((ctr & ~mask) ^ val) & priv->ctr_writable);
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| #endif
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| 	ctr = (ctr & ~mask) ^ val;
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| 	ctr &= priv->ctr_writable; /* only write writable bits. */
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| 	outb (ctr, CONTROL (p));
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| 	priv->ctr = ctr;	/* Update soft copy */
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| 	return ctr;
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| }
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| 
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| static __inline__ void parport_pc_data_reverse (struct parport *p)
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| {
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| 	__parport_pc_frob_control (p, 0x20, 0x20);
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| }
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| 
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| static __inline__ void parport_pc_data_forward (struct parport *p)
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| {
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| 	__parport_pc_frob_control (p, 0x20, 0x00);
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| }
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| 
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| static __inline__ void parport_pc_write_control (struct parport *p,
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| 						 unsigned char d)
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| {
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| 	const unsigned char wm = (PARPORT_CONTROL_STROBE |
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| 				  PARPORT_CONTROL_AUTOFD |
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| 				  PARPORT_CONTROL_INIT |
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| 				  PARPORT_CONTROL_SELECT);
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| 
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| 	/* Take this out when drivers have adapted to newer interface. */
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| 	if (d & 0x20) {
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| 		printk (KERN_DEBUG "%s (%s): use data_reverse for this!\n",
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| 			p->name, p->cad->name);
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| 		parport_pc_data_reverse (p);
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| 	}
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| 
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| 	__parport_pc_frob_control (p, wm, d & wm);
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| }
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| 
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| static __inline__ unsigned char parport_pc_read_control(struct parport *p)
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| {
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| 	const unsigned char rm = (PARPORT_CONTROL_STROBE |
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| 				  PARPORT_CONTROL_AUTOFD |
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| 				  PARPORT_CONTROL_INIT |
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| 				  PARPORT_CONTROL_SELECT);
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| 	const struct parport_pc_private *priv = p->physport->private_data;
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| 	return priv->ctr & rm; /* Use soft copy */
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| }
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| 
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| static __inline__ unsigned char parport_pc_frob_control (struct parport *p,
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| 							 unsigned char mask,
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| 							 unsigned char val)
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| {
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| 	const unsigned char wm = (PARPORT_CONTROL_STROBE |
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| 				  PARPORT_CONTROL_AUTOFD |
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| 				  PARPORT_CONTROL_INIT |
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| 				  PARPORT_CONTROL_SELECT);
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| 
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| 	/* Take this out when drivers have adapted to newer interface. */
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| 	if (mask & 0x20) {
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| 		printk (KERN_DEBUG "%s (%s): use data_%s for this!\n",
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| 			p->name, p->cad->name,
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| 			(val & 0x20) ? "reverse" : "forward");
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| 		if (val & 0x20)
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| 			parport_pc_data_reverse (p);
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| 		else
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| 			parport_pc_data_forward (p);
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| 	}
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| 
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| 	/* Restrict mask and val to control lines. */
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| 	mask &= wm;
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| 	val &= wm;
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| 
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| 	return __parport_pc_frob_control (p, mask, val);
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| }
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| 
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| static __inline__ unsigned char parport_pc_read_status(struct parport *p)
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| {
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| 	return inb(STATUS(p));
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| }
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| 
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| 
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| static __inline__ void parport_pc_disable_irq(struct parport *p)
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| {
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| 	__parport_pc_frob_control (p, 0x10, 0x00);
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| }
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| 
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| static __inline__ void parport_pc_enable_irq(struct parport *p)
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| {
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| 	__parport_pc_frob_control (p, 0x10, 0x10);
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| }
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| 
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| extern void parport_pc_release_resources(struct parport *p);
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| 
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| extern int parport_pc_claim_resources(struct parport *p);
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| 
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| /* PCMCIA code will want to get us to look at a port.  Provide a mechanism. */
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| extern struct parport *parport_pc_probe_port (unsigned long base,
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| 					      unsigned long base_hi,
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| 					      int irq, int dma,
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| 					      struct device *dev);
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| extern void parport_pc_unregister_port (struct parport *p);
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| 
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| #endif
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