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	 0a3021f4e2
			
		
	
	
		0a3021f4e2
		
	
	
	
	
		
			
			Remove the obviously unnecessary includes of <linux/spinlock.h> under the include/linux/ directory, and fix the couple errors that are introduced as a result of that. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
		
			
				
	
	
		
			67 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			67 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * ds17287rtc.h - register definitions for the ds1728[57] RTC / CMOS RAM
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|  *
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  *
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|  * (C) 2003 Guido Guenther <agx@sigxcpu.org>
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|  */
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| #ifndef __LINUX_DS17287RTC_H
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| #define __LINUX_DS17287RTC_H
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| 
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| #include <linux/rtc.h>			/* get the user-level API */
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| #include <linux/mc146818rtc.h>
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| 
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| /* Register A */
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| #define DS_REGA_DV2	0x40		/* countdown chain */
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| #define DS_REGA_DV1	0x20		/* oscillator enable */
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| #define DS_REGA_DV0	0x10		/* bank select */
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| 
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| /* bank 1 registers */
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| #define DS_B1_MODEL	0x40		/* model number byte */
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| #define DS_B1_SN1 	0x41		/* serial number byte 1 */
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| #define DS_B1_SN2 	0x42		/* serial number byte 2 */
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| #define DS_B1_SN3 	0x43		/* serial number byte 3 */
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| #define DS_B1_SN4 	0x44		/* serial number byte 4 */
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| #define DS_B1_SN5 	0x45		/* serial number byte 5 */
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| #define DS_B1_SN6 	0x46		/* serial number byte 6 */
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| #define DS_B1_CRC 	0x47		/* CRC byte */
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| #define DS_B1_CENTURY 	0x48		/* Century byte */
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| #define DS_B1_DALARM 	0x49		/* date alarm */
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| #define DS_B1_XCTRL4A	0x4a		/* extendec control register 4a */
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| #define DS_B1_XCTRL4B	0x4b		/* extendec control register 4b */
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| #define DS_B1_RTCADDR2 	0x4e		/* rtc address 2 */
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| #define DS_B1_RTCADDR3 	0x4f		/* rtc address 3 */
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| #define DS_B1_RAMLSB	0x50		/* extended ram LSB */
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| #define DS_B1_RAMMSB	0x51		/* extended ram MSB */
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| #define DS_B1_RAMDPORT	0x53		/* extended ram data port */
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| 
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| /* register details */
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| /* extended control register 4a */
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| #define DS_XCTRL4A_VRT2	0x80 		/* valid ram and time */
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| #define DS_XCTRL4A_INCR	0x40		/* increment progress status */
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| #define DS_XCTRL4A_BME	0x20		/* burst mode enable */
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| #define DS_XCTRL4A_PAB	0x08		/* power active bar ctrl */
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| #define DS_XCTRL4A_RF	0x04		/* ram clear flag */
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| #define DS_XCTRL4A_WF	0x02		/* wake up alarm flag */
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| #define DS_XCTRL4A_KF	0x01		/* kickstart flag */
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| 
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| /* interrupt causes */
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| #define DS_XCTRL4A_IFS	(DS_XCTRL4A_RF|DS_XCTRL4A_WF|DS_XCTRL4A_KF)
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| 
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| /* extended control register 4b */
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| #define DS_XCTRL4B_ABE	0x80 		/* auxiliary battery enable */
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| #define DS_XCTRL4B_E32K	0x40		/* enable 32.768 kHz Output */
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| #define DS_XCTRL4B_CS	0x20		/* crystal select */
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| #define DS_XCTRL4B_RCE	0x10		/* ram clear enable */
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| #define DS_XCTRL4B_PRS	0x08		/* PAB resec select */
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| #define DS_XCTRL4B_RIE	0x04		/* ram clear interrupt enable */
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| #define DS_XCTRL4B_WFE	0x02		/* wake up alarm interrupt enable */
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| #define DS_XCTRL4B_KFE	0x01		/* kickstart interrupt enable */
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| 
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| /* interrupt enable bits */
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| #define DS_XCTRL4B_IFES	(DS_XCTRL4B_RIE|DS_XCTRL4B_WFE|DS_XCTRL4B_KFE)
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| 
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| #endif /* __LINUX_DS17287RTC_H */
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