mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-10-31 18:53:24 +00:00
21aa8ec362
Now that the common header is sane, we can drop the transitional cruft. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
152 lines
5.3 KiB
C
152 lines
5.3 KiB
C
/*
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* Blackfin Infra-red Driver
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*
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* Copyright 2006-2009 Analog Devices Inc.
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*
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Licensed under the GPL-2 or later.
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*
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*/
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#include <linux/serial.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <net/irda/irda.h>
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#include <net/irda/wrapper.h>
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#include <net/irda/irda_device.h>
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#include <asm/irq.h>
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#include <asm/cacheflush.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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#include <mach/bfin_serial_5xx.h>
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#undef DRIVER_NAME
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#ifdef CONFIG_SIR_BFIN_DMA
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struct dma_rx_buf {
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char *buf;
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int head;
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int tail;
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};
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#endif
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struct bfin_sir_port {
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unsigned char __iomem *membase;
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unsigned int irq;
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unsigned int lsr;
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unsigned long clk;
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struct net_device *dev;
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#ifdef CONFIG_SIR_BFIN_DMA
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int tx_done;
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struct dma_rx_buf rx_dma_buf;
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struct timer_list rx_dma_timer;
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int rx_dma_nrows;
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#endif
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unsigned int tx_dma_channel;
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unsigned int rx_dma_channel;
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};
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struct bfin_sir_port_res {
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unsigned long base_addr;
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int irq;
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unsigned int rx_dma_channel;
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unsigned int tx_dma_channel;
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};
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struct bfin_sir_self {
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struct bfin_sir_port *sir_port;
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spinlock_t lock;
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unsigned int open;
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int speed;
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int newspeed;
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struct sk_buff *txskb;
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struct sk_buff *rxskb;
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struct net_device_stats stats;
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struct device *dev;
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struct irlap_cb *irlap;
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struct qos_info qos;
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iobuff_t tx_buff;
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iobuff_t rx_buff;
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struct work_struct work;
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int mtt;
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};
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#define DRIVER_NAME "bfin_sir"
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#define SIR_UART_GET_CHAR(port) bfin_read16((port)->membase + OFFSET_RBR)
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#define SIR_UART_GET_DLL(port) bfin_read16((port)->membase + OFFSET_DLL)
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#define SIR_UART_GET_DLH(port) bfin_read16((port)->membase + OFFSET_DLH)
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#define SIR_UART_GET_LCR(port) bfin_read16((port)->membase + OFFSET_LCR)
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#define SIR_UART_GET_GCTL(port) bfin_read16((port)->membase + OFFSET_GCTL)
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#define SIR_UART_PUT_CHAR(port, v) bfin_write16(((port)->membase + OFFSET_THR), v)
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#define SIR_UART_PUT_DLL(port, v) bfin_write16(((port)->membase + OFFSET_DLL), v)
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#define SIR_UART_PUT_DLH(port, v) bfin_write16(((port)->membase + OFFSET_DLH), v)
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#define SIR_UART_PUT_LCR(port, v) bfin_write16(((port)->membase + OFFSET_LCR), v)
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#define SIR_UART_PUT_GCTL(port, v) bfin_write16(((port)->membase + OFFSET_GCTL), v)
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#ifdef CONFIG_BF54x
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#define SIR_UART_GET_LSR(port) bfin_read16((port)->membase + OFFSET_LSR)
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#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER_SET)
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#define SIR_UART_SET_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_SET), v)
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#define SIR_UART_CLEAR_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER_CLEAR), v)
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#define SIR_UART_PUT_LSR(port, v) bfin_write16(((port)->membase + OFFSET_LSR), v)
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#define SIR_UART_CLEAR_LSR(port) bfin_write16(((port)->membase + OFFSET_LSR), -1)
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#define SIR_UART_SET_DLAB(port)
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#define SIR_UART_CLEAR_DLAB(port)
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#define SIR_UART_ENABLE_INTS(port, v) SIR_UART_SET_IER(port, v)
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#define SIR_UART_DISABLE_INTS(port) SIR_UART_CLEAR_IER(port, 0xF)
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#define SIR_UART_STOP_TX(port) do { SIR_UART_PUT_LSR(port, TFI); SIR_UART_CLEAR_IER(port, ETBEI); } while (0)
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#define SIR_UART_ENABLE_TX(port) do { SIR_UART_SET_IER(port, ETBEI); } while (0)
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#define SIR_UART_STOP_RX(port) do { SIR_UART_CLEAR_IER(port, ERBFI); } while (0)
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#define SIR_UART_ENABLE_RX(port) do { SIR_UART_SET_IER(port, ERBFI); } while (0)
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#else
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#define SIR_UART_GET_IIR(port) bfin_read16((port)->membase + OFFSET_IIR)
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#define SIR_UART_GET_IER(port) bfin_read16((port)->membase + OFFSET_IER)
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#define SIR_UART_PUT_IER(port, v) bfin_write16(((port)->membase + OFFSET_IER), v)
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#define SIR_UART_SET_DLAB(port) do { SIR_UART_PUT_LCR(port, SIR_UART_GET_LCR(port) | DLAB); } while (0)
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#define SIR_UART_CLEAR_DLAB(port) do { SIR_UART_PUT_LCR(port, SIR_UART_GET_LCR(port) & ~DLAB); } while (0)
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#define SIR_UART_ENABLE_INTS(port, v) SIR_UART_PUT_IER(port, v)
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#define SIR_UART_DISABLE_INTS(port) SIR_UART_PUT_IER(port, 0)
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#define SIR_UART_STOP_TX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) & ~ETBEI); } while (0)
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#define SIR_UART_ENABLE_TX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) | ETBEI); } while (0)
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#define SIR_UART_STOP_RX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) & ~ERBFI); } while (0)
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#define SIR_UART_ENABLE_RX(port) do { SIR_UART_PUT_IER(port, SIR_UART_GET_IER(port) | ERBFI); } while (0)
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static inline unsigned int SIR_UART_GET_LSR(struct bfin_sir_port *port)
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{
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unsigned int lsr = bfin_read16(port->membase + OFFSET_LSR);
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port->lsr |= (lsr & (BI|FE|PE|OE));
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return lsr | port->lsr;
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}
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static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port)
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{
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port->lsr = 0;
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bfin_read16(port->membase + OFFSET_LSR);
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}
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#endif
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static const unsigned short per[][4] = {
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/* rx pin tx pin NULL uart_number */
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{P_UART0_RX, P_UART0_TX, 0, 0},
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{P_UART1_RX, P_UART1_TX, 0, 1},
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{P_UART2_RX, P_UART2_TX, 0, 2},
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{P_UART3_RX, P_UART3_TX, 0, 3},
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};
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