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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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0a45348014
sa1100fb incorrectly sets the length of the color fields to 8 bits for PSEUDOCOLOR modes for which only 4 bits are used per pixel. Fix this by setting the length to 4 bits for these modes. Signed-off-by: Michal Januszewski <spock@gentoo.org> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
147 lines
2.7 KiB
C
147 lines
2.7 KiB
C
/*
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* linux/drivers/video/sa1100fb.h
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* -- StrongARM 1100 LCD Controller Frame Buffer Device
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*
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* Copyright (C) 1999 Eric A. Thomas
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* Based on acornfb.c Copyright (C) Russell King.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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/*
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* These are the bitfields for each
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* display depth that we support.
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*/
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struct sa1100fb_rgb {
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struct fb_bitfield red;
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struct fb_bitfield green;
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struct fb_bitfield blue;
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struct fb_bitfield transp;
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};
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/*
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* This structure describes the machine which we are running on.
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*/
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struct sa1100fb_mach_info {
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u_long pixclock;
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u_short xres;
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u_short yres;
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u_char bpp;
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u_char hsync_len;
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u_char left_margin;
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u_char right_margin;
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u_char vsync_len;
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u_char upper_margin;
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u_char lower_margin;
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u_char sync;
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u_int cmap_greyscale:1,
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cmap_inverse:1,
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cmap_static:1,
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unused:29;
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u_int lccr0;
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u_int lccr3;
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};
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/* Shadows for LCD controller registers */
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struct sa1100fb_lcd_reg {
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unsigned long lccr0;
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unsigned long lccr1;
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unsigned long lccr2;
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unsigned long lccr3;
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};
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#define RGB_4 (0)
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#define RGB_8 (1)
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#define RGB_16 (2)
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#define NR_RGB 3
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struct sa1100fb_info {
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struct fb_info fb;
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struct device *dev;
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struct sa1100fb_rgb *rgb[NR_RGB];
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u_int max_bpp;
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u_int max_xres;
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u_int max_yres;
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/*
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* These are the addresses we mapped
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* the framebuffer memory region to.
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*/
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dma_addr_t map_dma;
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u_char * map_cpu;
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u_int map_size;
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u_char * screen_cpu;
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dma_addr_t screen_dma;
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u16 * palette_cpu;
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dma_addr_t palette_dma;
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u_int palette_size;
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dma_addr_t dbar1;
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dma_addr_t dbar2;
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u_int lccr0;
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u_int lccr3;
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u_int cmap_inverse:1,
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cmap_static:1,
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unused:30;
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u_int reg_lccr0;
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u_int reg_lccr1;
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u_int reg_lccr2;
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u_int reg_lccr3;
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volatile u_char state;
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volatile u_char task_state;
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struct mutex ctrlr_lock;
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wait_queue_head_t ctrlr_wait;
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struct work_struct task;
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#ifdef CONFIG_CPU_FREQ
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struct notifier_block freq_transition;
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struct notifier_block freq_policy;
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#endif
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};
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#define TO_INF(ptr,member) container_of(ptr,struct sa1100fb_info,member)
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#define SA1100_PALETTE_MODE_VAL(bpp) (((bpp) & 0x018) << 9)
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/*
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* These are the actions for set_ctrlr_state
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*/
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#define C_DISABLE (0)
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#define C_ENABLE (1)
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#define C_DISABLE_CLKCHANGE (2)
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#define C_ENABLE_CLKCHANGE (3)
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#define C_REENABLE (4)
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#define C_DISABLE_PM (5)
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#define C_ENABLE_PM (6)
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#define C_STARTUP (7)
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#define SA1100_NAME "SA1100"
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/*
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* Debug macros
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*/
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#if DEBUG
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# define DPRINTK(fmt, args...) printk("%s: " fmt, __func__ , ## args)
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#else
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# define DPRINTK(fmt, args...)
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#endif
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/*
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* Minimum X and Y resolutions
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*/
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#define MIN_XRES 64
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#define MIN_YRES 64
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