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	 98fa3d8aea
			
		
	
	
		98fa3d8aea
		
	
	
	
	
		
			
			Convert CONFIG_ARCH_OMAP34XX to CONFIG_ARCH_OMAP3, and
CONFIG_ARCH_OMAP24XX to CONFIG_ARCH_OMAP2, in preparation for Tony's
multi-OMAP patches.
While here, update some copyrights, convert instances of "34xx" to
"3xxx" where applicable, and convert preprocessor directives of the
form
    #if defined(CONFIG_ARCH_OMAP2) | defined(CONFIG_ARCH_OMAP3)
to
    #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
for standardization.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
		
	
			
		
			
				
	
	
		
			154 lines
		
	
	
		
			3.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			154 lines
		
	
	
		
			3.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * OMAP2/3 common powerdomain definitions
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|  *
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|  * Copyright (C) 2007-2008 Texas Instruments, Inc.
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|  * Copyright (C) 2007-2009 Nokia Corporation
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|  *
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|  * Written by Paul Walmsley
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|  * Debugging and integration fixes by Jouni Högander
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  */
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| 
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| /*
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|  * To Do List
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|  * -> Move the Sleep/Wakeup dependencies from Power Domain framework to
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|  *    Clock Domain Framework
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|  */
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| 
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| #ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS
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| #define ARCH_ARM_MACH_OMAP2_POWERDOMAINS
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| 
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| /*
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|  * This file contains all of the powerdomains that have some element
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|  * of software control for the OMAP24xx and OMAP34xx chips.
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|  *
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|  * This is not an exhaustive listing of powerdomains on the chips; only
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|  * powerdomains that can be controlled in software.
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|  */
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| 
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| /*
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|  * The names for the DSP/IVA2 powerdomains are confusing.
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|  *
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|  * Most OMAP chips have an on-board DSP.
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|  *
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|  * On the 2420, this is a 'C55 DSP called, simply, the DSP.  Its
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|  * powerdomain is called the "DSP power domain."  On the 2430, the
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|  * on-board DSP is a 'C64 DSP, now called (along with its hardware
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|  * accelerators) the IVA2 or IVA2.1.  Its powerdomain is still called
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|  * the "DSP power domain." On the 3430, the DSP is a 'C64 DSP like the
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|  * 2430, also known as the IVA2; but its powerdomain is now called the
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|  * "IVA2 power domain."
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|  *
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|  * The 2420 also has something called the IVA, which is a separate ARM
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|  * core, and has nothing to do with the DSP/IVA2.
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|  *
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|  * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM
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|  * address offset is different between the C55 and C64 DSPs.
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|  */
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| 
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| #include <plat/powerdomain.h>
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| 
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| #include "prcm-common.h"
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| #include "prm.h"
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| #include "cm.h"
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| #include "powerdomains24xx.h"
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| #include "powerdomains34xx.h"
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| #include "powerdomains44xx.h"
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| 
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| /* OMAP2/3-common powerdomains */
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| 
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| #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
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| 
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| /*
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|  * The GFX powerdomain is not present on 3430ES2, but currently we do not
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|  * have a macro to filter it out at compile-time.
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|  */
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| static struct powerdomain gfx_omap2_pwrdm = {
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| 	.name		  = "gfx_pwrdm",
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| 	.prcm_offs	  = GFX_MOD,
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| 	.omap_chip	  = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
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| 					   CHIP_IS_OMAP3430ES1),
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| 	.pwrsts		  = PWRSTS_OFF_RET_ON,
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| 	.pwrsts_logic_ret = PWRDM_POWER_RET,
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| 	.banks		  = 1,
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| 	.pwrsts_mem_ret	  = {
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| 		[0] = PWRDM_POWER_RET, /* MEMRETSTATE */
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| 	},
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| 	.pwrsts_mem_on	  = {
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| 		[0] = PWRDM_POWER_ON,  /* MEMONSTATE */
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| 	},
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| };
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| 
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| static struct powerdomain wkup_omap2_pwrdm = {
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| 	.name		= "wkup_pwrdm",
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| 	.prcm_offs	= WKUP_MOD,
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| 	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
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| };
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| 
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| #endif
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| 
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| 
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| /* As powerdomains are added or removed above, this list must also be changed */
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| static struct powerdomain *powerdomains_omap[] __initdata = {
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| 
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| #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
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| 	&wkup_omap2_pwrdm,
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| 	&gfx_omap2_pwrdm,
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| #endif
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| 
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| #ifdef CONFIG_ARCH_OMAP2
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| 	&dsp_pwrdm,
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| 	&mpu_24xx_pwrdm,
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| 	&core_24xx_pwrdm,
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| #endif
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| 
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| #ifdef CONFIG_ARCH_OMAP2430
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| 	&mdm_pwrdm,
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| #endif
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| 
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| #ifdef CONFIG_ARCH_OMAP3
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| 	&iva2_pwrdm,
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| 	&mpu_3xxx_pwrdm,
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| 	&neon_pwrdm,
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| 	&core_3xxx_pre_es3_1_pwrdm,
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| 	&core_3xxx_es3_1_pwrdm,
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| 	&cam_pwrdm,
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| 	&dss_pwrdm,
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| 	&per_pwrdm,
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| 	&emu_pwrdm,
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| 	&sgx_pwrdm,
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| 	&usbhost_pwrdm,
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| 	&dpll1_pwrdm,
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| 	&dpll2_pwrdm,
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| 	&dpll3_pwrdm,
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| 	&dpll4_pwrdm,
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| 	&dpll5_pwrdm,
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| #endif
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| 
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| #ifdef CONFIG_ARCH_OMAP4
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| 	&core_44xx_pwrdm,
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| 	&gfx_44xx_pwrdm,
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| 	&abe_44xx_pwrdm,
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| 	&dss_44xx_pwrdm,
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| 	&tesla_44xx_pwrdm,
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| 	&wkup_44xx_pwrdm,
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| 	&cpu0_44xx_pwrdm,
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| 	&cpu1_44xx_pwrdm,
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| 	&emu_44xx_pwrdm,
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| 	&mpu_44xx_pwrdm,
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| 	&ivahd_44xx_pwrdm,
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| 	&cam_44xx_pwrdm,
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| 	&l3init_44xx_pwrdm,
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| 	&l4per_44xx_pwrdm,
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| 	&always_on_core_44xx_pwrdm,
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| 	&cefuse_44xx_pwrdm,
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| #endif
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| 	NULL
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| };
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| 
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| 
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| #endif
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