mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-10-31 14:06:03 +00:00
1bcd38ad2d
This patch eliminates IO_ADDRESS() usage for Davinci timer definitions. The timer code has correspondingly been modified to ioremap() MMRs instead. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
324 lines
7.6 KiB
C
324 lines
7.6 KiB
C
/*
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* mach-davinci/devices.c
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*
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* DaVinci platform device setup/initialization
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/i2c.h>
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#include <mach/irqs.h>
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#include <mach/cputype.h>
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#include <mach/mux.h>
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#include <mach/edma.h>
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#include <mach/mmc.h>
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#include <mach/time.h>
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#include "clock.h"
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#define DAVINCI_I2C_BASE 0x01C21000
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#define DAVINCI_ATA_BASE 0x01C66000
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#define DAVINCI_MMCSD0_BASE 0x01E10000
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#define DM355_MMCSD0_BASE 0x01E11000
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#define DM355_MMCSD1_BASE 0x01E00000
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#define DM365_MMCSD0_BASE 0x01D11000
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#define DM365_MMCSD1_BASE 0x01D00000
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static struct resource i2c_resources[] = {
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{
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.start = DAVINCI_I2C_BASE,
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.end = DAVINCI_I2C_BASE + 0x40,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_I2C,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device davinci_i2c_device = {
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.name = "i2c_davinci",
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.id = 1,
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.num_resources = ARRAY_SIZE(i2c_resources),
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.resource = i2c_resources,
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};
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void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
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{
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if (cpu_is_davinci_dm644x())
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davinci_cfg_reg(DM644X_I2C);
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davinci_i2c_device.dev.platform_data = pdata;
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(void) platform_device_register(&davinci_i2c_device);
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}
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static struct resource ide_resources[] = {
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{
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.start = DAVINCI_ATA_BASE,
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.end = DAVINCI_ATA_BASE + 0x7ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_IDE,
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.end = IRQ_IDE,
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.flags = IORESOURCE_IRQ,
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},
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};
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static u64 ide_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device ide_device = {
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.name = "palm_bk3710",
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.id = -1,
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.resource = ide_resources,
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.num_resources = ARRAY_SIZE(ide_resources),
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.dev = {
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.dma_mask = &ide_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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void __init davinci_init_ide(void)
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{
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if (cpu_is_davinci_dm644x()) {
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davinci_cfg_reg(DM644X_HPIEN_DISABLE);
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davinci_cfg_reg(DM644X_ATAEN);
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davinci_cfg_reg(DM644X_HDIREN);
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} else if (cpu_is_davinci_dm646x()) {
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/* IRQ_DM646X_IDE is the same as IRQ_IDE */
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davinci_cfg_reg(DM646X_ATAEN);
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} else {
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WARN_ON(1);
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return;
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}
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platform_device_register(&ide_device);
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}
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#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
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static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32);
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static struct resource mmcsd0_resources[] = {
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{
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/* different on dm355 */
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.start = DAVINCI_MMCSD0_BASE,
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.end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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/* IRQs: MMC/SD, then SDIO */
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{
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.start = IRQ_MMCINT,
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.flags = IORESOURCE_IRQ,
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}, {
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/* different on dm355 */
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.start = IRQ_SDIOINT,
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.flags = IORESOURCE_IRQ,
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},
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/* DMA channels: RX, then TX */
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{
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.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCRXEVT),
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.flags = IORESOURCE_DMA,
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}, {
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.start = EDMA_CTLR_CHAN(0, DAVINCI_DMA_MMCTXEVT),
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device davinci_mmcsd0_device = {
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.name = "davinci_mmc",
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.id = 0,
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.dev = {
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.dma_mask = &mmcsd0_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(mmcsd0_resources),
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.resource = mmcsd0_resources,
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};
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static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32);
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static struct resource mmcsd1_resources[] = {
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{
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.start = DM355_MMCSD1_BASE,
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.end = DM355_MMCSD1_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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/* IRQs: MMC/SD, then SDIO */
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{
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.start = IRQ_DM355_MMCINT1,
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.flags = IORESOURCE_IRQ,
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}, {
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.start = IRQ_DM355_SDIOINT1,
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.flags = IORESOURCE_IRQ,
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},
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/* DMA channels: RX, then TX */
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{
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.start = EDMA_CTLR_CHAN(0, 30), /* rx */
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.flags = IORESOURCE_DMA,
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}, {
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.start = EDMA_CTLR_CHAN(0, 31), /* tx */
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device davinci_mmcsd1_device = {
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.name = "davinci_mmc",
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.id = 1,
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.dev = {
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.dma_mask = &mmcsd1_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(mmcsd1_resources),
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.resource = mmcsd1_resources,
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};
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void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
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{
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struct platform_device *pdev = NULL;
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if (WARN_ON(cpu_is_davinci_dm646x()))
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return;
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/* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too;
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* for example if MMCSD1 is used for SDIO, maybe DAT2 is unused.
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*
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* FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are
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* not handled right here ...
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*/
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switch (module) {
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case 1:
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if (cpu_is_davinci_dm355()) {
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/* REVISIT we may not need all these pins if e.g. this
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* is a hard-wired SDIO device...
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*/
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davinci_cfg_reg(DM355_SD1_CMD);
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davinci_cfg_reg(DM355_SD1_CLK);
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davinci_cfg_reg(DM355_SD1_DATA0);
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davinci_cfg_reg(DM355_SD1_DATA1);
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davinci_cfg_reg(DM355_SD1_DATA2);
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davinci_cfg_reg(DM355_SD1_DATA3);
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} else if (cpu_is_davinci_dm365()) {
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void __iomem *pupdctl1 =
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IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
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/* Configure pull down control */
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__raw_writel((__raw_readl(pupdctl1) & ~0x400),
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pupdctl1);
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mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
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mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
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SZ_4K - 1;
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mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
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} else
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break;
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pdev = &davinci_mmcsd1_device;
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break;
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case 0:
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if (cpu_is_davinci_dm355()) {
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mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
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mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
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mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
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/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
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davinci_cfg_reg(DM355_MMCSD0);
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/* enable RX EDMA */
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davinci_cfg_reg(DM355_EVT26_MMC0_RX);
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} else if (cpu_is_davinci_dm365()) {
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mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
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mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
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SZ_4K - 1;
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mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
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} else if (cpu_is_davinci_dm644x()) {
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/* REVISIT: should this be in board-init code? */
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void __iomem *base =
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IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
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/* Power-on 3.3V IO cells */
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__raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
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/*Set up the pull regiter for MMC */
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davinci_cfg_reg(DM644X_MSTK);
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}
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pdev = &davinci_mmcsd0_device;
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break;
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}
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if (WARN_ON(!pdev))
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return;
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pdev->dev.platform_data = config;
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platform_device_register(pdev);
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}
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#else
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void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config)
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{
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}
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#endif
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/*-------------------------------------------------------------------------*/
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static struct resource wdt_resources[] = {
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{
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.start = DAVINCI_WDOG_BASE,
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.end = DAVINCI_WDOG_BASE + SZ_1K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device davinci_wdt_device = {
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.name = "watchdog",
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.id = -1,
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.num_resources = ARRAY_SIZE(wdt_resources),
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.resource = wdt_resources,
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};
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static void davinci_init_wdt(void)
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{
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platform_device_register(&davinci_wdt_device);
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}
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/*-------------------------------------------------------------------------*/
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struct davinci_timer_instance davinci_timer_instance[2] = {
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{
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.base = DAVINCI_TIMER0_BASE,
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.bottom_irq = IRQ_TINT0_TINT12,
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.top_irq = IRQ_TINT0_TINT34,
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},
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{
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.base = DAVINCI_TIMER1_BASE,
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.bottom_irq = IRQ_TINT1_TINT12,
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.top_irq = IRQ_TINT1_TINT34,
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},
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};
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/*-------------------------------------------------------------------------*/
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static int __init davinci_init_devices(void)
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{
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/* please keep these calls, and their implementations above,
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* in alphabetical order so they're easier to sort through.
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*/
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davinci_init_wdt();
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return 0;
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}
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arch_initcall(davinci_init_devices);
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