mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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a78c942df6
While not a port to KVM (yet), this change modifies the kernel to be able to build either at PL1 or at PL2 with a suitable config switch. Pushing up this change avoids handling branch merge issues going forward with the KVM work. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
164 lines
4.9 KiB
C
164 lines
4.9 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_PTRACE_H
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#define _ASM_TILE_PTRACE_H
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#include <arch/chip.h>
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#include <arch/abi.h>
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/* These must match struct pt_regs, below. */
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#if CHIP_WORD_SIZE() == 32
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#define PTREGS_OFFSET_REG(n) ((n)*4)
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#else
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#define PTREGS_OFFSET_REG(n) ((n)*8)
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#endif
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#define PTREGS_OFFSET_BASE 0
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#define PTREGS_OFFSET_TP PTREGS_OFFSET_REG(53)
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#define PTREGS_OFFSET_SP PTREGS_OFFSET_REG(54)
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#define PTREGS_OFFSET_LR PTREGS_OFFSET_REG(55)
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#define PTREGS_NR_GPRS 56
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#define PTREGS_OFFSET_PC PTREGS_OFFSET_REG(56)
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#define PTREGS_OFFSET_EX1 PTREGS_OFFSET_REG(57)
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#define PTREGS_OFFSET_FAULTNUM PTREGS_OFFSET_REG(58)
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#define PTREGS_OFFSET_ORIG_R0 PTREGS_OFFSET_REG(59)
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#define PTREGS_OFFSET_FLAGS PTREGS_OFFSET_REG(60)
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#if CHIP_HAS_CMPEXCH()
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#define PTREGS_OFFSET_CMPEXCH PTREGS_OFFSET_REG(61)
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#endif
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#define PTREGS_SIZE PTREGS_OFFSET_REG(64)
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#ifndef __ASSEMBLY__
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#ifdef __KERNEL__
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/* Benefit from consistent use of "long" on all chips. */
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typedef unsigned long pt_reg_t;
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#else
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/* Provide appropriate length type to userspace regardless of -m32/-m64. */
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typedef uint_reg_t pt_reg_t;
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#endif
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/*
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* This struct defines the way the registers are stored on the stack during a
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* system call or exception. "struct sigcontext" has the same shape.
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*/
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struct pt_regs {
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/* Saved main processor registers; 56..63 are special. */
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/* tp, sp, and lr must immediately follow regs[] for aliasing. */
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pt_reg_t regs[53];
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pt_reg_t tp; /* aliases regs[TREG_TP] */
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pt_reg_t sp; /* aliases regs[TREG_SP] */
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pt_reg_t lr; /* aliases regs[TREG_LR] */
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/* Saved special registers. */
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pt_reg_t pc; /* stored in EX_CONTEXT_K_0 */
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pt_reg_t ex1; /* stored in EX_CONTEXT_K_1 (PL and ICS bit) */
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pt_reg_t faultnum; /* fault number (INT_SWINT_1 for syscall) */
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pt_reg_t orig_r0; /* r0 at syscall entry, else zero */
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pt_reg_t flags; /* flags (see below) */
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#if !CHIP_HAS_CMPEXCH()
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pt_reg_t pad[3];
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#else
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pt_reg_t cmpexch; /* value of CMPEXCH_VALUE SPR at interrupt */
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pt_reg_t pad[2];
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#endif
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};
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#endif /* __ASSEMBLY__ */
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#define PTRACE_GETREGS 12
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#define PTRACE_SETREGS 13
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#define PTRACE_GETFPREGS 14
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#define PTRACE_SETFPREGS 15
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/* Support TILE-specific ptrace options, with events starting at 16. */
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#define PTRACE_O_TRACEMIGRATE 0x00010000
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#define PTRACE_EVENT_MIGRATE 16
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#ifdef __KERNEL__
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#define PTRACE_O_MASK_TILE (PTRACE_O_TRACEMIGRATE)
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#define PT_TRACE_MIGRATE 0x00080000
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#define PT_TRACE_MASK_TILE (PT_TRACE_MIGRATE)
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#endif
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#ifdef __KERNEL__
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/* Flag bits in pt_regs.flags */
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#define PT_FLAGS_DISABLE_IRQ 1 /* on return to kernel, disable irqs */
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#define PT_FLAGS_CALLER_SAVES 2 /* caller-save registers are valid */
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#define PT_FLAGS_RESTORE_REGS 4 /* restore callee-save regs on return */
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#ifndef __ASSEMBLY__
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#define instruction_pointer(regs) ((regs)->pc)
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#define profile_pc(regs) instruction_pointer(regs)
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/* Does the process account for user or for system time? */
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#define user_mode(regs) (EX1_PL((regs)->ex1) == USER_PL)
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/* Fill in a struct pt_regs with the current kernel registers. */
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struct pt_regs *get_pt_regs(struct pt_regs *);
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/* Trace the current syscall. */
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extern void do_syscall_trace(void);
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extern void show_regs(struct pt_regs *);
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#define arch_has_single_step() (1)
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/*
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* A structure for all single-stepper state.
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*
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* Also update defines in assembler section if it changes
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*/
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struct single_step_state {
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/* the page to which we will write hacked-up bundles */
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void __user *buffer;
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union {
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int flags;
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struct {
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unsigned long is_enabled:1, update:1, update_reg:6;
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};
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};
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unsigned long orig_pc; /* the original PC */
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unsigned long next_pc; /* return PC if no branch (PC + 1) */
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unsigned long branch_next_pc; /* return PC if we did branch/jump */
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unsigned long update_value; /* value to restore to update_target */
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};
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/* Single-step the instruction at regs->pc */
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extern void single_step_once(struct pt_regs *regs);
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struct task_struct;
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extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
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int error_code);
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#ifdef __tilegx__
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/* We need this since sigval_t has a user pointer in it, for GETSIGINFO etc. */
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#define __ARCH_WANT_COMPAT_SYS_PTRACE
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#endif
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#endif /* !__ASSEMBLY__ */
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#define SINGLESTEP_STATE_MASK_IS_ENABLED 0x1
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#define SINGLESTEP_STATE_MASK_UPDATE 0x2
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#define SINGLESTEP_STATE_TARGET_LB 2
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#define SINGLESTEP_STATE_TARGET_UB 7
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#endif /* !__KERNEL__ */
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#endif /* _ASM_TILE_PTRACE_H */
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