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	 437db59036
			
		
	
	
		437db59036
		
	
	
	
	
		
			
			Header files for the LPC32xx arch Signed-off-by: Kevin Wells <wellsk40@gmail.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
		
			
				
	
	
		
			64 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			64 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * PNX4008-specific tweaks for I2C IP3204 block
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|  *
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|  * Author: Vitaly Wool <vwool@ru.mvista.com>
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|  *
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|  * 2005 (c) MontaVista Software, Inc. This file is licensed under
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|  * the terms of the GNU General Public License version 2. This program
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|  * is licensed "as is" without any warranty of any kind, whether express
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|  * or implied.
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|  */
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| 
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| #ifndef __ASM_ARCH_I2C_H
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| #define __ASM_ARCH_I2C_H
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| 
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| enum {
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| 	mstatus_tdi = 0x00000001,
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| 	mstatus_afi = 0x00000002,
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| 	mstatus_nai = 0x00000004,
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| 	mstatus_drmi = 0x00000008,
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| 	mstatus_active = 0x00000020,
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| 	mstatus_scl = 0x00000040,
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| 	mstatus_sda = 0x00000080,
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| 	mstatus_rff = 0x00000100,
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| 	mstatus_rfe = 0x00000200,
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| 	mstatus_tff = 0x00000400,
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| 	mstatus_tfe = 0x00000800,
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| };
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| 
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| enum {
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| 	mcntrl_tdie = 0x00000001,
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| 	mcntrl_afie = 0x00000002,
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| 	mcntrl_naie = 0x00000004,
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| 	mcntrl_drmie = 0x00000008,
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| 	mcntrl_daie = 0x00000020,
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| 	mcntrl_rffie = 0x00000040,
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| 	mcntrl_tffie = 0x00000080,
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| 	mcntrl_reset = 0x00000100,
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| 	mcntrl_cdbmode = 0x00000400,
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| };
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| 
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| enum {
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| 	rw_bit = 1 << 0,
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| 	start_bit = 1 << 8,
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| 	stop_bit = 1 << 9,
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| };
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| 
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| #define I2C_REG_RX(a)	((a)->ioaddr)		/* Rx FIFO reg (RO) */
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| #define I2C_REG_TX(a)	((a)->ioaddr)		/* Tx FIFO reg (WO) */
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| #define I2C_REG_STS(a)	((a)->ioaddr + 0x04)	/* Status reg (RO) */
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| #define I2C_REG_CTL(a)	((a)->ioaddr + 0x08)	/* Ctl reg */
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| #define I2C_REG_CKL(a)	((a)->ioaddr + 0x0c)	/* Clock divider low */
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| #define I2C_REG_CKH(a)	((a)->ioaddr + 0x10)	/* Clock divider high */
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| #define I2C_REG_ADR(a)	((a)->ioaddr + 0x14)	/* I2C address */
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| #define I2C_REG_RFL(a)	((a)->ioaddr + 0x18)	/* Rx FIFO level (RO) */
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| #define I2C_REG_TFL(a)	((a)->ioaddr + 0x1c)	/* Tx FIFO level (RO) */
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| #define I2C_REG_RXB(a)	((a)->ioaddr + 0x20)	/* Num of bytes Rx-ed (RO) */
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| #define I2C_REG_TXB(a)	((a)->ioaddr + 0x24)	/* Num of bytes Tx-ed (RO) */
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| #define I2C_REG_TXS(a)	((a)->ioaddr + 0x28)	/* Tx slave FIFO (RO) */
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| #define I2C_REG_STFL(a)	((a)->ioaddr + 0x2c)	/* Tx slave FIFO level (RO) */
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| 
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| #define I2C_CHIP_NAME		"PNX4008-I2C"
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| 
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| #endif				/* __ASM_ARCH_I2C_H */
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