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	 b65b4781fb
			
		
	
	
		b65b4781fb
		
	
	
	
	
		
			
			Since we no longer support discontigmem, node is always zero, so remove this argument. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
		
			
				
	
	
		
			68 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			68 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * DaVinci memory space definitions
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|  *
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|  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
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|  *
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|  * 2007 (c) MontaVista Software, Inc. This file is licensed under
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|  * the terms of the GNU General Public License version 2. This program
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|  * is licensed "as is" without any warranty of any kind, whether express
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|  * or implied.
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|  */
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| #ifndef __ASM_ARCH_MEMORY_H
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| #define __ASM_ARCH_MEMORY_H
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| 
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| /**************************************************************************
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|  * Included Files
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|  **************************************************************************/
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| #include <asm/page.h>
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| #include <asm/sizes.h>
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| 
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| /**************************************************************************
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|  * Definitions
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|  **************************************************************************/
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| #define DAVINCI_DDR_BASE	0x80000000
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| #define DA8XX_DDR_BASE		0xc0000000
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| 
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| #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
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| #error Cannot enable DaVinci and DA8XX platforms concurrently
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| #elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
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| #define PHYS_OFFSET DA8XX_DDR_BASE
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| #else
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| #define PHYS_OFFSET DAVINCI_DDR_BASE
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| #endif
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| 
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| #define DDR2_SDRCR_OFFSET	0xc
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| #define DDR2_SRPD_BIT		BIT(23)
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| #define DDR2_MCLKSTOPEN_BIT	BIT(30)
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| #define DDR2_LPMODEN_BIT	BIT(31)
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| 
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| /*
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|  * Increase size of DMA-consistent memory region
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|  */
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| #define CONSISTENT_DMA_SIZE (14<<20)
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| 
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| #ifndef __ASSEMBLY__
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| /*
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|  * Restrict DMA-able region to workaround silicon bug.  The bug
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|  * restricts buffers available for DMA to video hardware to be
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|  * below 128M
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|  */
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| static inline void
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| __arch_adjust_zones(unsigned long *size, unsigned long *holes)
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| {
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| 	unsigned int sz = (128<<20) >> PAGE_SHIFT;
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| 
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| 	size[1] = size[0] - sz;
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| 	size[0] = sz;
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| }
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| 
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| #define arch_adjust_zones(zone_size, holes) \
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|         if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(zone_size, holes)
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| 
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| #define ISA_DMA_THRESHOLD	(PHYS_OFFSET + (128<<20) - 1)
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| #define MAX_DMA_ADDRESS		(PAGE_OFFSET + (128<<20))
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| 
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| #endif
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| 
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| #endif /* __ASM_ARCH_MEMORY_H */
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