mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-01 23:46:45 +00:00
c7453cb57b
Update event topic moving other topic events to cache and virtual memory. Signed-off-by: Ian Rogers <irogers@google.com> Tested-by: Thomas Falcon <thomas.falcon@intel.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Andreas Färber <afaerber@suse.de> Cc: Caleb Biggers <caleb.biggers@intel.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Perry Taylor <perry.taylor@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Weilin Wang <weilin.wang@intel.com> Link: https://lore.kernel.org/r/20250328175006.43110-24-irogers@google.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
107 lines
3.0 KiB
JSON
107 lines
3.0 KiB
JSON
[
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{
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"BriefDescription": "ES segment renames",
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"Counter": "0,1,2,3",
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"EventCode": "0xD5",
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"EventName": "ES_REG_RENAMES",
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"SampleAfterValue": "2000000",
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"UMask": "0x1"
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},
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{
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"BriefDescription": "I/O transactions",
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"Counter": "0,1,2,3",
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"EventCode": "0x6C",
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"EventName": "IO_TRANSACTIONS",
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"SampleAfterValue": "2000000",
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"UMask": "0x1"
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},
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{
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"BriefDescription": "All loads dispatched",
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"Counter": "0,1,2,3",
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"EventCode": "0x13",
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"EventName": "LOAD_DISPATCH.ANY",
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"SampleAfterValue": "2000000",
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"UMask": "0x7"
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},
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{
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"BriefDescription": "Loads dispatched from the MOB",
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"Counter": "0,1,2,3",
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"EventCode": "0x13",
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"EventName": "LOAD_DISPATCH.MOB",
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"SampleAfterValue": "2000000",
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"UMask": "0x4"
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},
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{
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"BriefDescription": "Loads dispatched that bypass the MOB",
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"Counter": "0,1,2,3",
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"EventCode": "0x13",
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"EventName": "LOAD_DISPATCH.RS",
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"SampleAfterValue": "2000000",
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"UMask": "0x1"
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},
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{
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"BriefDescription": "Loads dispatched from stage 305",
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"Counter": "0,1,2,3",
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"EventCode": "0x13",
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"EventName": "LOAD_DISPATCH.RS_DELAYED",
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"SampleAfterValue": "2000000",
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"UMask": "0x2"
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},
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{
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"BriefDescription": "False dependencies due to partial address aliasing",
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"Counter": "0,1,2,3",
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"EventCode": "0x7",
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"EventName": "PARTIAL_ADDRESS_ALIAS",
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"SampleAfterValue": "200000",
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"UMask": "0x1"
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},
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{
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"BriefDescription": "All Store buffer stall cycles",
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"Counter": "0,1,2,3",
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"EventCode": "0x4",
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"EventName": "SB_DRAIN.ANY",
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"SampleAfterValue": "200000",
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"UMask": "0x7"
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},
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{
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"BriefDescription": "Segment rename stall cycles",
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"Counter": "0,1,2,3",
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"EventCode": "0xD4",
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"EventName": "SEG_RENAME_STALLS",
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"SampleAfterValue": "2000000",
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"UMask": "0x1"
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},
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{
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"BriefDescription": "Thread responded HIT to snoop",
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"Counter": "0,1,2,3",
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"EventCode": "0xB8",
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"EventName": "SNOOP_RESPONSE.HIT",
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"SampleAfterValue": "100000",
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"UMask": "0x1"
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},
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{
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"BriefDescription": "Thread responded HITE to snoop",
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"Counter": "0,1,2,3",
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"EventCode": "0xB8",
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"EventName": "SNOOP_RESPONSE.HITE",
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"SampleAfterValue": "100000",
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"UMask": "0x2"
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},
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{
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"BriefDescription": "Thread responded HITM to snoop",
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"Counter": "0,1,2,3",
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"EventCode": "0xB8",
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"EventName": "SNOOP_RESPONSE.HITM",
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"SampleAfterValue": "100000",
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"UMask": "0x4"
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},
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{
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"BriefDescription": "Super Queue full stall cycles",
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"Counter": "0,1,2,3",
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"EventCode": "0xF6",
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"EventName": "SQ_FULL_STALL_CYCLES",
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"SampleAfterValue": "2000000",
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"UMask": "0x1"
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}
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]
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