mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-01 23:46:45 +00:00

This replaces the incorrectly spelled word "localtion" with "location"
in some power8 PMU event descriptions.
Fixes: 2a81fa3bb5
("perf vendor events: Add power8 PMU events")
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
Reviewed-by: Kajol Jain <kjain@linux.ibm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Ravi Bangoria <ravi.bangoria@linux.ibm.com>
Cc: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Link: http://lore.kernel.org/lkml/20201012050205.328523-1-sandipan@linux.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
177 lines
6.5 KiB
JSON
177 lines
6.5 KiB
JSON
[
|
|
{
|
|
"EventCode": "0x4c054",
|
|
"EventName": "PM_DERAT_MISS_16G",
|
|
"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16G",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x3c054",
|
|
"EventName": "PM_DERAT_MISS_16M",
|
|
"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 16M",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x1c056",
|
|
"EventName": "PM_DERAT_MISS_4K",
|
|
"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 4K",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x2c054",
|
|
"EventName": "PM_DERAT_MISS_64K",
|
|
"BriefDescription": "Data ERAT Miss (Data TLB Access) page size 64K",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x4e048",
|
|
"EventName": "PM_DPTEG_FROM_DL2L3_MOD",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x3e048",
|
|
"EventName": "PM_DPTEG_FROM_DL2L3_SHR",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), as this chip due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x1e042",
|
|
"EventName": "PM_DPTEG_FROM_L2",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x1e04e",
|
|
"EventName": "PM_DPTEG_FROM_L2MISS",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from a location other than the local core's L2 due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x2e040",
|
|
"EventName": "PM_DPTEG_FROM_L2_MEPF",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 hit without dispatch conflicts on Mepf state. due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x1e040",
|
|
"EventName": "PM_DPTEG_FROM_L2_NO_CONFLICT",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L2 without conflict due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x4e042",
|
|
"EventName": "PM_DPTEG_FROM_L3",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x3e042",
|
|
"EventName": "PM_DPTEG_FROM_L3_DISP_CONFLICT",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 with dispatch conflict due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x2e042",
|
|
"EventName": "PM_DPTEG_FROM_L3_MEPF",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without dispatch conflicts hit on Mepf state. due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x1e044",
|
|
"EventName": "PM_DPTEG_FROM_L3_NO_CONFLICT",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from local core's L3 without conflict due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x1e04c",
|
|
"EventName": "PM_DPTEG_FROM_LL4",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x2e048",
|
|
"EventName": "PM_DPTEG_FROM_LMEM",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's Memory due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x2e04c",
|
|
"EventName": "PM_DPTEG_FROM_MEMORY",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from a memory location including L4 from local remote or distant due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x4e04a",
|
|
"EventName": "PM_DPTEG_FROM_OFF_CHIP_CACHE",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on a different chip (remote or distant) due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x1e048",
|
|
"EventName": "PM_DPTEG_FROM_ON_CHIP_CACHE",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB either shared or modified data from another core's L2/L3 on the same chip due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x2e046",
|
|
"EventName": "PM_DPTEG_FROM_RL2L3_MOD",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB with Modified (M) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x1e04a",
|
|
"EventName": "PM_DPTEG_FROM_RL2L3_SHR",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x2e04a",
|
|
"EventName": "PM_DPTEG_FROM_RL4",
|
|
"BriefDescription": "A Page Table Entry was loaded into the TLB from another chip's L4 on the same Node or Group ( Remote) due to a data side request",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x300fc",
|
|
"EventName": "PM_DTLB_MISS",
|
|
"BriefDescription": "Data PTEG reload",
|
|
"PublicDescription": "Data PTEG Reloaded (DTLB Miss)"
|
|
},
|
|
{
|
|
"EventCode": "0x1c058",
|
|
"EventName": "PM_DTLB_MISS_16G",
|
|
"BriefDescription": "Data TLB Miss page size 16G",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x4c056",
|
|
"EventName": "PM_DTLB_MISS_16M",
|
|
"BriefDescription": "Data TLB Miss page size 16M",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x2c056",
|
|
"EventName": "PM_DTLB_MISS_4K",
|
|
"BriefDescription": "Data TLB Miss page size 4k",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x3c056",
|
|
"EventName": "PM_DTLB_MISS_64K",
|
|
"BriefDescription": "Data TLB Miss page size 64K",
|
|
"PublicDescription": ""
|
|
},
|
|
{
|
|
"EventCode": "0x200f6",
|
|
"EventName": "PM_LSU_DERAT_MISS",
|
|
"BriefDescription": "DERAT Reloaded due to a DERAT miss",
|
|
"PublicDescription": "DERAT Reloaded (Miss)"
|
|
},
|
|
{
|
|
"EventCode": "0x20066",
|
|
"EventName": "PM_TLB_MISS",
|
|
"BriefDescription": "TLB Miss (I + D)",
|
|
"PublicDescription": ""
|
|
}
|
|
]
|