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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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968e300068
The main CPUID header <asm/cpuid.h> was originally a storefront for the
headers:
<asm/cpuid/api.h>
<asm/cpuid/leaf_0x2_api.h>
Now that the latter CPUID(0x2) header has been merged into the former,
there is no practical difference between <asm/cpuid.h> and
<asm/cpuid/api.h>.
Migrate all users to the <asm/cpuid/api.h> header, in preparation of
the removal of <asm/cpuid.h>.
Don't remove <asm/cpuid.h> just yet, in case some new code in -next
started using it.
Suggested-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250508150240.172915-3-darwi@linutronix.de
87 lines
2.1 KiB
C
87 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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//
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// Copyright(c) 2021-2024 Intel Corporation
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//
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// Authors: Cezary Rojewski <cezary.rojewski@intel.com>
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// Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
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//
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#include <linux/pci.h>
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#include "avs.h"
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#include "messages.h"
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#define CPUID_TSC_LEAF 0x15
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static int avs_tgl_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power)
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{
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core_mask &= AVS_MAIN_CORE_MASK;
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if (!core_mask)
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return 0;
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return avs_dsp_core_power(adev, core_mask, power);
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}
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static int avs_tgl_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset)
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{
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core_mask &= AVS_MAIN_CORE_MASK;
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if (!core_mask)
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return 0;
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return avs_dsp_core_reset(adev, core_mask, reset);
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}
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static int avs_tgl_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall)
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{
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core_mask &= AVS_MAIN_CORE_MASK;
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if (!core_mask)
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return 0;
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return avs_dsp_core_stall(adev, core_mask, stall);
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}
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static int avs_tgl_config_basefw(struct avs_dev *adev)
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{
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struct pci_dev *pci = adev->base.pci;
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struct avs_bus_hwid hwid;
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int ret;
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#ifdef CONFIG_X86
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unsigned int ecx;
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#include <asm/cpuid/api.h>
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ecx = cpuid_ecx(CPUID_TSC_LEAF);
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if (ecx) {
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ret = avs_ipc_set_fw_config(adev, 1, AVS_FW_CFG_XTAL_FREQ_HZ, sizeof(ecx), &ecx);
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if (ret)
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return AVS_IPC_RET(ret);
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}
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#endif
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hwid.device = pci->device;
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hwid.subsystem = pci->subsystem_vendor | (pci->subsystem_device << 16);
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hwid.revision = pci->revision;
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ret = avs_ipc_set_fw_config(adev, 1, AVS_FW_CFG_BUS_HARDWARE_ID, sizeof(hwid), &hwid);
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if (ret)
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return AVS_IPC_RET(ret);
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return 0;
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}
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const struct avs_dsp_ops avs_tgl_dsp_ops = {
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.power = avs_tgl_dsp_core_power,
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.reset = avs_tgl_dsp_core_reset,
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.stall = avs_tgl_dsp_core_stall,
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.dsp_interrupt = avs_cnl_dsp_interrupt,
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.int_control = avs_dsp_interrupt_control,
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.load_basefw = avs_icl_load_basefw,
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.load_lib = avs_hda_load_library,
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.transfer_mods = avs_hda_transfer_modules,
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.config_basefw = avs_tgl_config_basefw,
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.log_buffer_offset = avs_icl_log_buffer_offset,
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.log_buffer_status = avs_apl_log_buffer_status,
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.coredump = avs_apl_coredump,
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.d0ix_toggle = avs_icl_d0ix_toggle,
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.set_d0ix = avs_icl_set_d0ix,
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AVS_SET_ENABLE_LOGS_OP(icl)
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};
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