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Define handlers specific to ACE platforms, that Frisco Lake (FCL), a PantherLake (PTL)-based platform, is founded upon. Most operations are still inherited from their predecessors with the major difference being AudioDSP cores management - replaced by DSP-domain power management. Software has to ensure the DSP domain is both powered on and its power-gating disabled before it can be utilized for streaming. Reviewed-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Acked-by: Liam Girdwood <liam.r.girdwood@linux.intel.com> Link: https://patch.msgid.link/20250407112352.3720779-6-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
28 lines
761 B
C
28 lines
761 B
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright(c) 2021-2025 Intel Corporation
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*
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* Authors: Cezary Rojewski <cezary.rojewski@intel.com>
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* Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
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*/
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#include <sound/hdaudio_ext.h>
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#include "avs.h"
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#include "registers.h"
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int avs_lnl_core_stall(struct avs_dev *adev, u32 core_mask, bool stall)
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{
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struct hdac_bus *bus = &adev->base.core;
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struct hdac_ext_link *hlink;
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int ret;
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ret = avs_mtl_core_stall(adev, core_mask, stall);
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/* On unstall, route interrupts from the links to the DSP firmware. */
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if (!ret && !stall)
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list_for_each_entry(hlink, &bus->hlink_list, list)
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snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, AZX_ML_LCTL_OFLEN,
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AZX_ML_LCTL_OFLEN);
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return ret;
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}
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