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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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f58872f45c
The behavior of an SPI controller data output line (SDO or MOSI or COPI (Controller Output Peripheral Input) for disambiguation) is usually not specified when the controller is not clocking out data on SCLK edges. However, there do exist SPI peripherals that require specific MOSI line state when data is not being clocked out of the controller. Conventional SPI controllers may set the MOSI line on SCLK edges then bring it low when no data is going out or leave the line the state of the last transfer bit. More elaborated controllers are capable to set the MOSI idle state according to different configurable levels and thus are more suitable for interfacing with demanding peripherals. Add SPI mode bits to allow peripherals to request explicit MOSI idle state when needed. When supporting a particular MOSI idle configuration, the data output line state is expected to remain at the configured level when the controller is not clocking out data. When a device that needs a specific MOSI idle state is identified, its driver should request the MOSI idle configuration by setting the proper SPI mode bit. Acked-by: Nuno Sa <nuno.sa@analog.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Tested-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/9802160b5e5baed7f83ee43ac819cb757a19be55.1720810545.git.marcelo.schmitt@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
45 lines
2.0 KiB
C
45 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
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#ifndef _UAPI_SPI_H
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#define _UAPI_SPI_H
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#include <linux/const.h>
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#define SPI_CPHA _BITUL(0) /* clock phase */
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#define SPI_CPOL _BITUL(1) /* clock polarity */
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#define SPI_MODE_0 (0|0) /* (original MicroWire) */
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#define SPI_MODE_1 (0|SPI_CPHA)
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#define SPI_MODE_2 (SPI_CPOL|0)
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#define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
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#define SPI_MODE_X_MASK (SPI_CPOL|SPI_CPHA)
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#define SPI_CS_HIGH _BITUL(2) /* chipselect active high? */
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#define SPI_LSB_FIRST _BITUL(3) /* per-word bits-on-wire */
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#define SPI_3WIRE _BITUL(4) /* SI/SO signals shared */
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#define SPI_LOOP _BITUL(5) /* loopback mode */
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#define SPI_NO_CS _BITUL(6) /* 1 dev/bus, no chipselect */
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#define SPI_READY _BITUL(7) /* slave pulls low to pause */
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#define SPI_TX_DUAL _BITUL(8) /* transmit with 2 wires */
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#define SPI_TX_QUAD _BITUL(9) /* transmit with 4 wires */
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#define SPI_RX_DUAL _BITUL(10) /* receive with 2 wires */
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#define SPI_RX_QUAD _BITUL(11) /* receive with 4 wires */
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#define SPI_CS_WORD _BITUL(12) /* toggle cs after each word */
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#define SPI_TX_OCTAL _BITUL(13) /* transmit with 8 wires */
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#define SPI_RX_OCTAL _BITUL(14) /* receive with 8 wires */
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#define SPI_3WIRE_HIZ _BITUL(15) /* high impedance turnaround */
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#define SPI_RX_CPHA_FLIP _BITUL(16) /* flip CPHA on Rx only xfer */
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#define SPI_MOSI_IDLE_LOW _BITUL(17) /* leave MOSI line low when idle */
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#define SPI_MOSI_IDLE_HIGH _BITUL(18) /* leave MOSI line high when idle */
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/*
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* All the bits defined above should be covered by SPI_MODE_USER_MASK.
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* The SPI_MODE_USER_MASK has the SPI_MODE_KERNEL_MASK counterpart in
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* 'include/linux/spi/spi.h'. The bits defined here are from bit 0 upwards
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* while in SPI_MODE_KERNEL_MASK they are from the other end downwards.
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* These bits must not overlap. A static assert check should make sure of that.
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* If adding extra bits, make sure to increase the bit index below as well.
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*/
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#define SPI_MODE_USER_MASK (_BITUL(19) - 1)
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#endif /* _UAPI_SPI_H */
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