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e4b1d67e71
Add a mailbox controller driver for the Microchip Inter-processor Communication (IPC), which is used to send and receive data between processors. The driver uses the RISC-V Supervisor Binary Interface (SBI) to communicate with software running in machine mode (M-mode) to access the IPC hardware block. Additional details on the Microchip vendor extension and the IPC function IDs described in the driver can be found in the following documentation: https://github.com/linux4microchip/microchip-sbi-ecall-extension This SBI interface in this driver is compatible with the Mi-V Inter-hart Communication (IHC) IP. Transmitting and receiving data through the mailbox framework is done through struct mchp_ipc_msg. Signed-off-by: Valentina Fernandez <valentina.fernandezalanis@microchip.com> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
34 lines
625 B
C
34 lines
625 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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*Copyright (c) 2024 Microchip Technology Inc. All rights reserved.
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*/
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#ifndef _LINUX_MCHP_IPC_H_
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#define _LINUX_MCHP_IPC_H_
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#include <linux/mailbox_controller.h>
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#include <linux/types.h>
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struct mchp_ipc_msg {
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u32 *buf;
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u16 size;
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};
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struct mchp_ipc_sbi_chan {
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void *buf_base_tx;
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void *buf_base_rx;
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void *msg_buf_tx;
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void *msg_buf_rx;
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phys_addr_t buf_base_tx_addr;
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phys_addr_t buf_base_rx_addr;
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phys_addr_t msg_buf_tx_addr;
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phys_addr_t msg_buf_rx_addr;
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int chan_aggregated_irq;
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int mp_irq;
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int mc_irq;
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u32 id;
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u32 max_msg_size;
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};
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#endif /* _LINUX_MCHP_IPC_H_ */
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