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9c51c66c99
Add DT bindings for the Video clock on QCS615 platforms. Add the relevant DT include definitions as well. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20250702-qcs615-mm-v10-clock-controllers-v11-8-9c216e1615ab@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
31 lines
845 B
C
31 lines
845 B
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_QCS615_H
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#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_QCS615_H
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/* VIDEO_CC clocks */
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#define VIDEO_CC_SLEEP_CLK 0
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#define VIDEO_CC_SLEEP_CLK_SRC 1
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#define VIDEO_CC_VCODEC0_AXI_CLK 2
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#define VIDEO_CC_VCODEC0_CORE_CLK 3
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#define VIDEO_CC_VENUS_AHB_CLK 4
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#define VIDEO_CC_VENUS_CLK_SRC 5
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#define VIDEO_CC_VENUS_CTL_AXI_CLK 6
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#define VIDEO_CC_VENUS_CTL_CORE_CLK 7
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#define VIDEO_CC_XO_CLK 8
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#define VIDEO_PLL0 9
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/* VIDEO_CC power domains */
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#define VCODEC0_GDSC 0
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#define VENUS_GDSC 1
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/* VIDEO_CC resets */
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#define VIDEO_CC_INTERFACE_BCR 0
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#define VIDEO_CC_VCODEC0_BCR 1
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#define VIDEO_CC_VENUS_BCR 2
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#endif
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