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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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Recent SoCs (SM8450 onwards) require QMP command to be sent before reading ddr stats. The duration field of ddr stats will get populated only if QMP command is sent. Add support to send ddr stats freqsync QMP command. Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250611-ddr_stats_-v5-2-24b16dd67c9c@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
431 lines
11 KiB
C
431 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2011-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022-2025, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/bitfield.h>
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#include <linux/debugfs.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/seq_file.h>
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#include <linux/soc/qcom/qcom_aoss.h>
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#include <linux/soc/qcom/smem.h>
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#include <clocksource/arm_arch_timer.h>
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#define RPM_DYNAMIC_ADDR 0x14
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#define RPM_DYNAMIC_ADDR_MASK 0xFFFF
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#define STAT_TYPE_OFFSET 0x0
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#define COUNT_OFFSET 0x4
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#define LAST_ENTERED_AT_OFFSET 0x8
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#define LAST_EXITED_AT_OFFSET 0x10
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#define ACCUMULATED_OFFSET 0x18
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#define CLIENT_VOTES_OFFSET 0x20
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#define DDR_STATS_MAGIC_KEY 0xA1157A75
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#define DDR_STATS_MAX_NUM_MODES 20
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#define DDR_STATS_MAGIC_KEY_ADDR 0x0
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#define DDR_STATS_NUM_MODES_ADDR 0x4
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#define DDR_STATS_ENTRY_START_ADDR 0x8
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#define DDR_STATS_CP_IDX(data) FIELD_GET(GENMASK(4, 0), data)
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#define DDR_STATS_LPM_NAME(data) FIELD_GET(GENMASK(7, 0), data)
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#define DDR_STATS_TYPE(data) FIELD_GET(GENMASK(15, 8), data)
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#define DDR_STATS_FREQ(data) FIELD_GET(GENMASK(31, 16), data)
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static struct qmp *qcom_stats_qmp;
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struct subsystem_data {
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const char *name;
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u32 smem_item;
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u32 pid;
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};
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static const struct subsystem_data subsystems[] = {
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{ "modem", 605, 1 },
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{ "wpss", 605, 13 },
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{ "adsp", 606, 2 },
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{ "cdsp", 607, 5 },
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{ "cdsp1", 607, 12 },
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{ "gpdsp0", 607, 17 },
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{ "gpdsp1", 607, 18 },
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{ "slpi", 608, 3 },
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{ "gpu", 609, 0 },
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{ "display", 610, 0 },
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{ "adsp_island", 613, 2 },
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{ "slpi_island", 613, 3 },
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{ "apss", 631, QCOM_SMEM_HOST_ANY },
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};
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struct stats_config {
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size_t stats_offset;
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size_t ddr_stats_offset;
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size_t num_records;
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bool appended_stats_avail;
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bool dynamic_offset;
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bool subsystem_stats_in_smem;
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};
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struct ddr_stats_entry {
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u32 name;
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u32 count;
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u64 duration;
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};
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struct stats_data {
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bool appended_stats_avail;
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void __iomem *base;
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};
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struct sleep_stats {
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u32 stat_type;
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u32 count;
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u64 last_entered_at;
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u64 last_exited_at;
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u64 accumulated;
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};
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struct appended_stats {
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u32 client_votes;
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u32 reserved[3];
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};
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static void qcom_print_stats(struct seq_file *s, const struct sleep_stats *stat)
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{
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u64 accumulated = stat->accumulated;
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/*
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* If a subsystem is in sleep when reading the sleep stats adjust
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* the accumulated sleep duration to show actual sleep time.
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*/
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if (stat->last_entered_at > stat->last_exited_at)
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accumulated += arch_timer_read_counter() - stat->last_entered_at;
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seq_printf(s, "Count: %u\n", stat->count);
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seq_printf(s, "Last Entered At: %llu\n", stat->last_entered_at);
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seq_printf(s, "Last Exited At: %llu\n", stat->last_exited_at);
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seq_printf(s, "Accumulated Duration: %llu\n", accumulated);
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}
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static int qcom_subsystem_sleep_stats_show(struct seq_file *s, void *unused)
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{
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struct subsystem_data *subsystem = s->private;
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struct sleep_stats *stat;
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/* Items are allocated lazily, so lookup pointer each time */
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stat = qcom_smem_get(subsystem->pid, subsystem->smem_item, NULL);
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if (IS_ERR(stat))
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return 0;
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qcom_print_stats(s, stat);
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return 0;
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}
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static int qcom_soc_sleep_stats_show(struct seq_file *s, void *unused)
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{
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struct stats_data *d = s->private;
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void __iomem *reg = d->base;
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struct sleep_stats stat;
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memcpy_fromio(&stat, reg, sizeof(stat));
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qcom_print_stats(s, &stat);
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if (d->appended_stats_avail) {
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struct appended_stats votes;
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memcpy_fromio(&votes, reg + CLIENT_VOTES_OFFSET, sizeof(votes));
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seq_printf(s, "Client Votes: %#x\n", votes.client_votes);
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}
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return 0;
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}
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static void qcom_ddr_stats_print(struct seq_file *s, struct ddr_stats_entry *data)
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{
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u32 cp_idx;
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/*
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* DDR statistic have two different types of details encoded.
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* (1) DDR LPM Stats
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* (2) DDR Frequency Stats
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*
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* The name field have details like which type of DDR stat (bits 8:15)
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* along with other details as explained below
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*
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* In case of DDR LPM stat, name field will be encoded as,
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* Bits - Meaning
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* 0:7 - DDR LPM name, can be of 0xd4, 0xd3, 0x11 and 0xd0.
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* 8:15 - 0x0 (indicates its a LPM stat)
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* 16:31 - Unused
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*
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* In case of DDR FREQ stats, name field will be encoded as,
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* Bits - Meaning
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* 0:4 - DDR Clock plan index (CP IDX)
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* 5:7 - Unused
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* 8:15 - 0x1 (indicates its Freq stat)
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* 16:31 - Frequency value in Mhz
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*/
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switch (DDR_STATS_TYPE(data->name)) {
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case 0:
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seq_printf(s, "DDR LPM Stat Name:0x%lx\tcount:%u\tDuration (ticks):%llu\n",
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DDR_STATS_LPM_NAME(data->name), data->count, data->duration);
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break;
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case 1:
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if (!data->count || !DDR_STATS_FREQ(data->name))
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return;
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cp_idx = DDR_STATS_CP_IDX(data->name);
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seq_printf(s, "DDR Freq %luMhz:\tCP IDX:%u\tcount:%u\tDuration (ticks):%llu\n",
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DDR_STATS_FREQ(data->name), cp_idx, data->count, data->duration);
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break;
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}
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}
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static int qcom_ddr_stats_show(struct seq_file *s, void *d)
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{
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struct ddr_stats_entry data[DDR_STATS_MAX_NUM_MODES];
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void __iomem *reg = (void __iomem *)s->private;
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u32 entry_count;
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int i, ret;
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entry_count = readl_relaxed(reg + DDR_STATS_NUM_MODES_ADDR);
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if (entry_count > DDR_STATS_MAX_NUM_MODES)
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return -EINVAL;
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if (qcom_stats_qmp) {
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/*
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* Recent SoCs (SM8450 onwards) do not have duration field
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* populated from boot up onwards for both DDR LPM Stats
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* and DDR Frequency Stats.
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*
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* Send QMP message to Always on processor which will
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* populate duration field into MSG RAM area.
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*
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* Sent every time to read latest data.
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*/
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ret = qmp_send(qcom_stats_qmp, "{class: ddr, action: freqsync}");
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if (ret)
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return ret;
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}
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reg += DDR_STATS_ENTRY_START_ADDR;
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memcpy_fromio(data, reg, sizeof(struct ddr_stats_entry) * entry_count);
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for (i = 0; i < entry_count; i++)
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qcom_ddr_stats_print(s, &data[i]);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(qcom_soc_sleep_stats);
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DEFINE_SHOW_ATTRIBUTE(qcom_subsystem_sleep_stats);
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DEFINE_SHOW_ATTRIBUTE(qcom_ddr_stats);
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static void qcom_create_ddr_stat_files(struct dentry *root, void __iomem *reg,
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const struct stats_config *config)
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{
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u32 key;
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if (!config->ddr_stats_offset)
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return;
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key = readl_relaxed(reg + config->ddr_stats_offset + DDR_STATS_MAGIC_KEY_ADDR);
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if (key == DDR_STATS_MAGIC_KEY)
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debugfs_create_file("ddr_stats", 0400, root,
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(__force void *)reg + config->ddr_stats_offset,
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&qcom_ddr_stats_fops);
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}
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static void qcom_create_soc_sleep_stat_files(struct dentry *root, void __iomem *reg,
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struct stats_data *d,
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const struct stats_config *config)
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{
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char stat_type[sizeof(u32) + 1] = {0};
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size_t stats_offset = config->stats_offset;
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u32 offset = 0, type;
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int i, j;
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/*
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* On RPM targets, stats offset location is dynamic and changes from target
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* to target and sometimes from build to build for same target.
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*
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* In such cases the dynamic address is present at 0x14 offset from base
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* address in devicetree. The last 16bits indicates the stats_offset.
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*/
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if (config->dynamic_offset) {
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stats_offset = readl(reg + RPM_DYNAMIC_ADDR);
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stats_offset &= RPM_DYNAMIC_ADDR_MASK;
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}
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for (i = 0; i < config->num_records; i++) {
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d[i].base = reg + offset + stats_offset;
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/*
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* Read the low power mode name and create debugfs file for it.
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* The names read could be of below,
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* (may change depending on low power mode supported).
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* For rpmh-sleep-stats: "aosd", "cxsd" and "ddr".
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* For rpm-sleep-stats: "vmin" and "vlow".
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*/
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type = readl(d[i].base);
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for (j = 0; j < sizeof(u32); j++) {
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stat_type[j] = type & 0xff;
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type = type >> 8;
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}
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strim(stat_type);
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debugfs_create_file(stat_type, 0400, root, &d[i],
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&qcom_soc_sleep_stats_fops);
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offset += sizeof(struct sleep_stats);
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if (d[i].appended_stats_avail)
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offset += sizeof(struct appended_stats);
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}
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}
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static void qcom_create_subsystem_stat_files(struct dentry *root,
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const struct stats_config *config)
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{
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int i;
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if (!config->subsystem_stats_in_smem)
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return;
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for (i = 0; i < ARRAY_SIZE(subsystems); i++)
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debugfs_create_file(subsystems[i].name, 0400, root, (void *)&subsystems[i],
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&qcom_subsystem_sleep_stats_fops);
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}
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static int qcom_stats_probe(struct platform_device *pdev)
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{
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void __iomem *reg;
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struct dentry *root;
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const struct stats_config *config;
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struct stats_data *d;
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int i;
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config = device_get_match_data(&pdev->dev);
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if (!config)
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return -ENODEV;
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reg = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
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if (IS_ERR(reg))
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return -ENOMEM;
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d = devm_kcalloc(&pdev->dev, config->num_records,
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sizeof(*d), GFP_KERNEL);
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if (!d)
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return -ENOMEM;
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for (i = 0; i < config->num_records; i++)
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d[i].appended_stats_avail = config->appended_stats_avail;
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/*
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* QMP is used for DDR stats syncing to MSG RAM for recent SoCs (SM8450 onwards).
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* The prior SoCs do not need QMP handle as the required stats are already present
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* in MSG RAM, provided the DDR_STATS_MAGIC_KEY matches.
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*/
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qcom_stats_qmp = qmp_get(&pdev->dev);
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if (IS_ERR(qcom_stats_qmp)) {
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/* We ignore error if QMP is not defined/needed */
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if (!of_property_present(pdev->dev.of_node, "qcom,qmp"))
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qcom_stats_qmp = NULL;
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else if (PTR_ERR(qcom_stats_qmp) == -EPROBE_DEFER)
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return -EPROBE_DEFER;
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else
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return PTR_ERR(qcom_stats_qmp);
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}
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root = debugfs_create_dir("qcom_stats", NULL);
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qcom_create_subsystem_stat_files(root, config);
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qcom_create_soc_sleep_stat_files(root, reg, d, config);
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qcom_create_ddr_stat_files(root, reg, config);
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platform_set_drvdata(pdev, root);
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device_set_pm_not_required(&pdev->dev);
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return 0;
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}
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static void qcom_stats_remove(struct platform_device *pdev)
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{
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struct dentry *root = platform_get_drvdata(pdev);
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debugfs_remove_recursive(root);
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}
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static const struct stats_config rpm_data = {
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.stats_offset = 0,
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.num_records = 2,
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.appended_stats_avail = true,
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.dynamic_offset = true,
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.subsystem_stats_in_smem = false,
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};
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/* Older RPM firmwares have the stats at a fixed offset instead */
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static const struct stats_config rpm_data_dba0 = {
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.stats_offset = 0xdba0,
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.num_records = 2,
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.appended_stats_avail = true,
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.dynamic_offset = false,
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.subsystem_stats_in_smem = false,
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};
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static const struct stats_config rpmh_data_sdm845 = {
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.stats_offset = 0x48,
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.num_records = 2,
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.appended_stats_avail = false,
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.dynamic_offset = false,
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.subsystem_stats_in_smem = true,
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};
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static const struct stats_config rpmh_data = {
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.stats_offset = 0x48,
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.ddr_stats_offset = 0xb8,
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.num_records = 3,
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.appended_stats_avail = false,
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.dynamic_offset = false,
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.subsystem_stats_in_smem = true,
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};
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static const struct of_device_id qcom_stats_table[] = {
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{ .compatible = "qcom,apq8084-rpm-stats", .data = &rpm_data_dba0 },
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{ .compatible = "qcom,msm8226-rpm-stats", .data = &rpm_data_dba0 },
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{ .compatible = "qcom,msm8916-rpm-stats", .data = &rpm_data_dba0 },
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{ .compatible = "qcom,msm8974-rpm-stats", .data = &rpm_data_dba0 },
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{ .compatible = "qcom,rpm-stats", .data = &rpm_data },
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{ .compatible = "qcom,rpmh-stats", .data = &rpmh_data },
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{ .compatible = "qcom,sdm845-rpmh-stats", .data = &rpmh_data_sdm845 },
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{ }
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};
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MODULE_DEVICE_TABLE(of, qcom_stats_table);
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static struct platform_driver qcom_stats = {
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.probe = qcom_stats_probe,
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.remove = qcom_stats_remove,
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.driver = {
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.name = "qcom_stats",
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.of_match_table = qcom_stats_table,
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},
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};
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static int __init qcom_stats_init(void)
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{
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return platform_driver_register(&qcom_stats);
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}
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late_initcall(qcom_stats_init);
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static void __exit qcom_stats_exit(void)
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{
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platform_driver_unregister(&qcom_stats);
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}
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module_exit(qcom_stats_exit)
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MODULE_DESCRIPTION("Qualcomm Technologies, Inc. (QTI) Stats driver");
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MODULE_LICENSE("GPL v2");
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