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b5d4653962
Convert ssram device related functionalities to a new driver named Intel PMC SSRAM Telemetry driver. Modify PMC Core driver to use API exported by the driver to discover and achieve devid and PWRMBASE address information for each available PMC. PMC Core driver needs to get PCI device when reading from telemetry regions. The new SSRAM driver binds to the SSRAM device and provides the following functionalities: 1. Look for and register telemetry regions available in SSRAM device. 2. Provide devid and PWRMBASE address information for the corresponding PMCs. Signed-off-by: Xi Pardee <xi.pardee@linux.intel.com> Link: https://lore.kernel.org/r/20250425195237.493129-3-xi.pardee@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
31 lines
1.0 KiB
Plaintext
31 lines
1.0 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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#
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# Intel x86 Platform-Specific Drivers
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#
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config INTEL_PMC_CORE
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tristate "Intel PMC Core driver"
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depends on PCI
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depends on ACPI
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depends on INTEL_PMT_TELEMETRY
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select INTEL_PMC_SSRAM_TELEMETRY
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help
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The Intel Platform Controller Hub for Intel Core SoCs provides access
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to Power Management Controller registers via various interfaces. This
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driver can utilize debugging capabilities and supported features as
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exposed by the Power Management Controller. It also may perform some
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tasks in the PMC in order to enable transition into the SLPS0 state.
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It should be selected on all Intel platforms supported by the driver.
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Supported features:
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- SLP_S0_RESIDENCY counter
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- PCH IP Power Gating status
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- LTR Ignore / LTR Show
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- MPHY/PLL gating status (Sunrisepoint PCH only)
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- SLPS0 Debug registers (Cannonlake/Icelake PCH)
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- Low Power Mode registers (Tigerlake and beyond)
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- PMC quirks as needed to enable SLPS0/S0ix
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config INTEL_PMC_SSRAM_TELEMETRY
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tristate
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