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47e1bb6b4b
Addition of the COMBOPHY driver found on STM32MP25 platforms This single lane PHY is shared (exclusive) between the USB3 and PCIE controllers. Supports 5Gbit/s for PCIE gen2 or 2.5Gbit/s for PCIE gen1. Supports wakeup-source capability to wakeup system using remote-wakeup capable USB device Signed-off-by: Christian Bruel <christian.bruel@foss.st.com> Link: https://lore.kernel.org/r/20240930170847.948779-3-christian.bruel@foss.st.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
8 lines
378 B
Makefile
8 lines
378 B
Makefile
# SPDX-License-Identifier: GPL-2.0-only
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obj-$(CONFIG_PHY_MIPHY28LP) += phy-miphy28lp.o
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obj-$(CONFIG_PHY_ST_SPEAR1310_MIPHY) += phy-spear1310-miphy.o
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obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY) += phy-spear1340-miphy.o
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obj-$(CONFIG_PHY_STIH407_USB) += phy-stih407-usb.o
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obj-$(CONFIG_PHY_STM32_COMBOPHY) += phy-stm32-combophy.o
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obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o
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