mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-07 05:45:24 +00:00

iwlmld was planned to be used for HR/GF, which has version 4, but it was decided at the end to use iwlmvm for HR/GF, so iwlmld only needs to support version 5. Remove version 4 support. Reviewed-by: Johannes Berg <johannes.berg@intel.com> Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com> Link: https://patch.msgid.link/20250711183056.faeb1e6bac2a.I1a29b16f59b67c103d1f91dedee27e04cd7fdfdd@changeid
370 lines
10 KiB
C
370 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
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/*
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* Copyright (C) 2024-2025 Intel Corporation
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*/
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#include <linux/dmi.h>
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#include "fw/regulatory.h"
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#include "fw/acpi.h"
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#include "fw/uefi.h"
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#include "regulatory.h"
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#include "mld.h"
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#include "hcmd.h"
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void iwl_mld_get_bios_tables(struct iwl_mld *mld)
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{
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int ret;
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iwl_acpi_get_guid_lock_status(&mld->fwrt);
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ret = iwl_bios_get_ppag_table(&mld->fwrt);
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if (ret < 0) {
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IWL_DEBUG_RADIO(mld,
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"PPAG BIOS table invalid or unavailable. (%d)\n",
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ret);
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}
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ret = iwl_bios_get_wrds_table(&mld->fwrt);
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if (ret < 0) {
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IWL_DEBUG_RADIO(mld,
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"WRDS SAR BIOS table invalid or unavailable. (%d)\n",
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ret);
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/* If not available, don't fail and don't bother with EWRD and
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* WGDS
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*/
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if (!iwl_bios_get_wgds_table(&mld->fwrt)) {
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/* If basic SAR is not available, we check for WGDS,
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* which should *not* be available either. If it is
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* available, issue an error, because we can't use SAR
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* Geo without basic SAR.
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*/
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IWL_ERR(mld, "BIOS contains WGDS but no WRDS\n");
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}
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} else {
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ret = iwl_bios_get_ewrd_table(&mld->fwrt);
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/* If EWRD is not available, we can still use
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* WRDS, so don't fail.
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*/
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if (ret < 0)
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IWL_DEBUG_RADIO(mld,
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"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
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ret);
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ret = iwl_bios_get_wgds_table(&mld->fwrt);
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if (ret < 0)
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IWL_DEBUG_RADIO(mld,
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"Geo SAR BIOS table invalid or unavailable. (%d)\n",
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ret);
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/* we don't fail if the table is not available */
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}
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iwl_uefi_get_uats_table(mld->trans, &mld->fwrt);
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iwl_bios_get_phy_filters(&mld->fwrt);
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}
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static int iwl_mld_geo_sar_init(struct iwl_mld *mld)
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{
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u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
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/* Only set to South Korea if the table revision is 1 */
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__le32 sk = cpu_to_le32(mld->fwrt.geo_rev == 1 ? 1 : 0);
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union iwl_geo_tx_power_profiles_cmd cmd = {
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.v5.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
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.v5.table_revision = sk,
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};
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int ret;
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ret = iwl_sar_geo_fill_table(&mld->fwrt, &cmd.v5.table[0][0],
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ARRAY_SIZE(cmd.v5.table[0]),
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BIOS_GEO_MAX_PROFILE_NUM);
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/* It is a valid scenario to not support SAR, or miss wgds table,
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* but in that case there is no need to send the command.
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*/
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if (ret)
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return 0;
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return iwl_mld_send_cmd_pdu(mld, cmd_id, &cmd, sizeof(cmd.v5));
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}
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int iwl_mld_config_sar_profile(struct iwl_mld *mld, int prof_a, int prof_b)
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{
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u32 cmd_id = REDUCE_TX_POWER_CMD;
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struct iwl_dev_tx_power_cmd cmd = {
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.common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
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.v10.flags = cpu_to_le32(mld->fwrt.reduced_power_flags),
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};
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int ret;
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/* TODO: CDB - support IWL_NUM_CHAIN_TABLES_V2 */
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ret = iwl_sar_fill_profile(&mld->fwrt, &cmd.v10.per_chain[0][0][0],
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IWL_NUM_CHAIN_TABLES, IWL_NUM_SUB_BANDS_V2,
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prof_a, prof_b);
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/* return on error or if the profile is disabled (positive number) */
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if (ret)
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return ret;
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return iwl_mld_send_cmd_pdu(mld, cmd_id, &cmd,
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sizeof(cmd.common) + sizeof(cmd.v10));
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}
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int iwl_mld_init_sar(struct iwl_mld *mld)
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{
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int chain_a_prof = 1;
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int chain_b_prof = 1;
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int ret;
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/* If no profile was chosen by the user yet, choose profile 1 (WRDS) as
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* default for both chains
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*/
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if (mld->fwrt.sar_chain_a_profile && mld->fwrt.sar_chain_b_profile) {
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chain_a_prof = mld->fwrt.sar_chain_a_profile;
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chain_b_prof = mld->fwrt.sar_chain_b_profile;
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}
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ret = iwl_mld_config_sar_profile(mld, chain_a_prof, chain_b_prof);
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if (ret < 0)
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return ret;
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if (ret)
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return 0;
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return iwl_mld_geo_sar_init(mld);
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}
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int iwl_mld_init_sgom(struct iwl_mld *mld)
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{
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int ret;
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struct iwl_host_cmd cmd = {
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.id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
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SAR_OFFSET_MAPPING_TABLE_CMD),
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.data[0] = &mld->fwrt.sgom_table,
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.len[0] = sizeof(mld->fwrt.sgom_table),
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.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
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};
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if (!mld->fwrt.sgom_enabled) {
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IWL_DEBUG_RADIO(mld, "SGOM table is disabled\n");
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return 0;
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}
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ret = iwl_mld_send_cmd(mld, &cmd);
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if (ret)
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IWL_ERR(mld,
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"failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
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return ret;
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}
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static int iwl_mld_ppag_send_cmd(struct iwl_mld *mld)
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{
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union iwl_ppag_table_cmd cmd = {};
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int ret, len;
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ret = iwl_fill_ppag_table(&mld->fwrt, &cmd, &len);
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/* Not supporting PPAG table is a valid scenario */
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if (ret < 0)
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return 0;
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IWL_DEBUG_RADIO(mld, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
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ret = iwl_mld_send_cmd_pdu(mld, WIDE_ID(PHY_OPS_GROUP,
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PER_PLATFORM_ANT_GAIN_CMD),
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&cmd, len);
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if (ret < 0)
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IWL_ERR(mld, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
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ret);
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return ret;
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}
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int iwl_mld_init_ppag(struct iwl_mld *mld)
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{
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/* no need to read the table, done in INIT stage */
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if (!(iwl_is_ppag_approved(&mld->fwrt)))
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return 0;
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return iwl_mld_ppag_send_cmd(mld);
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}
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void iwl_mld_configure_lari(struct iwl_mld *mld)
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{
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struct iwl_fw_runtime *fwrt = &mld->fwrt;
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struct iwl_lari_config_change_cmd cmd = {
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.config_bitmap = iwl_get_lari_config_bitmap(fwrt),
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};
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bool has_raw_dsm_capa = fw_has_capa(&fwrt->fw->ucode_capa,
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IWL_UCODE_TLV_CAPA_FW_ACCEPTS_RAW_DSM_TABLE);
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int ret;
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u32 value;
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ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_11AX_ENABLEMENT, &value);
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if (!ret) {
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if (!has_raw_dsm_capa)
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value &= DSM_11AX_ALLOW_BITMAP;
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cmd.oem_11ax_allow_bitmap = cpu_to_le32(value);
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}
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ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_UNII4_CHAN, &value);
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if (!ret) {
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if (!has_raw_dsm_capa)
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value &= DSM_UNII4_ALLOW_BITMAP;
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cmd.oem_unii4_allow_bitmap = cpu_to_le32(value);
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}
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ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ACTIVATE_CHANNEL, &value);
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if (!ret) {
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if (!has_raw_dsm_capa)
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value &= CHAN_STATE_ACTIVE_BITMAP_CMD_V12;
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cmd.chan_state_active_bitmap = cpu_to_le32(value);
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}
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ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_6E, &value);
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if (!ret)
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cmd.oem_uhb_allow_bitmap = cpu_to_le32(value);
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ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_FORCE_DISABLE_CHANNELS, &value);
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if (!ret) {
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if (!has_raw_dsm_capa)
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value &= DSM_FORCE_DISABLE_CHANNELS_ALLOWED_BITMAP;
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cmd.force_disable_channels_bitmap = cpu_to_le32(value);
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}
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ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENERGY_DETECTION_THRESHOLD,
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&value);
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if (!ret) {
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if (!has_raw_dsm_capa)
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value &= DSM_EDT_ALLOWED_BITMAP;
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cmd.edt_bitmap = cpu_to_le32(value);
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}
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ret = iwl_bios_get_wbem(fwrt, &value);
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if (!ret)
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cmd.oem_320mhz_allow_bitmap = cpu_to_le32(value);
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ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_11BE, &value);
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if (!ret)
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cmd.oem_11be_allow_bitmap = cpu_to_le32(value);
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if (!cmd.config_bitmap &&
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!cmd.oem_uhb_allow_bitmap &&
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!cmd.oem_11ax_allow_bitmap &&
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!cmd.oem_unii4_allow_bitmap &&
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!cmd.chan_state_active_bitmap &&
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!cmd.force_disable_channels_bitmap &&
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!cmd.edt_bitmap &&
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!cmd.oem_320mhz_allow_bitmap &&
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!cmd.oem_11be_allow_bitmap)
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return;
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IWL_DEBUG_RADIO(mld,
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"sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
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le32_to_cpu(cmd.config_bitmap),
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le32_to_cpu(cmd.oem_11ax_allow_bitmap));
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IWL_DEBUG_RADIO(mld,
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"sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x\n",
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le32_to_cpu(cmd.oem_unii4_allow_bitmap),
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le32_to_cpu(cmd.chan_state_active_bitmap));
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IWL_DEBUG_RADIO(mld,
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"sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n",
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le32_to_cpu(cmd.oem_uhb_allow_bitmap),
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le32_to_cpu(cmd.force_disable_channels_bitmap));
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IWL_DEBUG_RADIO(mld,
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"sending LARI_CONFIG_CHANGE, edt_bitmap=0x%x, oem_320mhz_allow_bitmap=0x%x\n",
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le32_to_cpu(cmd.edt_bitmap),
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le32_to_cpu(cmd.oem_320mhz_allow_bitmap));
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IWL_DEBUG_RADIO(mld,
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"sending LARI_CONFIG_CHANGE, oem_11be_allow_bitmap=0x%x\n",
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le32_to_cpu(cmd.oem_11be_allow_bitmap));
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ret = iwl_mld_send_cmd_pdu(mld, WIDE_ID(REGULATORY_AND_NVM_GROUP,
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LARI_CONFIG_CHANGE), &cmd);
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if (ret)
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IWL_DEBUG_RADIO(mld,
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"Failed to send LARI_CONFIG_CHANGE (%d)\n",
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ret);
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}
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void iwl_mld_init_uats(struct iwl_mld *mld)
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{
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int ret;
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struct iwl_host_cmd cmd = {
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.id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
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MCC_ALLOWED_AP_TYPE_CMD),
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.data[0] = &mld->fwrt.uats_table,
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.len[0] = sizeof(mld->fwrt.uats_table),
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.dataflags[0] = IWL_HCMD_DFL_NOCOPY,
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};
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if (!mld->fwrt.uats_valid)
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return;
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ret = iwl_mld_send_cmd(mld, &cmd);
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if (ret)
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IWL_ERR(mld, "failed to send MCC_ALLOWED_AP_TYPE_CMD (%d)\n",
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ret);
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}
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void iwl_mld_init_tas(struct iwl_mld *mld)
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{
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int ret;
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struct iwl_tas_data data = {};
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struct iwl_tas_config_cmd cmd = {};
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u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
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BUILD_BUG_ON(ARRAY_SIZE(data.block_list_array) !=
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IWL_WTAS_BLACK_LIST_MAX);
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BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) !=
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IWL_WTAS_BLACK_LIST_MAX);
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if (!fw_has_capa(&mld->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
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IWL_DEBUG_RADIO(mld, "TAS not enabled in FW\n");
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return;
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}
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ret = iwl_bios_get_tas_table(&mld->fwrt, &data);
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if (ret < 0) {
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IWL_DEBUG_RADIO(mld,
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"TAS table invalid or unavailable. (%d)\n",
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ret);
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return;
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}
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if (!iwl_is_tas_approved()) {
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IWL_DEBUG_RADIO(mld,
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"System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
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dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
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if ((!iwl_add_mcc_to_tas_block_list(data.block_list_array,
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&data.block_list_size,
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IWL_MCC_US)) ||
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(!iwl_add_mcc_to_tas_block_list(data.block_list_array,
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&data.block_list_size,
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IWL_MCC_CANADA))) {
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IWL_DEBUG_RADIO(mld,
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"Unable to add US/Canada to TAS block list, disabling TAS\n");
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return;
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}
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} else {
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IWL_DEBUG_RADIO(mld,
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"System vendor '%s' is in the approved list.\n",
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dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
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}
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cmd.block_list_size = cpu_to_le16(data.block_list_size);
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for (u8 i = 0; i < data.block_list_size; i++)
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cmd.block_list_array[i] =
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cpu_to_le16(data.block_list_array[i]);
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cmd.tas_config_info.table_source = data.table_source;
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cmd.tas_config_info.table_revision = data.table_revision;
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cmd.tas_config_info.value = cpu_to_le32(data.tas_selection);
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ret = iwl_mld_send_cmd_pdu(mld, cmd_id, &cmd);
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if (ret)
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IWL_DEBUG_RADIO(mld, "failed to send TAS_CONFIG (%d)\n", ret);
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}
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