mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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a7d45bcfde
igc already supports enabling MAC Merge for FPE. This patch adds support for preemptible queues in mqprio. Tested preemption with mqprio by: 1. Enable FPE: ethtool --set-mm enp1s0 pmac-enabled on tx-enabled on verify-enabled on 2. Enable preemptible queue in mqprio: mqprio num_tc 4 map 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 \ queues 1@0 1@1 1@2 1@3 \ fp P P P E Signed-off-by: Faizal Rahim <faizal.abdul.rahim@linux.intel.com> Reviewed-by: Simon Horman <horms@kernel.org> Tested-by: Mor Bar-Gabay <morx.bar.gabay@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
70 lines
1.9 KiB
C
70 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2020 Intel Corporation */
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#ifndef _IGC_TSN_H_
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#define _IGC_TSN_H_
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#include <net/pkt_sched.h>
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#define IGC_RX_MIN_FRAG_SIZE 60
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#define SMD_FRAME_SIZE 60
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enum igc_txd_popts_type {
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SMD_V = 0x01,
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SMD_R = 0x02,
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};
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DECLARE_STATIC_KEY_FALSE(igc_fpe_enabled);
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void igc_fpe_init(struct igc_adapter *adapter);
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void igc_fpe_clear_preempt_queue(struct igc_adapter *adapter);
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void igc_fpe_save_preempt_queue(struct igc_adapter *adapter,
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const struct tc_mqprio_qopt_offload *mqprio);
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u32 igc_fpe_get_supported_frag_size(u32 frag_size);
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int igc_tsn_offload_apply(struct igc_adapter *adapter);
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int igc_tsn_reset(struct igc_adapter *adapter);
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void igc_tsn_adjust_txtime_offset(struct igc_adapter *adapter);
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bool igc_tsn_is_taprio_activated_by_user(struct igc_adapter *adapter);
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static inline bool igc_fpe_is_pmac_enabled(struct igc_adapter *adapter)
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{
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return static_branch_unlikely(&igc_fpe_enabled) &&
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adapter->fpe.mmsv.pmac_enabled;
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}
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static inline bool igc_fpe_handle_mpacket(struct igc_adapter *adapter,
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union igc_adv_rx_desc *rx_desc,
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unsigned int size, void *pktbuf)
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{
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u32 status_error = le32_to_cpu(rx_desc->wb.upper.status_error);
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int smd;
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smd = FIELD_GET(IGC_RXDADV_STAT_SMD_TYPE_MASK, status_error);
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if (smd != IGC_RXD_STAT_SMD_TYPE_V && smd != IGC_RXD_STAT_SMD_TYPE_R)
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return false;
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if (size == SMD_FRAME_SIZE && mem_is_zero(pktbuf, SMD_FRAME_SIZE)) {
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struct ethtool_mmsv *mmsv = &adapter->fpe.mmsv;
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enum ethtool_mmsv_event event;
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if (smd == IGC_RXD_STAT_SMD_TYPE_V)
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event = ETHTOOL_MMSV_LP_SENT_VERIFY_MPACKET;
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else
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event = ETHTOOL_MMSV_LP_SENT_RESPONSE_MPACKET;
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ethtool_mmsv_event_handle(mmsv, event);
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}
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return true;
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}
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static inline bool igc_fpe_transmitted_smd_v(union igc_adv_tx_desc *tx_desc)
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{
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u32 olinfo_status = le32_to_cpu(tx_desc->read.olinfo_status);
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u8 smd = FIELD_GET(IGC_TXD_POPTS_SMD_MASK, olinfo_status);
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return smd == SMD_V;
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}
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#endif /* _IGC_BASE_H */
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