mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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727970e972
Add silicon enabling support for VFE680 as found on sm8450, x1e and derivatives thereof. References work from Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> [bod: fix minor checkpatch linelenght splat @ lines 21, 22] Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
245 lines
7.7 KiB
C
245 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* camss-vfe-680.c
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*
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* Qualcomm MSM Camera Subsystem - VFE (Video Front End) Module v680
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*
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* Copyright (C) 2025 Linaro Ltd.
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include "camss.h"
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#include "camss-vfe.h"
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#define VFE_TOP_IRQn_STATUS(vfe, n) ((vfe_is_lite(vfe) ? 0x1c : 0x44) + (n) * 4)
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#define VFE_TOP_IRQn_MASK(vfe, n) ((vfe_is_lite(vfe) ? 0x24 : 0x34) + (n) * 4)
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#define VFE_TOP_IRQn_CLEAR(vfe, n) ((vfe_is_lite(vfe) ? 0x2c : 0x3c) + (n) * 4)
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#define VFE_IRQ1_SOF(vfe, n) ((vfe_is_lite(vfe) ? BIT(2) : BIT(8)) << ((n) * 2))
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#define VFE_IRQ1_EOF(vfe, n) ((vfe_is_lite(vfe) ? BIT(3) : BIT(9)) << ((n) * 2))
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#define VFE_TOP_IRQ_CMD(vfe) (vfe_is_lite(vfe) ? 0x38 : 0x30)
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#define VFE_TOP_IRQ_CMD_GLOBAL_CLEAR BIT(0)
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#define VFE_TOP_DIAG_CONFIG (vfe_is_lite(vfe) ? 0x40 : 0x50)
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#define VFE_TOP_DEBUG_11(vfe) (vfe_is_lite(vfe) ? 0x40 : 0xcc)
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#define VFE_TOP_DEBUG_12(vfe) (vfe_is_lite(vfe) ? 0x40 : 0xd0)
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#define VFE_TOP_DEBUG_13(vfe) (vfe_is_lite(vfe) ? 0x40 : 0xd4)
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#define VFE_BUS_IRQn_MASK(vfe, n) ((vfe_is_lite(vfe) ? 0x218 : 0xc18) + (n) * 4)
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#define VFE_BUS_IRQn_CLEAR(vfe, n) ((vfe_is_lite(vfe) ? 0x220 : 0xc20) + (n) * 4)
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#define VFE_BUS_IRQn_STATUS(vfe, n) ((vfe_is_lite(vfe) ? 0x228 : 0xc28) + (n) * 4)
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#define VFE_BUS_IRQ_GLOBAL_CLEAR(vfe) (vfe_is_lite(vfe) ? 0x230 : 0xc30)
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#define VFE_BUS_WR_VIOLATION_STATUS(vfe) (vfe_is_lite(vfe) ? 0x264 : 0xc64)
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#define VFE_BUS_WR_OVERFLOW_STATUS(vfe) (vfe_is_lite(vfe) ? 0x268 : 0xc68)
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#define VFE_BUS_WR_IMAGE_VIOLATION_STATUS(vfe) (vfe_is_lite(vfe) ? 0x270 : 0xc70)
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#define VFE_BUS_WRITE_CLIENT_CFG(vfe, c) ((vfe_is_lite(vfe) ? 0x400 : 0xe00) + (c) * 0x100)
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#define VFE_BUS_WRITE_CLIENT_CFG_EN BIT(0)
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#define VFE_BUS_IMAGE_ADDR(vfe, c) ((vfe_is_lite(vfe) ? 0x404 : 0xe04) + (c) * 0x100)
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#define VFE_BUS_FRAME_INCR(vfe, c) ((vfe_is_lite(vfe) ? 0x408 : 0xe08) + (c) * 0x100)
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#define VFE_BUS_IMAGE_CFG0(vfe, c) ((vfe_is_lite(vfe) ? 0x40c : 0xe0c) + (c) * 0x100)
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#define VFE_BUS_IMAGE_CFG0_DATA(h, s) (((h) << 16) | ((s) >> 4))
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#define WM_IMAGE_CFG_0_DEFAULT_WIDTH (0xFFFF)
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#define VFE_BUS_IMAGE_CFG1(vfe, c) ((vfe_is_lite(vfe) ? 0x410 : 0xe10) + (c) * 0x100)
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#define VFE_BUS_IMAGE_CFG2(vfe, c) ((vfe_is_lite(vfe) ? 0x414 : 0xe14) + (c) * 0x100)
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#define VFE_BUS_PACKER_CFG(vfe, c) ((vfe_is_lite(vfe) ? 0x418 : 0xe18) + (c) * 0x100)
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#define VFE_BUS_IRQ_SUBSAMPLE_PERIOD(vfe, c) ((vfe_is_lite(vfe) ? 0x430 : 0xe30) + (c) * 0x100)
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#define VFE_BUS_IRQ_SUBSAMPLE_PATTERN(vfe, c) ((vfe_is_lite(vfe) ? 0x434 : 0xe34) + (c) * 0x100)
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#define VFE_BUS_FRAMEDROP_PERIOD(vfe, c) ((vfe_is_lite(vfe) ? 0x438 : 0xe38) + (c) * 0x100)
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#define VFE_BUS_FRAMEDROP_PATTERN(vfe, c) ((vfe_is_lite(vfe) ? 0x43c : 0xe3c) + (c) * 0x100)
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#define VFE_BUS_MMU_PREFETCH_CFG(vfe, c) ((vfe_is_lite(vfe) ? 0x460 : 0xe60) + (c) * 0x100)
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#define VFE_BUS_MMU_PREFETCH_CFG_EN BIT(0)
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#define VFE_BUS_MMU_PREFETCH_MAX_OFFSET(vfe, c) ((vfe_is_lite(vfe) ? 0x464 : 0xe64) + (c) * 0x100)
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#define VFE_BUS_ADDR_STATUS0(vfe, c) ((vfe_is_lite(vfe) ? 0x470 : 0xe70) + (c) * 0x100)
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/*
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* TODO: differentiate the port id based on requested type of RDI, BHIST etc
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*
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* IFE write master IDs
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*
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* VIDEO_FULL_Y 0
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* VIDEO_FULL_C 1
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* VIDEO_DS_4:1 2
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* VIDEO_DS_16:1 3
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* DISPLAY_FULL_Y 4
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* DISPLAY_FULL_C 5
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* DISPLAY_DS_4:1 6
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* DISPLAY_DS_16:1 7
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* FD_Y 8
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* FD_C 9
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* PIXEL_RAW 10
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* STATS_BE0 11
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* STATS_BHIST0 12
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* STATS_TINTLESS_BG 13
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* STATS_AWB_BG 14
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* STATS_AWB_BFW 15
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* STATS_BAF 16
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* STATS_BHIST 17
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* STATS_RS 18
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* STATS_IHIST 19
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* SPARSE_PD 20
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* PDAF_V2.0_PD_DATA 21
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* PDAF_V2.0_SAD 22
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* LCR 23
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* RDI0 24
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* RDI1 25
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* RDI2 26
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* LTM_STATS 27
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*
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* IFE Lite write master IDs
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*
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* RDI0 0
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* RDI1 1
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* RDI2 2
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* RDI3 3
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* GAMMA 4
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* BE 5
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*/
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/* TODO: assign an ENUM in resources and use the provided master
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* id directly for RDI, STATS, AWB_BG, BHIST.
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* This macro only works because RDI is all we support right now.
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*/
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#define RDI_WM(n) ((vfe_is_lite(vfe) ? 0 : 24) + (n))
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static void vfe_global_reset(struct vfe_device *vfe)
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{
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/* VFE680 has no global reset, simply report a completion */
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complete(&vfe->reset_complete);
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}
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/*
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* vfe_isr - VFE module interrupt handler
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* @irq: Interrupt line
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* @dev: VFE device
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*
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* Return IRQ_HANDLED on success
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*/
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static irqreturn_t vfe_isr(int irq, void *dev)
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{
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return IRQ_HANDLED;
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}
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/*
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* vfe_halt - Trigger halt on VFE module and wait to complete
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* @vfe: VFE device
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*
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* Return 0 on success or a negative error code otherwise
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*/
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static int vfe_halt(struct vfe_device *vfe)
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{
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/* rely on vfe_disable_output() to stop the VFE */
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return 0;
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}
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static void vfe_disable_irq(struct vfe_device *vfe)
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{
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writel(0u, vfe->base + VFE_TOP_IRQn_MASK(vfe, 0));
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writel(0u, vfe->base + VFE_TOP_IRQn_MASK(vfe, 1));
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writel(0u, vfe->base + VFE_BUS_IRQn_MASK(vfe, 0));
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writel(0u, vfe->base + VFE_BUS_IRQn_MASK(vfe, 1));
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}
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static void vfe_wm_update(struct vfe_device *vfe, u8 rdi, u32 addr,
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struct vfe_line *line)
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{
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u8 wm = RDI_WM(rdi);
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writel(addr, vfe->base + VFE_BUS_IMAGE_ADDR(vfe, wm));
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}
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static void vfe_wm_start(struct vfe_device *vfe, u8 rdi, struct vfe_line *line)
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{
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struct v4l2_pix_format_mplane *pix =
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&line->video_out.active_fmt.fmt.pix_mp;
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u32 stride = pix->plane_fmt[0].bytesperline;
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u32 cfg;
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u8 wm;
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cfg = VFE_BUS_IMAGE_CFG0_DATA(pix->height, stride);
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wm = RDI_WM(rdi);
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writel(cfg, vfe->base + VFE_BUS_IMAGE_CFG0(vfe, wm));
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writel(0, vfe->base + VFE_BUS_IMAGE_CFG1(vfe, wm));
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writel(stride, vfe->base + VFE_BUS_IMAGE_CFG2(vfe, wm));
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writel(0, vfe->base + VFE_BUS_PACKER_CFG(vfe, wm));
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/* Set total frame increment value */
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writel(pix->plane_fmt[0].bytesperline * pix->height,
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vfe->base + VFE_BUS_FRAME_INCR(vfe, wm));
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/* MMU */
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writel(VFE_BUS_MMU_PREFETCH_CFG_EN, vfe->base + VFE_BUS_MMU_PREFETCH_CFG(vfe, wm));
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writel(~0u, vfe->base + VFE_BUS_MMU_PREFETCH_MAX_OFFSET(vfe, wm));
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/* no dropped frames, one irq per frame */
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writel(1, vfe->base + VFE_BUS_FRAMEDROP_PATTERN(vfe, wm));
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writel(0, vfe->base + VFE_BUS_FRAMEDROP_PERIOD(vfe, wm));
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writel(1, vfe->base + VFE_BUS_IRQ_SUBSAMPLE_PATTERN(vfe, wm));
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writel(0, vfe->base + VFE_BUS_IRQ_SUBSAMPLE_PERIOD(vfe, wm));
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/* We don't process IRQs for VFE in RDI mode at the moment */
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vfe_disable_irq(vfe);
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/* Enable WM */
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writel(VFE_BUS_WRITE_CLIENT_CFG_EN,
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vfe->base + VFE_BUS_WRITE_CLIENT_CFG(vfe, wm));
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dev_dbg(vfe->camss->dev, "RDI%d WM:%d width %d height %d stride %d\n",
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rdi, wm, pix->width, pix->height, stride);
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}
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static void vfe_wm_stop(struct vfe_device *vfe, u8 rdi)
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{
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u8 wm = RDI_WM(rdi);
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writel(0, vfe->base + VFE_BUS_WRITE_CLIENT_CFG(vfe, wm));
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}
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static const struct camss_video_ops vfe_video_ops_680 = {
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.queue_buffer = vfe_queue_buffer_v2,
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.flush_buffers = vfe_flush_buffers,
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};
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static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe)
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{
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vfe->video_ops = vfe_video_ops_680;
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}
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static void vfe_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id)
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{
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int port_id = line_id;
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camss_reg_update(vfe->camss, vfe->id, port_id, false);
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}
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static inline void vfe_reg_update_clear(struct vfe_device *vfe,
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enum vfe_line_id line_id)
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{
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int port_id = line_id;
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camss_reg_update(vfe->camss, vfe->id, port_id, true);
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}
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const struct vfe_hw_ops vfe_ops_680 = {
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.global_reset = vfe_global_reset,
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.hw_version = vfe_hw_version,
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.isr = vfe_isr,
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.pm_domain_off = vfe_pm_domain_off,
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.pm_domain_on = vfe_pm_domain_on,
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.subdev_init = vfe_subdev_init,
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.vfe_disable = vfe_disable,
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.vfe_enable = vfe_enable_v2,
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.vfe_halt = vfe_halt,
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.vfe_wm_start = vfe_wm_start,
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.vfe_wm_stop = vfe_wm_stop,
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.vfe_buf_done = vfe_buf_done,
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.vfe_wm_update = vfe_wm_update,
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.reg_update = vfe_reg_update,
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.reg_update_clear = vfe_reg_update_clear,
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};
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